On Wed, 18 Jan 2017, "Vivi, Rodrigo" wrote:
> On Wed, 2017-01-18 at 10:12 +0200, Jani Nikula wrote:
>> On Tue, 17 Jan 2017, Rodrigo Vivi wrote:
>> > On Mon, Jan 16, 2017 at 2:04 AM, Jani Nikula
>> > wrote:
>> >> On
On Wed, 2017-01-18 at 10:12 +0200, Jani Nikula wrote:
> On Tue, 17 Jan 2017, Rodrigo Vivi wrote:
> > On Mon, Jan 16, 2017 at 2:04 AM, Jani Nikula
> > wrote:
> >> On Fri, 13 Jan 2017, Rodrigo Vivi wrote:
> >>> This and
On Tue, 17 Jan 2017, Rodrigo Vivi wrote:
> On Mon, Jan 16, 2017 at 2:04 AM, Jani Nikula
> wrote:
>> On Fri, 13 Jan 2017, Rodrigo Vivi wrote:
>>> This and all the remaining patches on this series (6,7,8 and 9) got
>>>
On Mon, Jan 16, 2017 at 2:04 AM, Jani Nikula
wrote:
> On Fri, 13 Jan 2017, Rodrigo Vivi wrote:
>> This and all the remaining patches on this series (6,7,8 and 9) got
>> merged to dinq.
>
> Given that this patch series was not properly sent as
On Fri, 13 Jan 2017, Rodrigo Vivi wrote:
> This and all the remaining patches on this series (6,7,8 and 9) got
> merged to dinq.
Given that this patch series was not properly sent as a thread, I don't
think our CI ran it as a whole, and it should not have been pushed
This and all the remaining patches on this series (6,7,8 and 9) got
merged to dinq.
Thanks for the patches.
On Thu, Jan 12, 2017 at 12:12 PM, Vivi, Rodrigo wrote:
> Reviewed-by: Rodrigo Vivi
>
> On Fri, 2017-01-13 at 00:31 +0530, vathsala
Reviewed-by: Rodrigo Vivi
On Fri, 2017-01-13 at 00:31 +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed in
> psr2 enable sequence.
> bit 12 : Program Transcoder EDP VSC DIP header with a valid setting for
> PSR2 and
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed in
psr2 enable sequence.
bit 12 : Program Transcoder EDP VSC DIP header with a valid setting for
PSR2 and Set CHICKEN_TRANS_EDP(0x420cc) bit 12 for programmable
header packet.
bit 15 : Set CHICKEN_TRANS_EDP(0x420cc) bit
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed in
psr2 enable sequence.
bit 12 : Program Transcoder EDP VSC DIP header with a valid setting for
PSR2 and Set CHICKEN_TRANS_EDP(0x420cc) bit 12 for programmable
header packet.
bit 15 : Set CHICKEN_TRANS_EDP(0x420cc) bit
On Mon, Jan 09, 2017 at 06:38:15PM +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed in
> psr2 enable sequence.
> Program Transcoder EDP VSC DIP header with a valid setting for PSR2
> and Set CHICKEN_TRANS_EDP(0x420cc) bit 12 for programmable header
>
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed in
psr2 enable sequence.
Program Transcoder EDP VSC DIP header with a valid setting for PSR2
and Set CHICKEN_TRANS_EDP(0x420cc) bit 12 for programmable header
packet.
Set CHICKEN_TRANS_EDP(0x420cc) bit 15 if Y coordinate is supported
On Sunday 08 January 2017 01:14 AM, Chris Wilson wrote:
On Sat, Jan 07, 2017 at 11:42:04PM +0530, vathsala nagaraju wrote:
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
v2: (Rodrigo)
- move
On Sat, Jan 07, 2017 at 11:42:04PM +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
> must be programmed.
> Enable bit 12 for programmable header packet.
> Enable bit 15 for Y cordinate support.
>
> v2: (Rodrigo)
> - move CHICKEN_TRANS_EDP bit set logic right after
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
v2: (Rodrigo)
- move CHICKEN_TRANS_EDP bit set logic right after setup_vsc
v3:(Rodrigo)
- initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
v2: (Rodrigo)
- move CHICKEN_TRANS_EDP bit set logic right after setup_vsc
v3:(Rodrigo)
- initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of
On Sat, 2017-01-07 at 00:28 +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
> must be programmed.
> Enable bit 12 for programmable header packet.
> Enable bit 15 for Y cordinate support.
>
> v2: (Rodrigo)
> - move CHICKEN_TRANS_EDP bit set logic right after setup_vsc
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
v2: (Rodrigo)
- move CHICKEN_TRANS_EDP bit set logic right after setup_vsc
v3:(Rodrigo)
- initialize chicken_trans to CHICKEN_TRANS_BIT12 instead of
On Fri, 2017-01-06 at 21:59 +0530, vathsala nagaraju wrote:
> As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
> must be programmed.
> Enable bit 12 for programmable header packet.
> Enable bit 15 for Y cordinate support.
>
> v2: (Rodrigo)
> - move CHICKEN_TRANS_EDP bit set logic right
> after
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
v2: (Rodrigo)
- move CHICKEN_TRANS_EDP bit set logic right
after setup_vsc
Cc: Rodrigo Vivi
Cc: Jim Bride
Please don't forget about the bit 11 for KBL. In a separated patch.
This patch is correct and count with my rv-b, but I believe the best place for
this is
on intel_psr_enable, right after setup_vsc.
On Mon, Jan 02, 2017 at 05:00:59PM +0530, vathsala nagaraju wrote:
> As per bpsec,
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: vathsala nagaraju
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: vathsala nagaraju
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