Re: [Intel-gfx] [PATCH v4] drm/i915: Handle PipeC fused off on IVB/HSW/BDW

2016-02-09 Thread Daniel Vetter
On Mon, Feb 01, 2016 at 03:20:19PM +0100, Patrik Jakobsson wrote: > On Fri, Jan 22, 2016 at 01:28:45PM +0200, Gabriel Feceoru wrote: > > Some Gen7/8 production parts may have the Display Pipe C fused off. > > In this case, the display hardware will prevent the enable bit in > > PIPE_CONF register (

Re: [Intel-gfx] [PATCH v4] drm/i915: Handle PipeC fused off on IVB/HSW/BDW

2016-02-01 Thread Patrik Jakobsson
On Fri, Jan 22, 2016 at 01:28:45PM +0200, Gabriel Feceoru wrote: > Some Gen7/8 production parts may have the Display Pipe C fused off. > In this case, the display hardware will prevent the enable bit in > PIPE_CONF register (for Pipe C) from being set to 1. > > Fixed by adjusting pipe_count to ref

[Intel-gfx] [PATCH v4] drm/i915: Handle PipeC fused off on IVB/HSW/BDW

2016-01-22 Thread Gabriel Feceoru
Some Gen7/8 production parts may have the Display Pipe C fused off. In this case, the display hardware will prevent the enable bit in PIPE_CONF register (for Pipe C) from being set to 1. Fixed by adjusting pipe_count to reflect this. v2: Rename HSW_PIPE_C_DISABLE to IVB_PIPE_C_DISABLE as it alrea