.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjä
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 7 +++
drivers/gpu/drm/i915/display/intel_lspcon.c | 5 -
drivers/gpu/drm/i915/display/intel_lspcon.h | 4
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu
new lspcon detetction changes.
v9: Rebase
v10: Fixed one patch for detection
v11: Addressed Ville's review comments and added RB in the respective
patches.
Thanks Ville for all the suggestions and inputs.
Note: Patch 13 of the series is for reference to userspace, not to be
merged to driver.
Uma S
iew comments by Jose.
v6: Move WA to end of function and added Jose's RB.
Signed-off-by: Uma Shankar
Reviewed-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 12
drivers/gpu/drm/i915/i915_drv.h | 1 +
2 files changed, 13 insertions(+)
diff --
Ville's review comments
v4: Change the WA as per Jose's recommendation.
v5: Addressed Jose's review comments.
v6: Added Jose and Ville RB's. Fixed a minor review
comment.
Uma Shankar (2):
drm/i915/display/tgl: Disable FBC with PSR2
Revert "drm/i915/display/fbc: Disable fbc by default o
FBC can be re-enabled on TGL with WA of keeping it disabled
while PSR2 is enabled.
This reverts commit 2982ded2ff5ce0cf1a49bc39a526da182782b664.
Signed-off-by: Uma Shankar
Reviewed-by: José Roberto de Souza
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 7
es updated with feedback.
v14: Final series with all RB's in place, ready to merge.
Thanks Ville for all the suggestions and inputs.
Note: Patch 15 of the series is for reference to userspace, not to be
merged to driver.
Uma Shankar (14):
drm/i915/display: Add HDR Capability detection for LS
, passed arguments instead of hardcodings.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++---
drivers/gpu/drm/i915/display/intel_lspcon.c | 31 -
drivers/gpu/drm/i915/display/intel_lspcon.h | 4 +++
3 files changed
Nikula's review comment and fixed the HDR
capability detection logic
v3: Deferred HDR detection from lspcon_init (Ville)
v4: Addressed Ville's minor review comments, added his RB.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
.../drm/i915/display/intel_display_types.h| 1
Non-HDMI sinks shouldn't be sent Dynamic Range and Mastering infoframes.
Check for that when using LSPCON.
v2: Addressed Ville's review comment.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +-
1 file changed, 5 insertions(+), 1
.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 7 +++
drivers/gpu/drm/i915/display/intel_lspcon.c | 5 -
drivers/gpu/drm/i915/display/intel_lspcon.h | 4
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu
, as recommended by Ville.
v4: Addressed Ville's review comment by adding HDMI infoframe
versions directly instead of DIP wrappers.
v5: Re-ordered the patches to avoid potential break in usage,
as suggested by Ville.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display
: updated commit message.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 21a0ca6ae2a6..15e9c46af1d9 100644
Enable HDR for LSPCON based on Parade along with MCA.
v2: Added a helper for status reg as suggested by Ville.
v3: Removed a redundant variable, added Ville's RB.
Signed-off-by: Uma Shankar
Signed-off-by: Vipin Anand
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lspcon.c
. To that end just split
intel_attach_colorspace_property() into HDMI and DP variants
and let the caller worry about which one it wants to use.
Cc: Uma Shankar
Signed-off-by: Ville Syrjälä
Reviewed-by: Uma Shankar
---
.../gpu/drm/i915/display/intel_connector.c| 29
as we can't create property at late_register.
Credits-to: Ville Syrjälä
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 9 ++---
drivers/gpu/drm/i915/display/intel_lspcon.c | 3 +++
2 files changed, 9 insertions(+), 3 deletions(-)
diff
instead of a redundant
and confusing DIP overhead.
Suggested-by: Ville Syrjälä
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c| 10 +++---
drivers/gpu/drm/i915/display/intel_lspcon.c | 9 +
drivers/gpu/drm/i915/display
: Add HDR proprty in late_register to handle lspcon detection,
as suggested by Ville.
v5: Init Lspcon only if advertized from BIOS.
v6: Added a Todo to plan a cleanup later, added Ville's RB.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c
This patch fixes the quantization range for YCbCr output on
Lspcon based devices.
v2: Re-phrased the description and added Ville's Rb.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 17 +++--
1 file changed, 11 insertions
Add a WARN to rule out an invalid output range and format
combination. This is to align the lspcon code with
compute_avi_infoframes.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 4
1 file changed, 4 insertions(+)
diff --git
Dropped a irrelevant lspcon check from intel_hdmi_add_properties
function.
Suggested-by: Ville Syrjälä
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers
of new properties is not possible at late_register.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
drivers/gpu/drm/i915/display/intel_lspcon.c | 2 ++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
Nikula's review comment and fixed the HDR
capability detection logic
v3: Deferred HDR detection from lspcon_init (Ville)
v4: Addressed Ville's minor review comments, added his RB.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
.../drm/i915/display/intel_display_types.h| 1
le for all the suggestions and inputs.
Note: Patch 15 of the series is for reference to userspace, not to be
merged to driver.
Uma Shankar (14):
drm/i915/display: Add HDR Capability detection for LSPCON
drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
drm/i915/display: Attach HD
: Add HDR proprty in late_register to handle lspcon detection,
as suggested by Ville.
v5: Init Lspcon only if advertized from BIOS.
v6: Added a Todo to plan a cleanup later, added Ville's RB.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c
, passed arguments instead of hardcodings.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++---
drivers/gpu/drm/i915/display/intel_lspcon.c | 31 -
drivers/gpu/drm/i915/display/intel_lspcon.h | 4 +++
3 files changed
Content type is supported on HDMI sink devices. Attached the
property for the same for LSPCON based devices.
v2: Added the content type programming when we are attaching
the property to connector, as suggested by Ville.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm
Add a WARN to rule out an invalid output range and format
combination. This is to align the lspcon code with
compute_avi_infoframes.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 4
1 file changed, 4 insertions(+)
diff --git
Non-HDMI sinks shouldn't be sent Dynamic Range and Mastering infoframes.
Check for that when using LSPCON.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
: updated commit message.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 0f89dbfa958a..f6f66033176b 100644
instead of a redundant
and confusing DIP overhead.
Suggested-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c| 10 +++---
drivers/gpu/drm/i915/display/intel_lspcon.c | 9 +
drivers/gpu/drm/i915/display/intel_lspcon.h | 2 ++
3 files
Dropped a irrelevant lspcon check from intel_hdmi_add_properties
function.
Suggested-by: Ville Syrjälä
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers
Enable HDR for LSPCON based on Parade along with MCA.
v2: Added a helper for status reg as suggested by Ville.
v3: Removed a redundant variable, added Ville's RB.
Signed-off-by: Uma Shankar
Signed-off-by: Vipin Anand
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lspcon.c
. To that end just split
intel_attach_colorspace_property() into HDMI and DP variants
and let the caller worry about which one it wants to use.
Cc: Uma Shankar
Signed-off-by: Ville Syrjälä
Reviewed-by: Uma Shankar
---
.../gpu/drm/i915/display/intel_connector.c| 29
as per Jani Nikula's suggestion.
v3: Aligned colorimetry handling for lspcon as per compute_avi_infoframes,
as suggested by Ville.
v4: Finally fixed this with Ville's help, re-phrased the commit header
and description.
Credits-to: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915
.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 7 +++
drivers/gpu/drm/i915/display/intel_lspcon.c | 5 -
drivers/gpu/drm/i915/display/intel_lspcon.h | 4
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu
This patch fixes the quantization range for YCbCr output on
Lspcon based devices.
v2: Re-phrased the description and added Ville's Rb.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 17 +++--
1 file changed, 11 insertions
, as recommended by Ville.
v4: Addressed Ville's review comment by adding HDMI infoframe
versions directly instead of DIP wrappers.
v5: Re-ordered the patches to avoid potential break in usage,
as suggested by Ville.
Signed-off-by: Uma Shankar
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display
Ville's review comments
v4: Change the WA as per Jose's recommendation.
Uma Shankar (2):
drm/i915/display/tgl: Disable FBC with PSR2
Revert "drm/i915/display/fbc: Disable fbc by default on TGL"
drivers/gpu/drm/i915/display/intel_fbc.c | 36 +++-
drivers/gp
to disable fbc to intel_fbc_update_state_cache
and removed the crtc->config usages, as per Ville's recommendation.
v4: Introduced a variable in fbc state_cache instead of the earlier
plane.visible WA, as suggested by Jose.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fb
FBC can be re-enabled on TGL with WA of keeping it disabled
while PSR2 is enabled.
This reverts commit 2982ded2ff5ce0cf1a49bc39a526da182782b664.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm
Ville's review comments
v4: Change the WA as per Jose's recommendation.
v5: Addressed Jose's review comments.
Uma Shankar (2):
drm/i915/display/tgl: Disable FBC with PSR2
Revert "drm/i915/display/fbc: Disable fbc by default on TGL"
drivers/gpu/drm/i915/display/intel_
iew comments by Jose.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 12
drivers/gpu/drm/i915/i915_drv.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
in
FBC can be re-enabled on TGL with WA of keeping it disabled
while PSR2 is enabled.
This reverts commit 2982ded2ff5ce0cf1a49bc39a526da182782b664.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm
to disable fbc to intel_fbc_update_state_cache
and removed the crtc->config usages, as per Ville's recommendation.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
FBC was disabled on TGL due to random underruns. It has
been determined that FBC will not work reliably with PSR2.
This series re-enables fbc along with taking care of the
PSR2 limitations for TGL.
Bspec: 50422 HSD: 14010260002
v2: Addressed review comments and added bspec links
Uma Shankar (2
There are some corner cases wrt underrun when we enable
FBC with PSR2 on TGL. Recommendation from hardware is to
keep this combination disabled.
Bspec: 50422 HSD: 14010260002
v2: Added psr2 enabled check from crtc_state (Anshuman)
Added Bspec link and HSD referneces (Jose)
Signed-off-by: Uma
FBC can be re-enabled on TGL with WA of keeping it disabled
while PSR2 is enabled.
This reverts commit 2982ded2ff5ce0cf1a49bc39a526da182782b664.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm
Lspcon has Infoframes as well as DIP for HDR metadata(DRM Infoframe).
Create a separate mechanism for lspcon compared to HDMI in order to
address the same and ensure future scalability.
Suggested-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c| 10
, passed arguments instead of hardcodings.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++---
drivers/gpu/drm/i915/display/intel_lspcon.c | 31 -
drivers/gpu/drm/i915/display/intel_lspcon.h | 4 +++
3 files changed, 26 insertions(+), 17
Nikula's review comment and fixed the HDR
capability detection logic
v3: Deferred HDR detection from lspcon_init (Ville)
Signed-off-by: Uma Shankar
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_lspcon.c | 28 +++
drivers/gpu/drm
Enable HDR for LSPCON based on Parade along with MCA.
v2: Added a helper for status reg as suggested by Ville.
Signed-off-by: Uma Shankar
Signed-off-by: Vipin Anand
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff
new lspcon detetction changes.
v9: Rebase
Thanks Ville for all the suggestions and inputs.
Note: Patch 12 of the series is for reference to userspace, not to be
merged to driver.
Uma Shankar (12):
drm/i915/display: Add HDR Capability detection for LSPCON
drm/i915/display: Enable HDR on gen9 device
Content type is supported on HDMI sink devices. Attached the
property for the same for LSPCON based devices.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915
as per Jani Nikula's suggestion.
v3: Aligned colorimetry handling for lspcon as per compute_avi_infoframes,
as suggested by Ville.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 31 +
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git
Implement Read back of HDR metadata infoframes i.e Dynamic Range
and Mastering Infoframe for LSPCON devices.
v2: Added proper bitmask of enabled infoframes as per Ville's
recommendation.
v3: Dropped a redundant wrapper as per Ville's comment.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm
Non-HDMI sinks shouldn't be sent Dynamic Range and Mastering infoframes.
Check for that when using LSPCON.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
, as recommended by Ville.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 57 -
drivers/gpu/drm/i915/i915_reg.h | 2 +
2 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
b/drivers/gpu/drm
Dropped a irrelevant lspcon check from intel_hdmi_add_properties
function.
Suggested-by: Ville Syrjälä"
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/di
: Add HDR proprty in late_register to handle lspcon detection,
as suggested by Ville.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 +++
drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +-
drivers/gpu/drm/i915/display/intel_lspcon.h | 1 +
3 files changed
: updated commit message.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 79a49d1cbb21..1ad4c08f850b 100644
: Add HDR proprty in late_register to handle lspcon detection,
as suggested by Ville.
v5: Init Lspcon only if advertized from BIOS.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 14 ++
drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +-
drivers/gpu/drm
There are some corner cases wrt underrun when we enable
FBC with PSR2 on TGL. Recommendation from hardware is to
keep this combination disabled.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915
FBC can be re-enabled on TGL with WA of keeping it disabled
while PSR2 is enabled.
This reverts commit 2982ded2ff5ce0cf1a49bc39a526da182782b664.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm
FBC was disabled on TGL due to random underruns. It has
been determined that FBC will not work reliably with PSR2.
This series re-enables fbc along with taking care of the
PSR2 limitations for TGL.
Test-with: 20201104195142.3223-1-uma.shan...@intel.com
Uma Shankar (2):
drm/i915/display/tgl
Implement plane CSC for ICL+
Signed-off-by: Uma Shankar
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 5 +-
drivers/gpu/drm/i915/display/intel_color.c| 82 +++
.../drm/i915/display/skl_universal_plane.c| 4 +
drivers/gpu/drm/i915/i915_reg.h | 1
. It can then set one of
the modes using this enum property.
Lut values will be sent through a separate GAMMA_LUT blob property.
Signed-off-by: Uma Shankar
Signed-off-by: Bhanuprakash Modem
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_color_mgmt.c | 26
Add Plane Gamma Lut as a blob property.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic_state_helper.c | 3 +++
drivers/gpu/drm/drm_atomic_uapi.c | 10 ++
drivers/gpu/drm/drm_color_mgmt.c | 18 ++
include/drm/drm_plane.h | 14
and
also the range of gamma mode supported with number of lut
coefficients. It can then set one of the modes using this
enum property.
Lut values will be sent through separate GAMMA_LUT blob property.
Signed-off-by: Uma Shankar
---
Documentation/gpu/drm-kms.rst | 90
Define the structure with XE_LPD degamma lut ranges. HDR and SDR
planes have different capabilities, implemented respective
structure for the HDR planes.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 52 ++
1 file changed, 52 insertions(+)
diff
Define the structure with XE_LPD gamma lut ranges. HDR and SDR planes
have different capabilities, implemented respective structure for
the HDR planes. Degamma and GAMMA has same Lut caps for SDR planes,
extended the same.
Initialize the mode range caps as well.
Signed-off-by: Uma Shankar
Add macros to define Plane Gamma registers
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 73 +
1 file changed, 73 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a8e35357aea0..2ebc92104f64
Extract the LUT and program plane gamma registers.
Enabled multi segmented lut as well.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 89 ++
drivers/gpu/drm/i915/i915_reg.h| 9 ++-
2 files changed, 94 insertions(+), 4 deletions
Enable plane gamma feature in check callbacks. Decide
based on the user input.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers
macro definitions and enums. This will help
describe multi segmented lut ranges in the hardware.
Signed-off-by: Uma Shankar
---
include/uapi/drm/drm_mode.h | 58 +
1 file changed, 58 insertions(+)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm
Add Plane Degamma Lut as a blob property. User will calculate
the lut values, create the blob and send it to driver using
this property. Lut calculation will be based on the gamma mode
chosen out of the gamma mode exposed.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic_state_helper.c
Add macros to define Plane Degamma registers
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 52 +
1 file changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 24307c49085f..9431913969f3
Enable and initialize plane color features.
Also initialize the color features of HDR planes.
Signed-off-by: Uma Shankar
Signed-off-by: Bhanuprakash Modem
---
drivers/gpu/drm/i915/display/intel_color.c | 22 +-
drivers/gpu/drm/i915/display/intel_color.h | 2 ++
drivers/gpu
Add the Color capabilities of SDR planes.
Signed-off-by: Uma Shankar
Signed-off-by: Bhanuprakash Modem
---
drivers/gpu/drm/i915/display/intel_color.c | 67 --
1 file changed, 63 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b
Load plane color luts as part of atomic plane updates.
This will be done only if the plane color luts are changed.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 +++
drivers/gpu/drm/i915/display/intel_atomic_plane.h | 1 +
drivers/gpu/drm/i915/display
Add a blob property for plane CSC usage.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic_state_helper.c | 3 +++
drivers/gpu/drm/drm_atomic_uapi.c | 10 ++
drivers/gpu/drm/drm_color_mgmt.c | 11 +++
include/drm/drm_plane.h | 15
Add a DRM helper to attach ctm property.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_color_mgmt.c | 10 ++
include/drm/drm_plane.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index
Define Register macros for plane CSC.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 43 +
1 file changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ede7dca440e2..df8500a86e9d 100644
Extract the LUT and program plane degamma registers.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 116 +
drivers/gpu/drm/i915/i915_reg.h| 2 +
2 files changed, 118 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
Extended glk_plane_color_ctl to have plane color checks. This helps
enabling the degamma or gamma block based on user inputs.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
Initialize plane color features for XE_LPD.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_atomic_plane.h | 1 +
drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b
and idea.
Note: Userspace support for this new UAPI will be done on Chrome. We
will notify the list once we have that ready for review.
ToDo: State readout for this feature will be added next.
Uma Shankar (21):
drm: Add Enhanced Gamma and color lut range attributes
drm: Add Plane Degamma Mode
This defines the color lut ranges for logarithmic gamma which
is being introduced from XE_LPD onwards.
Signed-off-by: Uma Shankar
Signed-off-by: Bhanuprakash Modem
---
drivers/gpu/drm/i915/display/intel_color.c | 250 -
1 file changed, 246 insertions(+), 4 deletions
Only Enable Logarithmic Gamma if client caps for advance gamma mode
is enabled. Fallback to 10bit gamma in case its not supported.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers
Attach the gamma mode property to allow userspace set the gamma mode
and provide the luts for the same.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm
-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic_uapi.c | 5 +++
drivers/gpu/drm/drm_color_mgmt.c | 75 +++
include/drm/drm_color_mgmt.h | 8
include/drm/drm_crtc.h| 14 ++
include/uapi/drm/drm_mode.h | 43 ++
5 files changed
Enable Pipe Degamma for XE_LPD. Extend the legacy implementation
to incorparate the extended lut size for XE_LPD.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915
-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
drivers/gpu/drm/drm_ioctl.c | 5 +
include/drm/drm_atomic.h | 1 +
include/drm/drm_crtc.h| 8
include/drm/drm_file.h| 8
include/uapi/drm/drm.h| 8
6
XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
extended range. It has 511 entries for gamma with additional 2 entries
for extended range.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Enable support for Logarithmic gamma readout for XE_LPD.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 72 ++
drivers/gpu/drm/i915/i915_reg.h| 6 ++
2 files changed, 78 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
for this new UAPI will be done on Chrome and
plan is to get this supported on mutter as well. We will notify the
list once we have that ready for review.
Uma Shankar (9):
drm: Add gamma mode property
drm/i915/xelpd: Define color lut range structure
drm/i915/xelpd: Add support for Logarithmic gamma
XE_LPD hardware introduced a new gamma mode i.e, Logarithmic
gamma mode. Added support for the same.
Signed-off-by: Uma Shankar
Signed-off-by: Bhanuprakash Modem
---
drivers/gpu/drm/i915/display/intel_color.c | 111 -
drivers/gpu/drm/i915/i915_reg.h| 1
On XELPD platforms, color management support is not yet enabled.
Fix wrongly reporting the same through platform info, which was
resulting in incorrect initialization and usage.
Cc: Swati Sharma
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_pci.c | 2 +-
1 file changed, 1 insertion
Lane Reversal is required for some of the DDI ports. This information
is populated in VBT and driver should read the same and set the
polarity while enabling the port. This patch handles the same.
It helps fix a display blankout issue on DP ports on certain
platforms.
Signed-off-by: Uma Shankar
macro definitions and enums. This will help
describe multi segmented lut ranges in the hardware.
Signed-off-by: Uma Shankar
---
include/uapi/drm/drm_mode.h | 58 +
1 file changed, 58 insertions(+)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm
Define the structure with XE_LPD degamma lut ranges. HDR and SDR
planes have different capabilities, implemented respective
structure for the HDR planes.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 52 ++
1 file changed, 52 insertions(+)
diff
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