On Wed, Oct 09, 2013 at 06:09:17AM -0400, Will Deacon wrote:
> On Tue, Oct 08, 2013 at 07:43:50PM +0100, Rob Herring wrote:
> > On 10/08/2013 11:59 AM, Will Deacon wrote:
> > > On Tue, Oct 08, 2013 at 05:40:21PM +0100, Andreas Herrmann wrote:
> > >> On Tue, Oct 08, 2013 at 05:20:08PM +0200, Andreas
On Tue, Oct 08, 2013 at 12:59:20PM -0400, Will Deacon wrote:
> On Tue, Oct 08, 2013 at 05:40:21PM +0100, Andreas Herrmann wrote:
> > On Tue, Oct 08, 2013 at 05:20:08PM +0200, Andreas Herrmann wrote:
> > To be more specific: For SATA I'd need to specify 10 StreamIds. This
> > would
> >
> > (1) exce
Try to determine a mask that can be used for all StreamIDs of a master
device. This allows to use just one SMR group instead of
number-of-streamids SMR groups for a master device.
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c | 79 --
At the moment just handle BUS_NOTIFY_BIND_DRIVER to conditionally
isolate all master devices for an SMMU.
Depending on DT information each device is put into its own protection
domain (if possible). For configuration with one or just a few
masters per SMMU that is easy to achieve.
In case of man
This patch adds descriptions fore new properties of device tree
binding for the ARM SMMU architecture. These properties control
arm-smmu driver options.
Cc: Rob Herring
Cc: Grant Likely
Cc: Will Deacon
Signed-off-by: Andreas Herrmann
---
.../devicetree/bindings/iommu/arm,smmu.txt |
Ie. use a mask based on smr_mask_bits to map all stream IDs of an SMMU
to one context.
This behaviour is controlled per SMMU node with DT property
"arm,smmu-mask-stream-ids" and is only allowed if just a single master
is attached to an SMMU. If the option is specified, all stream-ids
that are prov
Hi,
Here is v2 of arm-smmu changes to support SMMUs on Calxeda ECX-2000.
Note that patch 7/7 (Introduce automatic stream-id-masking) is not
required to support SMMUs on Calxeda ECX-2000. In fact the algorithm
implemented won't help to determine a suitable smr-mask for 10
StreamIDs that we have fo
Introduce handling of driver options. Options are set based on DT
information when probing an SMMU device. The first option introduced
is "arm,smmu-isolate-devices". (It will be used in the bus notifier
block.)
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c | 36 +
In such a case we have to use secure aliases of some non-secure
registers.
This handling is switched on by DT property
"arm,smmu-secure-config-access" for an SMMU node.
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c | 30 +-
1 file changed, 21 inserti
Signed-off-by: Andreas Herrmann
---
arch/arm/boot/dts/ecx-2000.dts| 45 +++--
arch/arm/boot/dts/ecx-common.dtsi |9 +---
2 files changed, 49 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
in
Factor out PCI specific code in the PAMU driver.
Signed-off-by: Varun Sethi
---
drivers/iommu/fsl_pamu_domain.c | 81 +++
1 file changed, 40 insertions(+), 41 deletions(-)
diff --git a/drivers/iommu/fsl_pamu_domain.c b/drivers/iommu/fsl_pamu_domain.c
index
Once the PCIe device assigned to a guest VM (via VFIO) gets detached from the
iommu domain
(when guest terminates), its PAMU table entry is disabled. So, this would
prevent the device
from being used once it's assigned back to the host.
This patch allows for creation of a default DMA window corr
Hi Joerg,
Please pull these ARM SMMU updates for 3.13. The bulk of the changes are
from Andreas, who has been having fun running the driver on real hardware. I
expect some additional patches from him in the future to add support for
things like device isolation once we've ironed out the wrinkles i
On Tue, Oct 08, 2013 at 07:43:50PM +0100, Rob Herring wrote:
> On 10/08/2013 11:59 AM, Will Deacon wrote:
> > On Tue, Oct 08, 2013 at 05:40:21PM +0100, Andreas Herrmann wrote:
> >> On Tue, Oct 08, 2013 at 05:20:08PM +0200, Andreas Herrmann wrote:
> >> To be more specific: For SATA I'd need to speci
The BUG_ON in drivers/iommu/intel-iommu.c:785 can be triggered from userspace
via
VFIO by calling the VFIO_IOMMU_MAP_DMA ioctl on a vfio device with any address
beyond the addressing capabilities of the IOMMU. The problem is that the ioctl
code
calls iommu_iova_to_phys before it calls iommu_map.
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