Hello Joerg Roedel,
This is a semi-automatic email about new static checker warnings.
The patch 9648cbc9625b: "iommu/arm-smmu: Make use of the
iommu_register interface" from Feb 1, 2017, leads to the following
Smatch complaint:
drivers/iommu/arm-smmu-v3.c:1810 arm_smmu_remove_device()
On Tue, Feb 07, 2017 at 02:40:28AM -0600, Suravee Suthikulpanit wrote:
> From: Suravee Suthikulpanit
>
> This patch series modifies the existing IOMMU and Perf drivers to support
> systems with multiple IOMMUs by allocating an amd_iommu PMU per IOMMU
> instance.
> This allows users to specify pe
On Wed, Feb 15, 2017 at 02:13:29PM +0700, Suravee Suthikulpanit wrote:
> > So you can define a static struct pmu in the driver and do struct
> > assignment directly instead of writing them one-by-one.
>
> I believe this is the same suggestion you have made in V8.
Here's what I mean:
---
diff --g
On Wed, Feb 15, 2017 at 11:44:24AM +0100, Jiri Olsa wrote:
> does it say unsupported when you omit -a?
Yeah, it does dump the event name like it was counting but then it says
. For example:
amd_iommu_0/...
> [jolsa@krava perf]$ ./perf stat -e 'cpu/cpu-cycles/'
^
Haha, I ch
There is already helper functions to do 64-bit I/O on 32-bit machines or
buses, thus we don't need to reinvent the wheel.
Signed-off-by: Andy Shevchenko
---
include/linux/intel-iommu.h | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/include/linux/intel-iom
By default CONFIG_INTEL_IOMMU_DEFAULT_ON is not set and thus
dmar_disabled variable is set.
Intel IOMMU driver based on above doesn't set intel_iommu_enabled
variable.
The commit b0119e870837 ("iommu: Introduce new 'struct iommu_device'")
mistakenly assumes it never happens and tries to unregiste
There is no need to have a temporary variable.
Signed-off-by: Andy Shevchenko
---
drivers/iommu/dmar.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 322765a0a210..24bb0fcca860 100644
--- a/drivers/iommu/dmar.c
Usual patter when we check for return code, which might be negative
errno, is either ret or !ret.
Remove extra ' != 0' from condition.
Signed-off-by: Andy Shevchenko
---
drivers/iommu/dmar.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/dmar.c b/drivers/iommu
There is no need to assign ret to 0 in some cases. Moreover it might
shadow some errors in the future.
Remove such assignments.
Signed-off-by: Andy Shevchenko
---
drivers/iommu/dmar.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dm
There is inconsistency in return codes across the functions called from
detect_intel_iommu().
Make it consistent and propagate return code to the caller.
Signed-off-by: Andy Shevchenko
---
drivers/iommu/dmar.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/d
On Wed, 2017-02-15 at 16:42 +0200, Andy Shevchenko wrote:
> There is inconsistency in return codes across the functions called
> from
> detect_intel_iommu().
>
> Make it consistent and propagate return code to the caller.
> @@ -911,10 +911,9 @@ int __init detect_intel_iommu(void)
> }
>
On Wed, Feb 15, 2017 at 11:13:23AM +0100, Borislav Petkov wrote:
> On Tue, Feb 07, 2017 at 02:40:28AM -0600, Suravee Suthikulpanit wrote:
> > From: Suravee Suthikulpanit
> >
> > This patch series modifies the existing IOMMU and Perf drivers to support
> > systems with multiple IOMMUs by allocatin
On Tue, 14 Feb 2017 22:53:35 -0500
ok...@codeaurora.org wrote:
> On 2017-02-14 18:51, Alex Williamson wrote:
> > On Tue, 14 Feb 2017 16:25:22 -0500
> > Sinan Kaya wrote:
> >
> >> The ACS requirement has been obscured in the current code and is only
> >> known by certain individuals who happen
Declare pr_fmt for perf/amd_iommu and remove unnecessary pr_debug.
Also check return value when _init_events_attrs fails.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 20
1 file changed, 8 insertions(+), 12
From: Suravee Suthikulpanit
This patch series modifies the existing IOMMU and Perf drivers to support
systems with multiple IOMMUs by allocating an amd_iommu PMU per IOMMU instance.
This allows users to specify performance events and filters separately for each
IOMMU.
This has been tested on the
From: Suravee Suthikulpanit
Clean up coding style and fix a bug in the 64-bit register read
logic since it overwrites the upper 32-bit when reading the lower 32-bit.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd_iommu_init.c | 13 -
1 file changed, 8 insertions(+), 5 d
Fix coding style and make use of GENMASK_ULL macro.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Cc: Joerg Roedel
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/
Introduce amd_iommu_get_num_iommus(), which returns the value of
amd_iommus_present. The function is used to replace direct access to
the variable, which is now declared as static.
This function will also be used by Perf AMD IOMMU driver.
Cc: Borislav Petkov
Cc: Joerg Roedel
Signed-off-by: Sura
From: Suravee Suthikulpanit
Clean up register initializaton and make use of BIT_ULL(x)
where appropriate. This should not affect logic and functionality.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 18 +-
1 fil
Currently, amd_iommu_pc_get_max_[banks|counters]() use end-point
device ID to locate an IOMMU and check the reported max banks/counters.
The logic assumes that the IOMMU_BASE_DEVID belongs to the first IOMMU,
and uses it to acquire a reference to the first IOMMU, which does not work
on certain syst
From: Suravee Suthikulpanit
The current amd_iommu_pc_get_set_reg_val() cannot support multiple IOMMUs.
So, modify it to allow callers to specify IOMMU. This prepares the driver
for supporting multi-IOMMU in subsequent patch.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Cc: Joerg Roedel
Signed-off-
From: Suravee Suthikulpanit
Add multi-IOMMU support for perf by exposing an AMD IOMMU PMU
for each IOMMU found in the system via:
/bus/event_source/devices/amd_iommu_x
where x is the IOMMU index. This allows users to specify
different events to be programmed onto performance counters
of each
From: Suravee Suthikulpanit
Introduce static amd_iommu_attr_groups to simplify the
sysfs attributes initialization code.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 81 ++---
1 file chan
On 2/15/2017 2:36 PM, Alex Williamson wrote:
> On Tue, 14 Feb 2017 22:53:35 -0500
> ok...@codeaurora.org wrote:
>
>> On 2017-02-14 18:51, Alex Williamson wrote:
>>> On Tue, 14 Feb 2017 16:25:22 -0500
>>> Sinan Kaya wrote:
>>>
The ACS requirement has been obscured in the current code and i
I want to re-use some of these for qcom_iommu, which has (roughly) the
same context-bank registers.
Signed-off-by: Rob Clark
---
drivers/iommu/arm-smmu-regs.h | 225 ++
drivers/iommu/arm-smmu.c | 200 +
2 files chan
An iommu driver for Qualcomm "B" family devices which do not completely
implement the ARM SMMU spec. These devices have context-bank register
layout that is similar to ARM SMMU, but no global register space (or at
least not one that is accessible).
Signed-off-by: Rob Clark
---
Feel free to bikes
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