> -Original Message-
> From: h...@lst.de
> Sent: Monday, October 28, 2019 2:38 PM
>
> On Thu, Oct 24, 2019 at 12:41:41PM +, Laurentiu Tudor wrote:
> > From: Laurentiu Tudor
> >
> > Introduce a few new dma unmap and sync variants that, on top of the
> > original variants, return th
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, which share
data conten
On Mon, Oct 28, 2019 at 3:20 PM Will Deacon wrote:
>
> Hi Rob,
>
> On Mon, Oct 07, 2019 at 01:49:06PM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > When games, browser, or anything using a lot of GPU buffers exits, there
> > can be many hundreds or thousands of buffers to unmap and free. I
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, whi
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) is
a kernel module targets to provide Shared Virtual Addressing (SVA)
between the accelerator and process.
This patch add document to explain how it works.
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Sig
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 253 ++--
drivers/crypto/hisilicon/qm.h | 13 +-
drivers/crypto/hisilicon/zip/zip_main.c | 39 ++---
i
> From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> Sent: Tuesday, October 29, 2019 12:03 AM
>
> On Mon, 28 Oct 2019 06:03:36 +
> "Tian, Kevin" wrote:
>
> > > > > + .sva_bind_gpasid= intel_svm_bind_gpasid,
> > > > > + .sva_unbind_gpasid = intel_svm_unbind_gpasid,
On Mon, Oct 28, 2019 at 10:59 AM Vladimir Murzin
wrote:
>
> @Daniele, it'd be handy to know if that fix issue for you...
>
Apologies, I've been traveling for the last few days and haven't
managed to try it yet.
I'll do it later today though and let you know.
Regards,
Daniele
___
On Mon, Oct 28, 2019 at 10:51:53PM +, Robin Murphy wrote:
> On 2019-10-28 10:38 pm, Rob Clark wrote:
> > On Mon, Oct 28, 2019 at 3:20 PM Will Deacon wrote:
> > > On Mon, Oct 07, 2019 at 01:49:06PM -0700, Rob Clark wrote:
> > > > From: Rob Clark
> > > >
> > > > When games, browser, or anythin
On Tue, 29 Oct 2019 07:57:21 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Tuesday, October 29, 2019 12:03 AM
> >
> > On Mon, 28 Oct 2019 06:03:36 +
> > "Tian, Kevin" wrote:
> >
> > > > > > + .sva_bind_gpasid= intel_svm_bind_gpa
On Tue, Oct 29, 2019 at 9:43 AM Daniele Alessandrelli
wrote:
>
> On Mon, Oct 28, 2019 at 10:59 AM Vladimir Murzin
> wrote:
> >
> > @Daniele, it'd be handy to know if that fix issue for you...
> >
>
> Apologies, I've been traveling for the last few days and haven't
> managed to try it yet.
>
> I'l
On Fri, 25 Oct 2019 06:19:29 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > From: Lu Baolu
> >
> > Enabling IOMMU in a guest requires communication with the host
> > driver for certain aspects. Use of PAS
> From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> Sent: Wednesday, October 30, 2019 12:12 AM
>
> On Tue, 29 Oct 2019 07:57:21 +
> "Tian, Kevin" wrote:
>
> > > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > > Sent: Tuesday, October 29, 2019 12:03 AM
> > >
> > > On Mon, 28
> From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> Sent: Wednesday, October 30, 2019 1:15 AM
> > >
> > > From: Lu Baolu
> > >
> > > Enabling IOMMU in a guest requires communication with the host
> > > driver for certain aspects. Use of PASID ID to enable Shared Virtual
> > > Addressing (SV
> From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> Sent: Tuesday, October 29, 2019 12:11 AM
>
> On Mon, 28 Oct 2019 06:06:33 +
> "Tian, Kevin" wrote:
>
> > > >>> + /* PASID based dev TLBs, only support all PASIDs or single
> > > >>> PASID */
> > > >>> + {1, 1, 0},
> > > >>
> >
On Tue, 29 Oct 2019 18:52:01 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Tuesday, October 29, 2019 12:11 AM
> >
> > On Mon, 28 Oct 2019 06:06:33 +
> > "Tian, Kevin" wrote:
> >
> > > > >>> + /* PASID based dev TLBs, only support all P
Now that the vmap area checks are being performed in the DMA
infrastructure directly, there is no need to repeat them in USB.
Signed-off-by: Kees Cook
---
drivers/usb/core/hcd.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/h
As we've seen from USB and other areas[1], we need to always do runtime
checks for DMA operating on memory regions that might be remapped. This
adds vmap checks (similar to those already in USB but missing in other
places) into dma_map_single() so all callers benefit from the checking.
[1] https:/
v4: use dev_WARN_ONCE() and improve report string (gregkh, robin)
v3: https://lore.kernel.org/lkml/20191010222829.21940-1-keesc...@chromium.org
v2: https://lore.kernel.org/lkml/201910041420.F6E55D29A@keescook
v1: https://lore.kernel.org/lkml/201910021341.7819A660@keescook
Duplicating patch 1 commi
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