Hi,
Broadcom ethernet tg3 unusable after commit 92d420ec028d ("iommu/amd: Relax
locking in dma_ops path").
After a short period it stops:
[ 122.717144] WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:303
dev_watchdog+0x237/0x240()
[ 122.717152] NETDEV WATCHDOG: enp3s0 (tg3): transmit queue 0
Most of the devices in OMAP family of SoCs are not using IOMMU. The
patch for converting the OMAP IOMMU to use generic IOMMU bus probe
functionality failed to add a check for this, so add it here.
Fixes: c822b37cac48 ("iommu/omap: Remove orphan_dev tracking")
Reported-by: Tomi Valkeinen
Signed-of
There is a generic, kernel wide configuration symbol for enabling the
IOMMU specific bits: CONFIG_IOMMU_API. Implementations (including
INTEL_IOMMU driver) select it so use it here as well.
This makes the conditional archdata.iommu field consistent with other
platforms and also fixes any compile
There is a generic, kernel wide configuration symbol for enabling the
IOMMU specific bits: CONFIG_IOMMU_API. Implementations (including
INTEL_IOMMU and AMD_IOMMU driver) select it so use it here as well.
This makes the conditional archdata.iommu field consistent with other
platforms and also fixe
On 24/04/2020 17:58, Tero Kristo via iommu wrote:
The fwnode pointer must be passed to the iommu core, so that the core
can map the IOMMU towards device requests properly. Without this, some
IOMMU clients like OMAP remoteproc will fail the iommu configuration
multiple times with -EPROBE_DEFER, wh
On Fri, May 15, 2020 at 08:23:13PM +0100, Robin Murphy wrote:
> But that's not what this is; this is (supposed to be) the exact same "don't
> actually perform the attach yet" logic as before, just restricting it to
> default domains in the one place that it actually needs to be, so as not to
> fund
On Mon, May 18, 2020 at 05:06:45PM +0800, Kai-Heng Feng wrote:
> Particularly, as soon as the spinlock is removed, the issue can be reproduced.
> Function domain_flush_complete() doesn't seem to affect the status.
>
> However, the .map_page callback was removed by be62dbf554c5
> ("iommu/amd: Conve
Hi Tero,
On Mon, May 18, 2020 at 02:10:57PM +0300, Tero Kristo wrote:
> Most of the devices in OMAP family of SoCs are not using IOMMU. The
> patch for converting the OMAP IOMMU to use generic IOMMU bus probe
> functionality failed to add a check for this, so add it here.
>
> Fixes: c822b37cac48
On Sat, May 16, 2020 at 02:20:43PM +0800, Lu Baolu wrote:
> Jacob Pan (9):
> iommu/vt-d: Move domain helper to header
> iommu/vt-d: Use a helper function to skip agaw for SL
> iommu/vt-d: Add nested translation helper function
> iommu/vt-d: Add bind guest PASID support
> iommu/vt-d: Suppo
On Fri, Apr 24, 2020 at 05:58:28PM +0300, Tero Kristo wrote:
> The fwnode pointer must be passed to the iommu core, so that the core
> can map the IOMMU towards device requests properly. Without this, some
> IOMMU clients like OMAP remoteproc will fail the iommu configuration
> multiple times with
On Fri, May 15, 2020 at 04:08:43PM +0800, Yong Wu wrote:
> The MediaTek V1 IOMMU is arm32 whose default domain type is
> IOMMU_DOMAIN_UNMANAGED. Add this to satisfy the bus_iommu_probe to
> enter "probe_finalize".
>
> The iommu framework will create a iommu domain for each a device.
> But all the
Hi,
On Mon, May 18, 2020 at 02:51:20PM +0800, Yong Wu wrote:
> below is my local patch. split "dma_attach" to attach_device and
> probe_finalize. About attach_device, Use the existed
> __iommu_attach_group instead. Then rename from the "dma_attach" to
> "probe_finalize" to do the probe_finalize jo
> On May 18, 2020, at 21:32, Joerg Roedel wrote:
>
> On Mon, May 18, 2020 at 05:06:45PM +0800, Kai-Heng Feng wrote:
>> Particularly, as soon as the spinlock is removed, the issue can be
>> reproduced.
>> Function domain_flush_complete() doesn't seem to affect the status.
>>
>> However, the .
On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
will not be correctly reflected, causing the system to go into a bad
state. Add it as an optional clock, so that platforms that have this
clock can pass it over
Looks good for me, patch is:
Reviewed-by: Qiang Yu
Regards,
Qiang
On Wed, May 13, 2020 at 9:33 PM Marek Szyprowski
wrote:
>
> The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
> returns the number of the created entries in the DMA address space.
> However the subsequent
On Fri, May 15, 2020 at 12:05:39PM -0700, Doug Anderson wrote:
> On Fri, May 1, 2020 at 3:30 AM Sharat Masetty wrote:
> >
> > This patch simply adds a new compatible string for SC7180 platform.
> >
> > Signed-off-by: Sharat Masetty
> > ---
> > Documentation/devicetree/bindings/iommu/arm,smmu.yam
On Thu, Apr 09, 2020 at 05:33:47PM -0600, Jordan Crouse wrote:
> Add support to enable TTBR1 if the domain requests it via the
> DOMAIN_ATTR_SPLIT_TABLES attribute. If enabled by the hardware
> and pagetable configuration the driver will configure the TTBR1 region
> and program the domain pagetable
On Wed, Mar 18, 2020 at 04:43:07PM -0700, Rob Clark wrote:
> On Wed, Mar 18, 2020 at 3:48 PM Will Deacon wrote:
> > On Tue, Jan 28, 2020 at 03:16:06PM -0700, Jordan Crouse wrote:
> > > Support auxiliary domains for arm-smmu-v2 to initialize and support
> > > multiple pagetables for a single SMMU c
> On May 18, 2020, at 22:05, Kai-Heng Feng wrote:
>
>
>
>> On May 18, 2020, at 21:32, Joerg Roedel wrote:
>>
>> On Mon, May 18, 2020 at 05:06:45PM +0800, Kai-Heng Feng wrote:
>>> Particularly, as soon as the spinlock is removed, the issue can be
>>> reproduced.
>>> Function domain_flush_c
On Fri, May 15, 2020 at 12:44:01PM +0200, Jean-Philippe Brucker wrote:
> The new pci_ats_supported() function checks if a device supports ATS and
> is allowed to use it.
>
> Signed-off-by: Jean-Philippe Brucker
> ---
> I dropped the Ack because I slightly changed the patch to keep the
> fwspec ch
On Mon, May 11, 2020 at 11:30:08AM -0600, Jordan Crouse wrote:
> On Fri, May 08, 2020 at 08:40:40AM -0700, Rob Clark wrote:
> > On Fri, May 8, 2020 at 8:32 AM Rob Clark wrote:
> > >
> > > On Thu, May 7, 2020 at 5:54 AM Will Deacon wrote:
> > > >
> > > > On Thu, May 07, 2020 at 11:55:54AM +0100, R
On Fri, 2020-05-15 at 10:19 -0700, Raj, Ashok wrote:
> Hi Christoph
>
> On Fri, May 15, 2020 at 08:43:51AM -0700, Christoph Hellwig wrote:
> > Can you please lift the untrusted flag into struct device? It really
> > isn't a PCI specific concept, and we should not have code poking into
> > pci_dev
On Mon, May 18, 2020 at 8:18 AM Will Deacon wrote:
>
> On Wed, Mar 18, 2020 at 04:43:07PM -0700, Rob Clark wrote:
> > On Wed, Mar 18, 2020 at 3:48 PM Will Deacon wrote:
> > > On Tue, Jan 28, 2020 at 03:16:06PM -0700, Jordan Crouse wrote:
> > > > Support auxiliary domains for arm-smmu-v2 to initia
On Mon, May 18, 2020 at 04:47:17PM +0100, David Woodhouse wrote:
> On Fri, 2020-05-15 at 10:19 -0700, Raj, Ashok wrote:
> > Hi Christoph
> >
> > On Fri, May 15, 2020 at 08:43:51AM -0700, Christoph Hellwig wrote:
> > > Can you please lift the untrusted flag into struct device? It really
> > > isn'
On Fri, May 15, 2020 at 08:43:51AM -0700, Christoph Hellwig wrote:
> Can you please lift the untrusted flag into struct device? It really
> isn't a PCI specific concept, and we should not have code poking into
> pci_dev all over the iommu code.
I suppose that could go in a separate series once ot
Hi Baolu,
On Sat, May 16, 2020 at 02:20:43PM +0800, Lu Baolu wrote:
> Jacob Pan (9):
> iommu/vt-d: Move domain helper to header
> iommu/vt-d: Use a helper function to skip agaw for SL
> iommu/vt-d: Add nested translation helper function
> iommu/vt-d: Add bind guest PASID support
> iommu/
Hi,
On Mon, May 18, 2020 at 7:39 AM Will Deacon wrote:
>
> On Fri, May 15, 2020 at 12:05:39PM -0700, Doug Anderson wrote:
> > On Fri, May 1, 2020 at 3:30 AM Sharat Masetty
> > wrote:
> > >
> > > This patch simply adds a new compatible string for SC7180 platform.
> > >
> > > Signed-off-by: Shara
On Mon May 18 20, Joerg Roedel wrote:
On Fri, May 15, 2020 at 08:23:13PM +0100, Robin Murphy wrote:
But that's not what this is; this is (supposed to be) the exact same "don't
actually perform the attach yet" logic as before, just restricting it to
default domains in the one place that it actual
On Fri, 8 May 2020 09:49:55 +0800, Chen Zhou wrote:
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/iommu/arm-smmu-v3.c:2989:26:
> warning: variable ‘smmu’ set but not used [-Wunused-but-set-variable]
> struct arm_smmu_device *smmu;
Applied to will (for-joerg/arm-smmu/updates), tha
On Mon, 11 May 2020 23:25:32 +0530, Sibi Sankar wrote:
> The modem remote processor has two access paths to DDR. One path is
> directly connected to DDR and another path goes through an SMMU. The
> SMMU path is configured to be a direct mapping because it's used by
> various peripherals in the mode
On Wed, 13 May 2020 13:02:57 +0200, Jean-Philippe Brucker wrote:
> Some SMMUv3 implementation embed the Perf Monitor Group Registers (PMCG)
> inside the first 64kB region of the SMMU. Since PMCG are managed by a
> separate driver, this layout causes resource reservation conflicts
> during boot.
>
Pointers should be casted to unsigned long to avoid "cast from pointer
to integer of different size" warnings.
drivers/iommu/intel-pasid.c:818:6: warning:
cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/iommu/intel-pasid.c:821:9: warning:
cast from pointer to
On Mon 18 May 07:16 PDT 2020, Shawn Guo wrote:
> On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
> will not be correctly reflected, causing the system to go into a bad
> state. Add it as an optional clock,
Hi Joerg,
On 5/19/20 2:50 AM, Joerg Roedel wrote:
Hi Baolu,
On Sat, May 16, 2020 at 02:20:43PM +0800, Lu Baolu wrote:
Jacob Pan (9):
iommu/vt-d: Move domain helper to header
iommu/vt-d: Use a helper function to skip agaw for SL
iommu/vt-d: Add nested translation helper function
iom
tree: https://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git x86/vt-d
head: 69cf449166987d9a041020be6422ee7bf94a7228
commit: 57dbf81f50c82a0ad895a57828ad1ab539785a25 [23/44] iommu/mediatek-v1
Convert to probe/release_device() call-backs
config: arm-allyesconfig (attached as .config)
co
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