Re: Share memory among cells on arm64

On 2018-04-18 21:52, Giovani Gracioli wrote: > Thanks Jan. > > It is working now. the irqchip in the non-root cell was missing. Good to hear! > > I added the following to the non-root cell: > > struct jailhouse_irqchip irqchips[1]; > ... > .vpci_irq_base = 140-32 > ... > > .irqchips = { >

[siemens/jailhouse] 152738: driver: ensure jailhouse is not enabled when VT-X ...

Branch: refs/heads/coverity_scan Home: https://github.com/siemens/jailhouse Commit: 152738bbb72c9f584fe6bc9d618ba72f3354ae84 https://github.com/siemens/jailhouse/commit/152738bbb72c9f584fe6bc9d618ba72f3354ae84 Author: f...@ozog.com Date: 2018-04-12 (Thu, 12 Apr

Re: Share memory among cells on arm64

I realized that I had forgot .num_irqchips = ARRAY_SIZE(config.irqchips) in the non-root cell config. After adding it to the non-root cell config and created the cell, I got the following: irqchip_set_pending(), local_injection = 0, sender (current cpu) = 3 irqchip_set_pending()->

Re: Share memory among cells on arm64

I realized that I had forgot .num_irqchips = ARRAY_SIZE(config.irqchips) in the non-root cell config. After adding it to the non-root cell config and created the cell, I got the following: irqchip_set_pending(), local_injection = 0, sender (current cpu) = 3 irqchip_set_pending()->

Re: Share memory among cells on arm64

I realized that I had forgot .num_irqchips = ARRAY_SIZE(config.irqchips) in the non-root cell config. When I added it to the cell config and created the cell, I got the following: jailhouse cell create zynqmp-zcu102-gic-demo-i irqchip_set_pending(), local_injection = 0, sender (current cpu) = 3

Re: Share memory among cells on arm64

Thanks Jan. So what I should do is to have a different IRQ for the root and non-root cells? The root cell config has the following: ... .vpci_irq_base = 136-32 ... .irqchips = { /* GIC */ { .address = 0xf901, .pin_base = 32,

Re: Jailhouse zynqMP

El miércoles, 18 de abril de 2018, 8:38:43 (UTC+2), J. Kiszka escribió: > > El lunes, 16 de abril de 2018, 14:45:45 (UTC+2), J. Kiszka escribió: > >> On 2018-04-16 14:21, iallende wrote: > >>> El viernes, 13 de abril de 2018, 9:14:46 (UTC+2), J. Kiszka escribió: > On 2018-04-12 15:15,

Re: Jailhouse zynqMP

On 2018-04-17 15:51, allende.ima...@gmail.com wrote: > El lunes, 16 de abril de 2018, 14:45:45 (UTC+2), J. Kiszka escribió: >> On 2018-04-16 14:21, iallende wrote: >>> El viernes, 13 de abril de 2018, 9:14:46 (UTC+2), J. Kiszka escribió: On 2018-04-12 15:15, iallende wrote: > It still

Re: Virtual Network interface in Non-root cell

On 2018-04-17 15:42, a.ku...@matellio.com wrote: > On Tuesday, April 17, 2018 at 5:15:45 PM UTC+5:30, J. Kiszka wrote: >> On 2018-04-17 12:10, a.ku...@matellio.com wrote: >>> Hi all, >>> >>> I am trying to bring virtual network interface for intercell >>> communication, normally in other

Re: Share memory among cells on arm64

On 2018-04-17 15:17, Giovani Gracioli wrote: > It is not completely the same configurations, one is the root-cell and > another one is a bare-metal cell based on the gic-demo. I attached both here. > > I believe the Linux program is correct, because I can see the number of > interrupts