On 2014-04-22 20:43, Gabriel L. Somlo wrote:
On Tue, Apr 22, 2014 at 04:57:32PM +0200, Jan Kiszka wrote:
On 2014-04-22 16:52, gso...@gmail.com wrote:
Signed-off-by: Gabriel Somlo so...@cmu.edu
---
vfio.c gets copied by sync, and it needs vfio.h. I don't think there's
an easy way to #define
On Tue, Apr 22, 2014 at 08:18:04PM +0100, Ben Hutchings wrote:
From: Zoltan Kiss zoltan.k...@citrix.com
commit 36d5fe6a000790f56039afe26834265db0a3ad4c upstream.
skb_zerocopy can copy elements of the frags array between skbs, but it doesn't
orphan them. Also, it doesn't handle errors, so
Dear QEMU, Libvirt, and KVM communities,
We are participating in Google Summer of Code 2014
(http://google-melange.com/) and Outreach Program for Women
(http://opw.gnome.org/). Both programs fund candidates to work on our
open source projects for 12 weeks this summer.
Accepted projects have now
Hello,
My name is Yoann Dandine, I'm in placement for my studies. I'm french, then
my english is not really good but I hope you'll understand.
I have to provide virtual machines for testing the application my company
is working on. I've to test the installation and how it runs on some linux
On 17/04/14 16:40, Jiri Olsa wrote:
On Mon, Mar 24, 2014 at 09:49:00PM +0100, Christian Borntraeger wrote:
From: Alexander Yarygin yary...@linux.vnet.ibm.com
Trace events potentially can have a '-' in their trace system name,
e.g. kvm on s390 defines kvm-s390:* tracepoints.
tools/perf could
I'm trying to virtualize some physical SPARC Solaris machines (mix of
Solaris 2.6, 8,9 10) and am using the latest Qemu 2.0.0 release
(previousl worked with the various rc versions).
With some work, I can *build* a SparcStation5 install of Solaris 2.6
from the install media - provided I use the
On Mon, Apr 21, 2014 at 07:43:50PM +0400, Alexander Yarygin wrote:
SNIP
--- a/tools/perf/tests/parse-events.c
+++ b/tools/perf/tests/parse-events.c
@@ -1346,6 +1346,12 @@ static struct evlist_test test__events[] = {
.name = {cycles,cache-misses,branch-misses}:D,
run_tests always reported 'PASS debug', even when subtests were
failing. Fix that.
Signed-off-by: Andrew Jones drjo...@redhat.com
---
x86/debug.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/x86/debug.c b/x86/debug.c
index 154c7fe4db66d..34e56fbeadc3e 100644
---
On Tue, Apr 22, 2014 at 09:35:07AM -0500, Michael Roth wrote:
Quoting Stefan Hajnoczi (2014-04-22 08:31:08)
On Wed, Apr 02, 2014 at 05:40:23PM -0700, Alex Davis wrote:
and where is their gpg key?
Michael Roth mdr...@linux.vnet.ibm.com is doing releases:
On Wed, Apr 23, 2014 at 6:20 AM, Yoann Dandine yoann.dand...@gmail.com wrote:
Hello,
My name is Yoann Dandine, I'm in placement for my studies. I'm french, then
my english is not really good but I hope you'll understand.
I have to provide virtual machines for testing the application my
On 23/04/14 13:45, Jiri Olsa wrote:
On Mon, Apr 21, 2014 at 07:43:50PM +0400, Alexander Yarygin wrote:
[...]
And a bit of offtopic :)
Apparently, s390 doesn't have syscalls:*, so some of the tests
don't work properly (or maybe I missed something? I set
CONFIG_FTRACE_SYSCALLS
to 'y' in my
On 22/04/14 20:18, Ben Hutchings wrote:
From: Zoltan Kiss zoltan.k...@citrix.com
commit 36d5fe6a000790f56039afe26834265db0a3ad4c upstream.
skb_zerocopy can copy elements of the frags array between skbs, but it doesn't
orphan them. Also, it doesn't handle errors, so this patch takes care of
On Tue, Apr 22, 2014 at 3:18 PM, Ben Hutchings b...@decadent.org.uk wrote:
From: Zoltan Kiss zoltan.k...@citrix.com
commit 36d5fe6a000790f56039afe26834265db0a3ad4c upstream.
skb_zerocopy can copy elements of the frags array between skbs, but it doesn't
orphan them. Also, it doesn't handle
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 04/22/14 07:35, Michael Roth wrote:
Quoting Stefan Hajnoczi (2014-04-22 08:31:08)
On Wed, Apr 02, 2014 at 05:40:23PM -0700, Alex Davis wrote:
and where is their gpg key?
Michael Roth mdr...@linux.vnet.ibm.com is doing releases:
Anthony Liguori aligu...@amazon.com writes:
On 04/22/14 07:35, Michael Roth wrote:
Quoting Stefan Hajnoczi (2014-04-22 08:31:08)
On Wed, Apr 02, 2014 at 05:40:23PM -0700, Alex Davis wrote:
and where is their gpg key?
Michael Roth mdr...@linux.vnet.ibm.com is doing releases:
On 04/18/2014 05:40 PM, Waiman Long wrote:
On 04/18/2014 03:05 PM, Peter Zijlstra wrote:
On Fri, Apr 18, 2014 at 01:52:50PM -0400, Waiman Long wrote:
I am confused by your notation.
Nah, I think I was confused :-) Make the 1 _Q_LOCKED_VAL though, as
that's the proper constant to use.
On Wed, Apr 23, 2014 at 10:23:43AM -0400, Waiman Long wrote:
On 04/18/2014 05:40 PM, Waiman Long wrote:
On 04/18/2014 03:05 PM, Peter Zijlstra wrote:
On Fri, Apr 18, 2014 at 01:52:50PM -0400, Waiman Long wrote:
I am confused by your notation.
Nah, I think I was confused :-) Make the 1
On 04/23/2014 10:56 AM, Konrad Rzeszutek Wilk wrote:
On Wed, Apr 23, 2014 at 10:23:43AM -0400, Waiman Long wrote:
On 04/18/2014 05:40 PM, Waiman Long wrote:
On 04/18/2014 03:05 PM, Peter Zijlstra wrote:
On Fri, Apr 18, 2014 at 01:52:50PM -0400, Waiman Long wrote:
I am confused by your
On Wed, Apr 23, 2014 at 01:43:58PM -0400, Waiman Long wrote:
On 04/23/2014 10:56 AM, Konrad Rzeszutek Wilk wrote:
On Wed, Apr 23, 2014 at 10:23:43AM -0400, Waiman Long wrote:
On 04/18/2014 05:40 PM, Waiman Long wrote:
On 04/18/2014 03:05 PM, Peter Zijlstra wrote:
On Fri, Apr 18, 2014 at
v2:
- filter for TCG at cpu realizefn.
- allow invariant tsc by default with -cpu host.
- fix initialization with multiple vcpus.
--
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Expose Invariant TSC flag, if KVM is enabled. From Intel documentation:
17.13.1 Invariant TSC The time stamp counter in newer processors may
support an enhancement, referred to as invariant TSC. Processorâs
support for invariant TSC is indicated by CPUID.8007H:EDX[8].
The invariant TSC will
Invariant TSC documentation mentions that invariant TSC will run at a
constant rate in all ACPI P-, C-. and T-states.
This is not the case if migration to a host with different TSC frequency
is allowed, or if savevm is performed. So block migration/savevm.
Also do not expose invariant tsc flag
On Wed, Apr 23, 2014 at 08:52:03AM +0300, Michael S. Tsirkin wrote:
HV-APIC-ASSIST MSR is in the list of saved MSRs ...
Restoration of MSR_KVM_PV_EOI_EN is required for migration under
when PVEOI enabled ?
That's what I don't get.
Since after this patch, set of
On Wed, Apr 23, 2014 at 03:20:03PM -0300, Marcelo Tosatti wrote:
Expose Invariant TSC flag, if KVM is enabled. From Intel documentation:
17.13.1 Invariant TSC The time stamp counter in newer processors may
support an enhancement, referred to as invariant TSC. Processor’s
support for
On Wed, Apr 23, 2014 at 03:20:04PM -0300, Marcelo Tosatti wrote:
Invariant TSC documentation mentions that invariant TSC will run at a
constant rate in all ACPI P-, C-. and T-states.
This is not the case if migration to a host with different TSC frequency
is allowed, or if savevm is
On 04/22, Christian Borntraeger wrote:
On 22/04/14 22:15, Christian Borntraeger wrote:
On 21/04/14 15:25, Oleg Nesterov wrote:
async_pf_execute() has no reasons to adopt apf-mm, gup(current, mm)
should work just fine even if current has another or NULL -mm.
Recently
On Tue, Apr 22, 2014 at 09:04:45AM +0300, Nadav Amit wrote:
Gleb,
On 4/20/14, 12:26 PM, Gleb Natapov wrote:
On Fri, Apr 18, 2014 at 07:11:33AM +0300, Nadav Amit wrote:
When using address-size override prefix with string instructions in
long-mode,
ESI/EDI/ECX are zero extended if they are
On Wed, Apr 23, 2014 at 04:58:32PM -0300, Marcelo Tosatti wrote:
On Tue, Apr 22, 2014 at 09:04:45AM +0300, Nadav Amit wrote:
Gleb,
On 4/20/14, 12:26 PM, Gleb Natapov wrote:
On Fri, Apr 18, 2014 at 07:11:33AM +0300, Nadav Amit wrote:
When using address-size override prefix with string
On Fri, Apr 18, 2014 at 02:33:06AM +0300, Nadav Amit wrote:
This series of patches fix various scenarios in which KVM behavior does not
follow x86 specifications. Each patch actually deals with a separate bug.
These bugs can cause the guest to get stuck (i.e., make no progress),
encounter
On 4/23/14, 11:11 PM, Marcelo Tosatti wrote:
On Wed, Apr 23, 2014 at 04:58:32PM -0300, Marcelo Tosatti wrote:
On Tue, Apr 22, 2014 at 09:04:45AM +0300, Nadav Amit wrote:
Gleb,
On 4/20/14, 12:26 PM, Gleb Natapov wrote:
On Fri, Apr 18, 2014 at 07:11:33AM +0300, Nadav Amit wrote:
When using
On 04/23/2014 01:53 PM, Nadav Amit wrote:
Err, operand size is forced to 64-bits, not address size.
The following aspects of near branches are controlled by the effective
operand size:
• Truncation of the size of the instruction pointer
Still, 67h call should not truncate EIP (which your
Invariant TSC documentation mentions that invariant TSC will run at a
constant rate in all ACPI P-, C-. and T-states.
This is not the case if migration to a host with different TSC frequency
is allowed, or if savevm is performed. So block migration/savevm.
Signed-off-by: Marcelo Tosatti
On 04/23/2014 01:55 PM, Konrad Rzeszutek Wilk wrote:
On Wed, Apr 23, 2014 at 01:43:58PM -0400, Waiman Long wrote:
On 04/23/2014 10:56 AM, Konrad Rzeszutek Wilk wrote:
On Wed, Apr 23, 2014 at 10:23:43AM -0400, Waiman Long wrote:
On 04/18/2014 05:40 PM, Waiman Long wrote:
On 04/18/2014 03:05
On 04/23/2014 06:24 PM, Waiman Long wrote:
On 04/23/2014 01:55 PM, Konrad Rzeszutek Wilk wrote:
On Wed, Apr 23, 2014 at 01:43:58PM -0400, Waiman Long wrote:
On 04/23/2014 10:56 AM, Konrad Rzeszutek Wilk wrote:
On Wed, Apr 23, 2014 at 10:23:43AM -0400, Waiman Long wrote:
On 04/18/2014 05:40
This patch series implements split core mode on POWER8. This enables up to 4
subcores per core which can each independently run guests (per guest SPRs like
SDR1, LPIDR etc are replicated per subcore). Lots more documentation on this
feature in the code and commit messages.
Most of this code is
From: Michael Ellerman m...@ellerman.id.au
To support split core we need to change the check in __cpu_up() that
determines if a cpu is allowed to come online.
Currently we refuse to online cpus which are not the primary thread
within their core.
On POWER8 with split core support this check
From: Michael Ellerman m...@ellerman.id.au
As part of the support for split core on POWER8, we want to be able to
block splitting of the core while KVM VMs are active.
The logic to do that would be exactly the same as the code we currently
have for inhibiting onlining of secondaries.
Instead of
From: Michael Ellerman m...@ellerman.id.au
Upcoming POWER8 chips support a concept called split core. This is where
the core can be split into subcores that although not full cores, are
able to appear as full cores to a guest.
The splitting unsplitting procedure is mildly complicated, and
From: Michael Ellerman m...@ellerman.id.au
To support split core on POWER8 we need to modify various parts of the
KVM code to use threads_per_subcore instead of threads_per_core. On
systems that do not support split core threads_per_subcore ==
threads_per_core and these changes are a nop.
We use
From: Michael Ellerman m...@ellerman.id.au
On POWER8 we have a new concept of a subcore. This is what happens when
you take a regular core and split it. A subcore is a grouping of two or
four SMT threads, as well as a handfull of SPRs which allows the subcore
to appear as if it were a core from
From: Michael Ellerman m...@ellerman.id.au
To support split core we need to be able to force all secondaries into
nap, so the core can detect they are idle and do an unsplit.
Currently power7_nap() will return without napping if there is an irq
pending. We want to ignore the pending irq and nap
https://bugzilla.kernel.org/show_bug.cgi?id=74251
robert...@intel.com changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Hi Mikey,
On Thu, Apr 24, 2014 at 11:02 AM, Michael Neuling mi...@neuling.org wrote:
+static DEVICE_ATTR(subcores_per_core, 0600,
+ show_subcores_per_core, store_subcores_per_core);
Can we make this 644, so users can query the state of the system
without being root? This is
Joel Stanley j...@jms.id.au wrote:
Hi Mikey,
On Thu, Apr 24, 2014 at 11:02 AM, Michael Neuling mi...@neuling.org wrote:
+static DEVICE_ATTR(subcores_per_core, 0600,
+ show_subcores_per_core, store_subcores_per_core);
Can we make this 644, so users can query the state of
This patch series implements split core mode on POWER8. This enables up to 4
subcores per core which can each independently run guests (per guest SPRs like
SDR1, LPIDR etc are replicated per subcore). Lots more documentation on this
feature in the code and commit messages.
Most of this code is
From: Michael Ellerman m...@ellerman.id.au
As part of the support for split core on POWER8, we want to be able to
block splitting of the core while KVM VMs are active.
The logic to do that would be exactly the same as the code we currently
have for inhibiting onlining of secondaries.
Instead of
From: Michael Ellerman m...@ellerman.id.au
To support split core on POWER8 we need to modify various parts of the
KVM code to use threads_per_subcore instead of threads_per_core. On
systems that do not support split core threads_per_subcore ==
threads_per_core and these changes are a nop.
We use
From: Michael Ellerman m...@ellerman.id.au
On POWER8 we have a new concept of a subcore. This is what happens when
you take a regular core and split it. A subcore is a grouping of two or
four SMT threads, as well as a handfull of SPRs which allows the subcore
to appear as if it were a core from
From: Michael Ellerman m...@ellerman.id.au
To support split core we need to change the check in __cpu_up() that
determines if a cpu is allowed to come online.
Currently we refuse to online cpus which are not the primary thread
within their core.
On POWER8 with split core support this check
From: Michael Ellerman m...@ellerman.id.au
Upcoming POWER8 chips support a concept called split core. This is where
the core can be split into subcores that although not full cores, are
able to appear as full cores to a guest.
The splitting unsplitting procedure is mildly complicated, and
From: Michael Ellerman m...@ellerman.id.au
To support split core we need to be able to force all secondaries into
nap, so the core can detect they are idle and do an unsplit.
Currently power7_nap() will return without napping if there is an irq
pending. We want to ignore the pending irq and nap
Hi Mikey,
On Thu, Apr 24, 2014 at 11:02 AM, Michael Neuling mi...@neuling.org wrote:
+static DEVICE_ATTR(subcores_per_core, 0600,
+ show_subcores_per_core, store_subcores_per_core);
Can we make this 644, so users can query the state of the system
without being root? This is
Joel Stanley j...@jms.id.au wrote:
Hi Mikey,
On Thu, Apr 24, 2014 at 11:02 AM, Michael Neuling mi...@neuling.org wrote:
+static DEVICE_ATTR(subcores_per_core, 0600,
+ show_subcores_per_core, store_subcores_per_core);
Can we make this 644, so users can query the state of
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