A for these.
Add r4k_fpu.o to handle low level FPU initialization.
Modify octeon_switch.S to save the FPU registers. And include r4k_switch.S to
pick up more FPU support.
Get rid of "#define cpu_has_fpu 0"
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
Cc: linux-m...@li
On 06/26/2014 04:21 PM, James Hogan wrote:
On 26 June 2014 22:55, David Daney wrote:
There is precedence in x86 for some of the names though.
But really why churn up the code in the first place? the kvm_mips
prefix does tell us exactly what we are dealing with.
That's why people cr
On 06/26/2014 12:55 PM, Deng-Cheng Zhu wrote:
On 06/26/2014 12:28 PM, David Daney wrote:
On 06/26/2014 12:11 PM, Deng-Cheng Zhu wrote:
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the
prefixes
"kvm_" and "kvm_mips_".
I don
On 06/26/2014 12:11 PM, Deng-Cheng Zhu wrote:
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the prefixes
"kvm_" and "kvm_mips_".
I don't like this change.
It will leads me to confuse arch/mips/kvm/interrupt.h with
include/linux/interrupt.h
x86 calls t
In cases like this, I always wonder WWPD (What Would Pinski Do)...
Let's get him to opine.
Andrew, the patch in question is:
http://www.linux-mips.org/archives/linux-mips/2014-05/msg00309.html
Thanks,
David Daney
On 06/03/2014 08:03 AM, Andreas Herrmann wrote:
On Tue, Jun 03, 2014 at
On 05/21/2014 06:39 AM, James Hogan wrote:
[...]
diff --git a/arch/mips/paravirt/paravirt-irq.c
b/arch/mips/paravirt/paravirt-irq.c
new file mode 100644
index 000..e1603dd
--- /dev/null
+++ b/arch/mips/paravirt/paravirt-irq.c
[...]
+static void irq_core_set_enable_local(void *arg)
+{
+
On 05/21/2014 03:04 AM, James Hogan wrote:
On 20/05/14 15:47, Andreas Herrmann wrote:
From: David Daney
These are needed to boot a generic mips64r2 kernel on OCTEONIII.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/include/asm/r4kcache.h |2 ++
arch/mips
On 05/20/2014 03:52 PM, James Hogan wrote:
Hi Andreas,
On Tuesday 20 May 2014 16:47:04 Andreas Herrmann wrote:
From: David Daney
CVMSEG is related to the CPU core not the SoC system. So needs to be
configurable there.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch
On 04/25/2014 01:29 PM, James Hogan wrote:
Hi David,
On Friday 25 April 2014 09:44:17 David Daney wrote:
On 04/25/2014 08:19 AM, James Hogan wrote:
Contrary to the comment, the guest CP0_EPC register cannot be set via
kvm_regs, since it is distinct from the guest PC. Add the EPC register
to
u new have two ways to access and
manipulate the same thing.
1) The architecturally specified CP0_COUNT.
2) This new bias thing.
What if we just let userspace directly manipulate the CP0_COUNT, and if
necessary only maintain a bias as an internal implementation detail?
David Daney.
Sig
[...]
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index f56bb699506e..57c1085fd6ab 100644
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -404,8 +404,15 @@ struct kvm_vcpu_arch {
u32 io_gpr; /* GPR used as
On 04/25/2014 08:19 AM, James Hogan wrote:
The hrtimer callback for guest timer timeouts sets the guest's
CP0_Cause.TI bit to indicate to the guest that a timer interrupt is
pending, however there is no mutual exclusion implemented to prevent
this occurring while the guest's CP0_Cause register is
Cc: kvm@vger.kernel.org
Cc: Ralf Baechle
Cc: linux-m...@linux-mips.org
Cc: David Daney
Cc: Sanjay Lal
NACK...
---
arch/mips/kvm/kvm_mips.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index 46cea0bad518
eb Natapov
Cc: kvm@vger.kernel.org
Cc: Ralf Baechle
Cc: linux-m...@linux-mips.org
Cc: David Daney
Cc: Sanjay Lal
---
arch/mips/kvm/kvm_mips.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index 14511138f187..46cea0bad
the patch dependencies/ordering
correct can be tricky.
David Daney
Ralf
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To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
many of these are there kernel wide?
Could you do something like this instead:
DEFINE_AND_EXPORT_GPL(bool, kvm_rebooting);
The definition of DEFINE_AND_EXPORT_GPL(_type, _name) is left as an
exercise for the reader.
David Daney
--
To unsubscribe from this list: send the line "unsubscrib
On 08/05/2013 06:43 AM, Gleb Natapov wrote:
On Mon, Aug 05, 2013 at 03:21:57PM +0200, Ralf Baechle wrote:
On Mon, Aug 05, 2013 at 02:17:01PM +0100, James Hogan wrote:
On 01/08/13 21:22, David Daney wrote:
From: David Daney
No code changes, just reflowing some comments and consistently
From: David Daney
There are:
.setpush
.setnoreorder
.setnoat
.
.
.
.setpop
Sequences all over the place in this file, but in some places the
final ".set pop" is erroneously converted to ".set push&quo
From: David Daney
We need to use more of the Macros in asm.h to allow kvm_locore.S to
build in a 64-bit kernel.
For 32-bit there is no change in the generated object code.
Signed-off-by: David Daney
Acked-by: Ralf Baechle
---
arch/mips/kvm/kvm_locore.S | 54
From: David Daney
No code changes, just reflowing some comments and consistently using
tabs and spaces. Object code is verified to be unchanged.
Signed-off-by: David Daney
Acked-by: Ralf Baechle
---
arch/mips/kvm/kvm_locore.S | 971 +++--
1 file
From: David Daney
These shouldn't be too controversial, they just clean things up
without changing the generated code.
More substantial patches will follow, but it seemed like a good idea
to clean this up first.
David Daney (3):
mips/kvm: Improve code formatting in arch/mips/kvm/kvm_loc
From: David Daney
We use 0x7000ULL as 0x6000ULL is reserved for
ARM64.
Signed-off-by: David Daney
---
include/uapi/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index a5c86fc..d88c8ee 100644
--- a
From: David Daney
The API requires that the GET_ONE_REG and SET_ONE_REG ioctls have this
extra information encoded in the register identifiers.
Signed-off-by: David Daney
---
arch/mips/include/uapi/asm/kvm.h | 81 +++
arch/mips/kvm/kvm_mips.c | 83
From: David Daney
As requested by Gleb Natapov, we need to define and use KVM_REG_MIPS
when using the GET_ONE_REG/SET_ONE_REG ioctl. Since this is part of
the MIPS kvm support that is new in 3.10, it should be merged before a
bad ABI leaks out into an 'official' kernel release.
Davi
On 06/10/2013 09:43 AM, Sanjay Lal wrote:
On Jun 7, 2013, at 4:03 PM, David Daney wrote:
From: David Daney
These patches take a somewhat different approach to MIPS
virtualization via the MIPS-VZ extensions than the patches previously
sent by Sanjay Lal.
Several facts about the code:
o
On 06/09/2013 12:31 AM, Gleb Natapov wrote:
On Fri, Jun 07, 2013 at 04:15:00PM -0700, David Daney wrote:
I should also add that I will shortly send patches for the kvm tool
required to drive this VM as well as a small set of patches that
create a para-virtualized MIPS/Linux guest kernel.
The
On 06/08/2013 04:05 AM, Gleb Natapov wrote:
On Wed, May 22, 2013 at 11:43:55AM -0700, David Daney wrote:
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_SET_ONE_REG/KVM_GET_ONE_REG mechanism.
Now unused
On 06/07/2013 04:34 PM, Sergei Shtylyov wrote:
Hello.
On 06/08/2013 03:03 AM, David Daney wrote:
From: David Daney
If the CPU is operating in guest mode when a TLB related excpetion
occurs, give KVM a chance to do emulation.
Signed-off-by: David Daney
---
arch/mips/mm/fault.c | 8
From: David Daney
These patches take a somewhat different approach to MIPS
virtualization via the MIPS-VZ extensions than the patches previously
sent by Sanjay Lal.
Several facts about the code:
o Existing exception handlers are modified to hook in to KVM instead
of intercepting all
From: David Daney
When building for 64-bits we need these cases to make it build.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips.c | 4 ++--
arch/mips/kvm/kvm_mips_dyntrans.c | 4 ++--
arch/mips/kvm/kvm_mips_emul.c | 2 +-
arch/mips/kvm/kvm_tlb.c | 4 ++--
4
From: David Daney
We cannot clobber any registers on exceptions as any guest will need
them all.
Signed-off-by: David Daney
---
arch/mips/include/asm/mipsregs.h | 2 ++
arch/mips/include/asm/stackframe.h | 15 +++
arch/mips/kernel/cpu-probe.c | 7 ++-
arch/mips
From: David Daney
For a warning free compile, we need to use the width aware PTR_LI and
PTR_LA macros. Use LI variant for immediate data and LA variant for
addresses.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_locore.S | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
From: David Daney
We don't know if we have the r4k specific functions available, so use
universally available __flush_cache_all() instead. This takes longer
as it flushes both i-cache and d-cache, but is available for all CPUs.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips_emul.
that uses a handful of
hypercalls, but mostly just uses virtio devices. It has no emulated
real hardware (no 8250 UART, no emulated legacy anything...)
David Daney
On 06/07/2013 04:03 PM, David Daney wrote:
From: David Daney
These patches take a somewhat different approach to MIPS
From: David Daney
It was a completely inconsistent mix of spaces and tabs.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_locore.S | 921 +++--
1 file changed, 464 insertions(+), 457 deletions(-)
diff --git a/arch/mips/kvm/kvm_locore.S b/arch/mips
From: David Daney
The proper MIPS name for this register is EPC, so use that.
Change the asm-offsets name to KVM_VCPU_ARCH_EPC, so that the symbol
name prefix matches the structure name.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 2 +-
arch/mips/kernel/asm-offsets.c
From: David Daney
The current implementation does nothing with them, but future MIPSVZ
work need them. Also add the asm-offsets accessors for the fields.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 8
arch/mips/kernel/asm-offsets.c | 8
arch/mips
From: David Daney
This makes it follow the pattern where the structure name is the
symbol name prefix.
Signed-off-by: David Daney
---
arch/mips/kernel/asm-offsets.c | 68 +++---
arch/mips/kvm/kvm_locore.S | 206 -
2 files changed, 137
From: David Daney
Currently this is a little complex, here are the facts about how it works:
o When running in Guest mode we set the high bit of CP0_XCONTEXT. If
this bit is clear, we don't do anything special on an exception.
o If we are in guest mode, upon an exception we:
1) loa
From: David Daney
Signed-off-by: David Daney
---
arch/mips/kernel/genex.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 163e299..ce0be96 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -486,6 +486,9
From: David Daney
The kernel's struct pt_regs has many fields conditional on various
Kconfig variables, we cannot be exporting this garbage to user-space.
Move the kernel's definition to asm/ptrace.h, and put a uapi only
version in uapi/asm/ptrace.h gated by #ifndef __KERNEL__
Sig
From: David Daney
There are accessors for both the guest control registers as well as
guest CP0 context.
Signed-off-by: David Daney
---
arch/mips/include/asm/mipsregs.h | 260 +++
1 file changed, 260 insertions(+)
diff --git a/arch/mips/include/asm
From: David Daney
If the CPU is operating in guest mode when a TLB related excpetion
occurs, give KVM a chance to do emulation.
Signed-off-by: David Daney
---
arch/mips/mm/fault.c | 8
arch/mips/mm/tlbex-fault.S | 6 ++
2 files changed, 14 insertions(+)
diff --git a/arch
From: David Daney
We need to move it out of __init so we don't have section mismatch problems.
Signed-off-by: David Daney
---
arch/mips/include/asm/uasm.h | 2 +-
arch/mips/kernel/traps.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/uas
From: David Daney
The new function (part) get_new_asid() can now be used from MIPSVZ code.
Signed-off-by: David Daney
---
arch/mips/include/asm/mmu_context.h | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/mmu_context.h
b/arch/mips/include
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_mips_vz.h | 29 +
1 file changed, 29 insertions(+)
create mode 100644 arch/mips/include/asm/kvm_mips_vz.h
diff --git a/arch/mips/include/asm/kvm_mips_vz.h
b/arch/mips/include/asm
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/thread_info.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/include/asm/thread_info.h
b/arch/mips/include/asm/thread_info.h
index 895320e..a7a894a 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b
From: David Daney
These save the instruction word to be used by MIPSVZ code for
instruction emulation.
Signed-off-by: David Daney
---
arch/mips/include/asm/ptrace.h | 4
arch/mips/kernel/asm-offsets.c | 4
2 files changed, 8 insertions(+)
diff --git a/arch/mips/include/asm/ptrace.h
From: David Daney
Signed-off-by: David Daney
---
arch/mips/kernel/asm-offsets.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 37fd9e2..db09376 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel
From: David Daney
Create the symbol KVM_MIPSTE, and use it to select the trap and
emulate specific things.
Signed-off-by: David Daney
---
arch/mips/kvm/Kconfig | 14 +-
arch/mips/kvm/Makefile | 14 --
2 files changed, 17 insertions(+), 11 deletions(-)
diff --git a
From: David Daney
The forthcoming MIPSVZ code doesn't currently use this, so it must
only be enabled for KVM_MIPSTE.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/includ
From: David Daney
The MIPS VZ KVM code needs this to be able to manage the FPU.
Signed-off-by: David Daney
---
arch/mips/kernel/traps.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index fca0a2f..2bdeb32 100644
--- a/arch/mips
From: David Daney
... and their accessors in asm-offsets.c
Signed-off-by: David Daney
---
arch/mips/include/asm/processor.h | 6 ++
arch/mips/kernel/asm-offsets.c| 5 +
2 files changed, 11 insertions(+)
diff --git a/arch/mips/include/asm/processor.h
b/arch/mips/include/asm
From: David Daney
The mipsvz implementation allows for SMP, so let's be able to create
all those vcpus.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/includ
From: David Daney
Only the trap-and-emulate KVM code needs a Special tlb flusher. All
other configurations should use the regular version.
Signed-off-by: David Daney
---
arch/mips/include/asm/mmu_context.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include
From: David Daney
Also let CPU_CAVIUM_OCTEON select KVM.
Signed-off-by: David Daney
---
arch/mips/Kconfig | 1 +
arch/mips/kvm/Kconfig | 9 +
arch/mips/kvm/Makefile | 1 +
3 files changed, 11 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7a58ab9
From: David Daney
---
arch/mips/include/uapi/asm/inst.h | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/mips/include/uapi/asm/inst.h
b/arch/mips/include/uapi/asm/inst.h
index 0f4aec2..133abc1 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b
From: David Daney
Introduce __compute_return_epc_for_insn0() entry point.
Signed-off-by: David Daney
---
arch/mips/include/asm/branch.h | 7 +
arch/mips/kernel/branch.c | 63 +++---
2 files changed, 54 insertions(+), 16 deletions(-)
diff --git a
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/mipsregs.h | 2 ++
arch/mips/kernel/cpu-probe.c | 29 +
arch/mips/mm/tlbex.c | 20 +---
3 files changed, 32 insertions(+), 19 deletions(-)
diff --git a/arch/mips
On 05/30/2013 10:51 AM, Paolo Bonzini wrote:
Il 30/05/2013 19:07, David Daney ha scritto:
On 05/28/2013 09:34 AM, Paolo Bonzini wrote:
Il 19/05/2013 07:47, Sanjay Lal ha scritto:
- Add API to allow clients (QEMU etc.) to check whether the H/W
supports the MIPS VZ-ASE.
Why does this
y the
desired style
David Daney
Paolo
Signed-off-by: Sanjay Lal
---
include/uapi/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index a5c86fc..5889e976 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -
On 05/23/2013 03:28 AM, Gleb Natapov wrote:
On Wed, May 22, 2013 at 11:43:50AM -0700, David Daney wrote:
From: David Daney
Please regenerate against master. arch/mips/include/asm/kvm.h does not
exists any more.
New patch sent. I gather from this message, that you want to merge this
From: David Daney
Define a non-empty struct kvm_fpu.
Signed-off-by: David Daney
Acked-by: Sanjay Lal
---
arch/mips/include/uapi/asm/kvm.h | 29 +
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/arch/mips/include/uapi/asm/kvm.h b/arch/mips/include
From: David Daney
Signed-off-by: David Daney
Acked-by: Sanjay Lal
---
arch/mips/include/uapi/asm/kvm.h | 3 ++-
arch/mips/kvm/kvm_mips.c | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/mips/include/uapi/asm/kvm.h b/arch/mips/include/uapi/asm/kvm.h
index
From: David Daney
Also we cannot set special zero register, so force it to zero.
Signed-off-by: David Daney
Acked-by: Sanjay Lal
---
arch/mips/kvm/kvm_mips.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index
From: David Daney
All registers are 64-bits wide, 32-bit guests use the least
significant portion of the register storage fields.
Signed-off-by: David Daney
Acked-by: Sanjay Lal
---
arch/mips/include/uapi/asm/kvm.h | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff
From: David Daney
The initial patch set implementing MIPS KVM does not handle 64-bit
guests or use of the FPU. This patch set corrects these ABI issues,
and does some very minor clean up.
Changes from v5: Adjust for kvm.h moving to uapi/asm. Code formatting
to achieve line
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_SET_ONE_REG/KVM_GET_ONE_REG mechanism.
Now unused code and definitions are removed.
Signed-off-by: David Daney
Acked-by: Sanjay Lal
---
arch/mips/include
From: David Daney
The Linux Way is to return -ENOIOCTLCMD to the vfs when an
unimplemented ioctl is requested. Do this in kvm_mips instead of a
random mixture of -ENOTSUPP and -EINVAL.
Signed-off-by: David Daney
Acked-by: Sanjay Lal
---
arch/mips/kvm/kvm_mips.c | 18 +-
1
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 3 ++-
arch/mips/kvm/kvm_mips.c| 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/mips/include/asm/kvm.h b/arch/mips/include/asm/kvm.h
index 86812fb..d145ead 100644
--- a/arch/mips
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_SET_ONE_REG/KVM_GET_ONE_REG mechanism.
Now unused code and definitions are removed.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 91
From: David Daney
Also we cannot set special zero register, so force it to zero.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index 93da750..71a1fc1 100644
From: David Daney
The Linux Way is to return -ENOIOCTLCMD to the vfs when an
unimplemented ioctl is requested. Do this in kvm_mips instead of a
random mixture of -ENOTSUPP and -EINVAL.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips.c | 18 +-
1 file changed, 9
From: David Daney
Define a non-empty struct kvm_fpu.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 29 +
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/arch/mips/include/asm/kvm.h b/arch/mips/include/asm/kvm.h
index 85789ea..0e8f565
From: David Daney
All registers are 64-bits wide, 32-bit guests use the least
significant portion of the register storage fields.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/mips/include
From: David Daney
The initial patch set implementing MIPS KVM does not handle 64-bit
guests or use of the FPU. This patch set corrects these ABI issues,
and does some very minor clean up.
Changes from v4: No code change, just keep more of the code in
kvm_mips.c rather than
On 05/22/2013 10:44 AM, Sanjay Lal wrote:
On May 21, 2013, at 1:54 PM, David Daney wrote:
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_SET_ONE_REG/KVM_GET_ONE_REG mechanism.
Code related to
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 3 ++-
arch/mips/kvm/kvm_mips.c| 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/mips/include/asm/kvm.h b/arch/mips/include/asm/kvm.h
index 86812fb..d145ead 100644
--- a/arch/mips
From: David Daney
Also we cannot set special zero register, so force it to zero.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index 93da750..71a1fc1 100644
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_SET_ONE_REG/KVM_GET_ONE_REG mechanism.
Code related to implementing KVM_SET_ONE_REG/KVM_GET_ONE_REG is
consolidated in to kvm_trap_emul.c, now unused code and
From: David Daney
The Linux Way is to return -ENOIOCTLCMD to the vfs when an
unimplemented ioctl is requested. Do this in kvm_mips instead of a
random mixture of -ENOTSUPP and -EINVAL.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips.c | 18 +-
1 file changed, 9
From: David Daney
Define a non-empty struct kvm_fpu.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 29 +
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/arch/mips/include/asm/kvm.h b/arch/mips/include/asm/kvm.h
index 85789ea..0e8f565
From: David Daney
All registers are 64-bits wide, 32-bit guests use the least
significant portion of the register storage fields.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/mips/include
From: David Daney
The initial patch set implementing MIPS KVM does not handle 64-bit
guests or use of the FPU. This patch set corrects these ABI issues,
and does some very minor clean up.
Chandes from v3: Use KVM_SET_ONE_REG instead of KVM_SET_MSRS. Added
ENOIOCTLCMD patch
On 05/21/2013 09:28 AM, Gleb Natapov wrote:
On Tue, May 21, 2013 at 09:21:06AM -0700, David Daney wrote:
On 05/21/2013 08:37 AM, Gleb Natapov wrote:
On Mon, May 20, 2013 at 02:01:26PM -0700, David Daney wrote:
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need
On 05/21/2013 08:37 AM, Gleb Natapov wrote:
On Mon, May 20, 2013 at 02:01:26PM -0700, David Daney wrote:
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_GET_MSRS/KVM_SET_MSRS mechanism as x86 does for its
From: David Daney
Also we cannot set special zero register, so force it to zero.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index 93da750..71a1fc1 100644
From: David Daney
Define a non-empty struct kvm_fpu.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 29 +
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/arch/mips/include/asm/kvm.h b/arch/mips/include/asm/kvm.h
index 85789ea..0e8f565
From: David Daney
Because not all 256 CP0 registers are ever implemented, we need a
different method of manipulating them. Use the
KVM_GET_MSRS/KVM_SET_MSRS mechanism as x86 does for its MSRs.
Code related to implementing KVM_GET_MSRS/KVM_SET_MSRS is consolidated
in to kvm_trap_emul.c, now
From: David Daney
All registers are 64-bits wide, 32-bit guests use the least
significant portion of the register storage fields.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/mips/include
From: David Daney
The initial patch set implementing MIPS KVM does not handle 64-bit
guests or use of the FPU. This patch set corrects these ABI issues,
and does some very minor clean up.
Changes from v2: Split into five parts, no code change.
David Daney (5):
mips/kvm: Fix ABI for use of
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm.h | 3 ++-
arch/mips/kvm/kvm_mips.c| 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/mips/include/asm/kvm.h b/arch/mips/include/asm/kvm.h
index 86812fb..d145ead 100644
--- a/arch/mips
me of the existing CP0 registers.
David Daney
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On 05/20/2013 09:58 AM, Sanjay Lal wrote:
On May 20, 2013, at 8:50 AM, David Daney wrote:
On 05/18/2013 10:47 PM, Sanjay Lal wrote:
The following patch set adds support for the recently announced virtualization
extensions for the MIPS32 architecture and allows running unmodified kernels in
this stuff?
David Daney
(2) Trap and Emulate: Runs minimally modified guest kernels in UM and uses
binary patching
to minimize the number of traps and improve performance. This is used for
processors
that do not support the VZ-ASE.
--
Sanjay Lal (18):
Revert "MIPS: micr
On 05/19/2013 07:17 AM, Gleb Natapov wrote:
On Sat, May 18, 2013 at 06:54:26AM -0700, Sanjay Lal wrote:
From: David Daney
There are several parts to this:
o All registers are 64-bits wide, 32-bit guests use the least
significant portion of the register storage fields.
o FPU register
doing
architecture specific exports of the same symbol is not a clean way of
doing things.
The second time something needs to be done, it should be factored out
into common code.
David Daney
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the body of a me
f the min_low_pfn definition, not in some random architecture file.
An alternative is to fix the cache management functions so they don't
require the export.
David Daney
Regards
Sanjay
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panic()
if it cannot find a mapping for a particular gfn.
- Follow the latest convention and move the kvm.h API file under uapi/...
Sanjay,
Have you looked at:
http://www.linux-mips.org/archives/linux-mips/2013-05/msg00049.html
We should start working toward unifying the KVM interface.
From: David Daney
There are several parts to this:
o All registers are 64-bits wide, 32-bit guests use the least
significant portion of the register storage fields.
o FPU register formats are defined.
o CP0 Registers are manipulated via the KVM_GET_MSRS/KVM_SET_MSRS
mechanism.
The
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