[PATCH V3 1/2] perf ignore LBR and offcore_rsp.

2014-07-07 Thread kan . liang
From: Kan Liang x86, perf: Protect LBR and offcore rsp against KVM lying With -cpu host, KVM reports LBR and offcore support, if the host has support. When the guest perf driver tries to access LBR or offcore_rsp MSR, it #GPs all MSR accesses,since KVM doesn't handle LBR and offcore support. So

Re: [PATCH V3 1/2] perf ignore LBR and offcore_rsp.

2014-07-08 Thread Peter Zijlstra
On Mon, Jul 07, 2014 at 06:34:25AM -0700, kan.li...@intel.com wrote: > + /* > + * Access LBR MSR may cause #GP under certain circumstances. > + * E.g. KVM doesn't support LBR MSR > + * Check all LBT MSR here. > + * Disable LBR access if any LBR MSRs can not be accessed. > +

Re: [PATCH V3 1/2] perf ignore LBR and offcore_rsp.

2014-07-08 Thread Peter Zijlstra
On Mon, Jul 07, 2014 at 06:34:25AM -0700, kan.li...@intel.com wrote: > @@ -555,7 +577,11 @@ static inline void __x86_pmu_enable_event(struct > hw_perf_event *hwc, > { > u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask); > > - if (hwc->extra_reg.reg) > + if (hwc-

RE: [PATCH V3 1/2] perf ignore LBR and offcore_rsp.

2014-07-08 Thread Liang, Kan
> > On Mon, Jul 07, 2014 at 06:34:25AM -0700, kan.li...@intel.com wrote: > > + /* > > +* Access LBR MSR may cause #GP under certain circumstances. > > +* E.g. KVM doesn't support LBR MSR > > +* Check all LBT MSR here. > > +* Disable LBR access if any LBR MSRs can not be accesse

RE: [PATCH V3 1/2] perf ignore LBR and offcore_rsp.

2014-07-08 Thread Liang, Kan
> -Original Message- > From: Peter Zijlstra [mailto:pet...@infradead.org] > Sent: Tuesday, July 08, 2014 5:29 AM > To: Liang, Kan > Cc: a...@firstfloor.org; linux-ker...@vger.kernel.org; kvm@vger.kernel.org > Subject: Re: [PATCH V3 1/2] perf ignore LBR and offcore_rsp

Re: [PATCH V3 1/2] perf ignore LBR and offcore_rsp.

2014-07-08 Thread Peter Zijlstra
On Tue, Jul 08, 2014 at 02:22:25PM +, Liang, Kan wrote: > > This too is wrong in many ways; there's more than 2 extra_msrs on many > > systems. > > > Right, there are four extra reg types on Intel systems. Since my > previous test only triggers the crash with RSP_0 and RSP_1, so I only > hand