Il 19/08/2013 22:01, Marcelo Tosatti ha scritto:
On Mon, Aug 19, 2013 at 08:57:58PM +0200, Paolo Bonzini wrote:
Il 19/08/2013 19:13, Marcelo Tosatti ha scritto:
The configuration of the timer represented by MSR_IA32_TSCDEADLINE depends
on:
- APIC LVT Timer register.
- TSC value.
Change
The configuration of the timer represented by MSR_IA32_TSCDEADLINE depends on:
- APIC LVT Timer register.
- TSC value.
Change the order to respect the dependency.
Signed-off-by: Marcelo Tosatti mtosa...@redhat.com
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 376fc70..d04c6ae
Il 19/08/2013 19:13, Marcelo Tosatti ha scritto:
The configuration of the timer represented by MSR_IA32_TSCDEADLINE depends on:
- APIC LVT Timer register.
- TSC value.
Change the order to respect the dependency.
Do you have a testcase?
Paolo
Signed-off-by: Marcelo Tosatti
On Mon, Aug 19, 2013 at 08:57:58PM +0200, Paolo Bonzini wrote:
Il 19/08/2013 19:13, Marcelo Tosatti ha scritto:
The configuration of the timer represented by MSR_IA32_TSCDEADLINE depends
on:
- APIC LVT Timer register.
- TSC value.
Change the order to respect the dependency.
