On 15/02/13 14:24, Paul Mackerras wrote:
On Mon, Feb 11, 2013 at 11:12:41PM +1100, a...@ozlabs.ru wrote:
+static long emulated_h_put_tce(struct kvmppc_spapr_tce_table *stt,
+ unsigned long ioba, unsigned long tce)
+{
+ unsigned long idx = ioba SPAPR_TCE_SHIFT;
+
On Mon, Feb 18, 2013 at 07:32:53AM +0100, Jan Kiszka wrote:
On 2013-02-14 19:46, Jan Kiszka wrote:
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements basic I/O
bitmap handling. Repeated string accesses are still
On 2013-02-18 09:44, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 07:32:53AM +0100, Jan Kiszka wrote:
On 2013-02-14 19:46, Jan Kiszka wrote:
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements basic I/O
bitmap
On Mon, Feb 18, 2013 at 09:53:22AM +0100, Jan Kiszka wrote:
On 2013-02-18 09:44, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 07:32:53AM +0100, Jan Kiszka wrote:
On 2013-02-14 19:46, Jan Kiszka wrote:
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based
Il 17/02/2013 07:37, Asias He ha scritto:
static int __virtblk_add_req(struct virtqueue *vq,
- struct virtblk_req *vbr)
+ struct virtblk_req *vbr,
+ struct scatterlist *data_sg,
+ unsigned
From: Jan Kiszka jan.kis...@siemens.com
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements I/O bitmap
handling. We still exit unconditionally in case the CPU does not provide
information for ins/outs.
Signed-off-by:
Turn the array of model definitions into a set of self-registering QOM
types with their own class_init. Unique identifiers are obtained from
the combination of PVR, SVR and family identifiers; this requires all
alias #defines to be removed from the list. Possibly there are some more
left after
On Mon, Feb 18, 2013 at 10:17:14AM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements I/O bitmap
handling. We still exit unconditionally in case the
On Fri, Feb 15, 2013 at 11:10:46AM -0500, Sanjay Lal wrote:
On Feb 6, 2013, at 8:20 AM, Gleb Natapov wrote:
On Wed, Nov 21, 2012 at 06:34:09PM -0800, Sanjay Lal wrote:
+static gpa_t kvm_trap_emul_gva_to_gpa_cb(gva_t gva)
+{
+ gpa_t gpa;
+ uint32_t kseg = KSEGX(gva);
+
+ if
On 02/12/2013 09:06 PM, Paolo Bonzini wrote:
This series implements virtio-scsi queue steering, which gives
performance improvements of up to 50% (measured both with QEMU and
tcm_vhost backends). The patches build on top of the new virtio APIs
at
On 2013-02-18 10:36, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 10:17:14AM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements I/O bitmap
handling.
Il 18/02/2013 10:32, Wanlong Gao ha scritto:
Ok for 3.9? It would probably be easier to get it in via Rusty's tree
because of the prerequisites. James, can I get your Acked-by?
I can't apply this series on top of Rusty's virtio-next, I missed something
or needed rebase them ?
It's on top
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements I/O bitmap
handling.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Changes in v6:
- drop the bogus check of vmx_basix.54 again
- exit unconditionally on I/O
On Mon, Feb 18, 2013 at 11:21:16AM +0100, Jan Kiszka wrote:
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements I/O bitmap
handling.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Gleb Natapov
Can you tell us why mpic should be in kernel? Is it used often by modern
guests or may be they prefer MSI for interrupt delivery (hmm may be MSIs
are delivered through mpic too)? On x86 we actually would've preferred
to move PIC/IOAPIC form the kernel and leave only LAPIC there (but for
historical
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given architecture
only has one way to do it. If there's
2013/2/5 Michael Wolf m...@linux.vnet.ibm.com:
In the case of where you have a system that is running in a
capped or overcommitted environment the user may see steal time
being reported in accounting tools such as top or vmstat. This can
cause confusion for the end user.
Sorry, I'm no expert
Hi
Please send in any agenda topics you are interested in.
Later, Juan.
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This series generalizes the places where we already rely on QEMU
config space emulation to make it easier to add various other fields.
It turns out that when we start running on Q35 Windows cares quite
a bit about the PCIe type we expose. Drivers will fail to load if
not set to something valid
Kernel-side vfio virtualizes all of config space, but some parts are
unique to Qemu. For instance we may or may not expose the ROM BAR,
Qemu manages MSI/MSIX, and Qemu manages the multi-function bit so that
single function devices can appear as multi-function and vica versa.
Generalize this into
Windows seems to pay particular interest to the PCIe header type of
devices and will fail to load drivers if we attached Endpoint devices
or Legacy Endpoint devices to the Root Complex. We don't yet have a
good way to determine the bus type, so for now we add an experimental
x-bustype option
v2: Removing trailing \n from error_report calls
This series generalizes the places where we already rely on QEMU
config space emulation to make it easier to add various other fields.
It turns out that when we start running on Q35 Windows cares quite
a bit about the PCIe type we expose. Drivers
Kernel-side vfio virtualizes all of config space, but some parts are
unique to Qemu. For instance we may or may not expose the ROM BAR,
Qemu manages MSI/MSIX, and Qemu manages the multi-function bit so that
single function devices can appear as multi-function and vica versa.
Generalize this into
Windows seems to pay particular interest to the PCIe header type of
devices and will fail to load drivers if we attached Endpoint devices
or Legacy Endpoint devices to the Root Complex. We don't yet have a
good way to determine the bus type, so for now we add an experimental
x-bustype option
I've pushed kernel side vfio vga support to my next branch and intend
to try to get those in for kernel v3.9. Those changes can be found
here: git://github.com/awilliam/linux-vfio.git (next)
This is the matching QEMU updates. Patch 1/2 adds basic VGA range
support. This can be used with the
Most VGA cards need some kind of quirk to fully operate since they
hide backdoors to get to other registers outside of PCI config space
within the registers, but this provides the base infrastructure. If
we could identity map PCI resources for assigned devices we would need
a lot fewer quirks.
Apparently graphics vendors need to come up with new ways to retrieve
PCI BAR addresses on every revision of their chip. These are the ones
that I've found on the following assortment of cards:
Advanced Micro Devices [AMD] nee ATI Cedar PRO [Radeon HD 5450/6350]
Advanced Micro Devices [AMD] nee
Often when debugging it's useful to be able to disable bypass paths
so no interactions with the device are missed. Add some extra debug
options to do this. Also add device info on read/write BAR accesses,
which is useful when debugging more than one assigned device. A
couple DPRINTFs also had
Guests may leave devices in a low power state at reboot, but we expect
devices to be woken up for the next boot. Make this happen.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/vfio_pci.c | 23 +++
1 file changed, 23 insertions(+)
diff --git
On 02/15/2013 10:51:16 PM, Paul Mackerras wrote:
On Fri, Feb 15, 2013 at 09:57:06PM -0600, Scott Wood wrote:
On 02/15/2013 08:56:14 PM, Paul Mackerras wrote:
I have no particular objection to the device control API per se,
but
I have two objections to using it as the primary interface to
On 02/18/2013 06:21:59 AM, Gleb Natapov wrote:
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given
On 02/18/2013 06:04:51 AM, Gleb Natapov wrote:
Can you tell us why mpic should be in kernel? Is it used often by
modern
guests or may be they prefer MSI for interrupt delivery (hmm may be
MSIs
are delivered through mpic too)?
Yes, MSIs are delivered through the mpic.
Plus, MSIs are only
On Mon, Feb 18, 2013 at 3:01 PM, Scott Wood scottw...@freescale.com wrote:
On 02/18/2013 06:21:59 AM, Gleb Natapov wrote:
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently, devices that are emulated inside KVM are
On Wed, Feb 13, 2013 at 9:49 PM, Scott Wood scottw...@freescale.com wrote:
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given architecture
only has one way to do it. If there's any need to access device state,
it is done
On Tue, Feb 05, 2013 at 03:49:41PM -0600, Michael Wolf wrote:
Add a helper routine to scheduler/core.c to allow the kvm module
to retrieve the cpu hardlimit settings. The values will be used
to set up a timer that is used to separate the consigned from the
steal time.
1) Can you please
On Wed, Feb 13, 2013 at 06:57:09AM -0500, Peter Hurley wrote:
On Wed, 2013-02-13 at 12:51 +0200, Gleb Natapov wrote:
On Tue, Feb 12, 2013 at 04:39:03PM -0800, H. Peter Anvin wrote:
On 02/12/2013 04:26 PM, Peter Hurley wrote:
With -next-20130204+ in ubuntu 12.10 VM (so the 80x25 VGA
Pulled, thanks.
On Fri, Feb 15, 2013 at 01:16:16AM +0100, Alexander Graf wrote:
Hi Marcelo / Gleb,
This is my current patch queue for ppc. Please pull.
Highlights of this queue drop are:
- BookE: Fast mapping support for 4k backed memory
- BookE: Handle alignment interrupts
On 02/18/2013 06:44:20 PM, Christoffer Dall wrote:
On Wed, Feb 13, 2013 at 9:49 PM, Scott Wood scottw...@freescale.com
wrote:
index 0350e0d..dbaf012 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -335,6 +335,25 @@ struct kvm_memslots {
short
On Mon, 2013-02-18 at 19:59 -0300, Marcelo Tosatti wrote:
On Wed, Feb 13, 2013 at 06:57:09AM -0500, Peter Hurley wrote:
On Wed, 2013-02-13 at 12:51 +0200, Gleb Natapov wrote:
On Tue, Feb 12, 2013 at 04:39:03PM -0800, H. Peter Anvin wrote:
On 02/12/2013 04:26 PM, Peter Hurley wrote:
On Mon, Feb 18, 2013 at 05:43:47PM +0100, Frederic Weisbecker wrote:
2013/2/5 Michael Wolf m...@linux.vnet.ibm.com:
In the case of where you have a system that is running in a
capped or overcommitted environment the user may see steal time
being reported in accounting tools such as top or
To match whats mapped via vsyscalls to userspace.
Reported-by: Peter Hurley pe...@hurleysoftware.com
Signed-off-by: Marcelo Tosatti mtosa...@redhat.com
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 220a360..5bedbdd 100644
--- a/arch/x86/kernel/kvmclock.c
+++
On Mon, Feb 18, 2013 at 12:32:37PM +0200, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 11:21:16AM +0100, Jan Kiszka wrote:
This prevents trapping L2 I/O exits if L1 has neither unconditional nor
bitmap-based exiting enabled. Furthermore, it implements I/O bitmap
handling.
Signed-off-by:
On Sun, Feb 17, 2013 at 10:56:36AM +0200, Gleb Natapov wrote:
On Thu, Feb 14, 2013 at 07:46:27PM +0100, Jan Kiszka wrote:
This avoids basing decisions on uninitialized variables, potentially
leaking kernel data to the L1 guest.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
On Feb 18, 2013, at 1:44 AM, Gleb Natapov wrote:
On Fri, Feb 15, 2013 at 11:10:46AM -0500, Sanjay Lal wrote:
On Feb 6, 2013, at 8:20 AM, Gleb Natapov wrote:
On Wed, Nov 21, 2012 at 06:34:09PM -0800, Sanjay Lal wrote:
+static gpa_t kvm_trap_emul_gva_to_gpa_cb(gva_t gva)
+{
+ gpa_t gpa;
https://bugzilla.kernel.org/show_bug.cgi?id=54061
Summary: guest panic after live migration
Product: Virtualization
Version: unspecified
Platform: All
OS/Version: Linux
Tree: Mainline
Status: NEW
Severity:
The existing check handles the case where we've migrated to a different
core than we last ran on, but it doesn't handle the case where we're
still on the same cpu we last ran on, but some other vcpu has run on
this cpu in the meantime.
Signed-off-by: Scott Wood scottw...@freescale.com
---
This
The Buildbot has detected a new failure on builder next-i386 while building kvm.
Full details are available at:
http://buildbot.b1-systems.de/kvm/builders/next-i386/builds/804
Buildbot URL: http://buildbot.b1-systems.de/kvm/
Buildslave for this Build: b1_kvm_1
Build Reason: The Nightly
The Buildbot has detected a new failure on builder next-ppc44x while building
kvm.
Full details are available at:
http://buildbot.b1-systems.de/kvm/builders/next-ppc44x/builds/804
Buildbot URL: http://buildbot.b1-systems.de/kvm/
Buildslave for this Build: b1_kvm_1
Build Reason: The Nightly
The Buildbot has detected a new failure on builder next-ppc64 while building
kvm.
Full details are available at:
http://buildbot.b1-systems.de/kvm/builders/next-ppc64/builds/805
Buildbot URL: http://buildbot.b1-systems.de/kvm/
Buildslave for this Build: b1_kvm_1
Build Reason: The Nightly
The Buildbot has detected a new failure on builder next-x86_64 while building
kvm.
Full details are available at:
http://buildbot.b1-systems.de/kvm/builders/next-x86_64/builds/804
Buildbot URL: http://buildbot.b1-systems.de/kvm/
Buildslave for this Build: b1_kvm_1
Build Reason: The Nightly
On Mon, Feb 18, 2013 at 4:53 PM, Scott Wood scottw...@freescale.com wrote:
On 02/18/2013 06:44:20 PM, Christoffer Dall wrote:
On Wed, Feb 13, 2013 at 9:49 PM, Scott Wood scottw...@freescale.com
wrote:
index 0350e0d..dbaf012 100644
--- a/include/linux/kvm_host.h
+++
https://bugzilla.kernel.org/show_bug.cgi?id=54071
Summary: kvm guests stuck (not in io) and cannot be killed
using -9
Product: Virtualization
Version: unspecified
Kernel Version: 3.5.0-23.35
Platform: All
OS/Version: Linux
On 02/13/2013 05:21 AM, Alexander Graf wrote:
On 01.02.2013, at 08:39, Jason Wang wrote:
This patch adds basic multiqueue support for qemu. The idea is simple, an
array
of NetClientStates were introduced in NICState, parse_netdev() were extended
to
find and match all NetClientStates
https://bugzilla.kernel.org/show_bug.cgi?id=54071
Gleb g...@redhat.com changed:
What|Removed |Added
CC||g...@redhat.com
--- Comment #1
On 15/02/13 14:24, Paul Mackerras wrote:
On Mon, Feb 11, 2013 at 11:12:41PM +1100, a...@ozlabs.ru wrote:
+static long emulated_h_put_tce(struct kvmppc_spapr_tce_table *stt,
+ unsigned long ioba, unsigned long tce)
+{
+ unsigned long idx = ioba SPAPR_TCE_SHIFT;
+
Can you tell us why mpic should be in kernel? Is it used often by modern
guests or may be they prefer MSI for interrupt delivery (hmm may be MSIs
are delivered through mpic too)? On x86 we actually would've preferred
to move PIC/IOAPIC form the kernel and leave only LAPIC there (but for
historical
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given architecture
only has one way to do it. If there's
On 02/15/2013 10:51:16 PM, Paul Mackerras wrote:
On Fri, Feb 15, 2013 at 09:57:06PM -0600, Scott Wood wrote:
On 02/15/2013 08:56:14 PM, Paul Mackerras wrote:
I have no particular objection to the device control API per se,
but
I have two objections to using it as the primary interface to
On 02/18/2013 06:21:59 AM, Gleb Natapov wrote:
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given
On 02/18/2013 06:04:51 AM, Gleb Natapov wrote:
Can you tell us why mpic should be in kernel? Is it used often by
modern
guests or may be they prefer MSI for interrupt delivery (hmm may be
MSIs
are delivered through mpic too)?
Yes, MSIs are delivered through the mpic.
Plus, MSIs are only
On Mon, Feb 18, 2013 at 3:01 PM, Scott Wood scottw...@freescale.com wrote:
On 02/18/2013 06:21:59 AM, Gleb Natapov wrote:
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently, devices that are emulated inside KVM are
On Wed, Feb 13, 2013 at 9:49 PM, Scott Wood scottw...@freescale.com wrote:
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given architecture
only has one way to do it. If there's any need to access device state,
it is done
Pulled, thanks.
On Fri, Feb 15, 2013 at 01:16:16AM +0100, Alexander Graf wrote:
Hi Marcelo / Gleb,
This is my current patch queue for ppc. Please pull.
Highlights of this queue drop are:
- BookE: Fast mapping support for 4k backed memory
- BookE: Handle alignment interrupts
On 02/18/2013 06:44:20 PM, Christoffer Dall wrote:
On Wed, Feb 13, 2013 at 9:49 PM, Scott Wood scottw...@freescale.com
wrote:
index 0350e0d..dbaf012 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -335,6 +335,25 @@ struct kvm_memslots {
short
The existing check handles the case where we've migrated to a different
core than we last ran on, but it doesn't handle the case where we're
still on the same cpu we last ran on, but some other vcpu has run on
this cpu in the meantime.
Signed-off-by: Scott Wood scottw...@freescale.com
---
This
On Mon, Feb 18, 2013 at 4:53 PM, Scott Wood scottw...@freescale.com wrote:
On 02/18/2013 06:44:20 PM, Christoffer Dall wrote:
On Wed, Feb 13, 2013 at 9:49 PM, Scott Wood scottw...@freescale.com
wrote:
index 0350e0d..dbaf012 100644
--- a/include/linux/kvm_host.h
+++
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