On Thu, Feb 07, 2008 at 08:55:59AM +, Paul Knowles wrote:
Hi Joerg
The problem is this block of code in set_cr0
#ifdef CONFIG_X86_64
if (vcpu-arch.shadow_efer EFER_LME) {
if (!is_paging(vcpu) (cr0 X86_CR0_PG))
enter_lmode(vcpu);
if (is_paging(vcpu) !(cr0
Akio Takebe wrote:
Hi, Xiantao
From: Zhang Xiantao [EMAIL PROTECTED]
Date: Tue, 29 Jan 2008 17:27:06 +0800
Subject: [PATCH] README: How to boot up guests on kvm/ia64
Guide: How to boot up guests on kvm/ia64
Signed-off-by: Xiantao Zhang [EMAIL PROTECTED] ---
arch/ia64/kvm/README | 72
Hi, Xiantao
From: Zhang Xiantao [EMAIL PROTECTED]
Date: Tue, 29 Jan 2008 17:27:06 +0800
Subject: [PATCH] README: How to boot up guests on kvm/ia64
Guide: How to boot up guests on kvm/ia64
Signed-off-by: Xiantao Zhang [EMAIL PROTECTED]
---
arch/ia64/kvm/README | 72
The better place of the
On Sun, Jan 27, 2008 at 10:57:07AM +0200, Avi Kivity wrote:
Very nice patchset; small, simple, and clean. Apart from the comments
I already posted, I'd like to avoid the term 'hap': I find it
non-descriptive, and it reminds me of another hypervisor. I suggest
'tlp' for two-level paging.
I
By moving the SVM feature detection from the each_cpu code to the hardware
setup code it runs only once. As an additional advance the feature check is now
available earlier in the module setup process.
Signed-off-by: Joerg Roedel [EMAIL PROTECTED]
---
arch/x86/kvm/svm.c |4 +++-
1 files
Let SVM detect if the Nested Paging feature is available on the hardware.
Disable it to keep this patch series bisectable.
Signed-off-by: Joerg Roedel [EMAIL PROTECTED]
---
arch/x86/kvm/svm.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kvm/svm.c
Hi,
here is the improved patchset which adds support for the Nested Paging
feature of the AMD Barcelona and Phenom processors to KVM. The patch set
was successfully install- and runtime-tested with various guest
operating systems (64 bit, 32 bit legacy and 32 bit PAE Linux,
Windows 64 bit and 32
The mapping function for the nonpaging case in the softmmu does basically the
same as required for Nested Paging. Make this function generic so it can be
used for both.
Signed-off-by: Joerg Roedel [EMAIL PROTECTED]
---
arch/x86/kvm/mmu.c |7 +++
1 files changed, 3 insertions(+), 4
To disable the use of the Nested Paging feature even if it is available in
hardware this patch adds a module parameter. Nested Paging can be disabled by
passing npt=0 to the kvm_amd module.
Signed-off-by: Joerg Roedel [EMAIL PROTECTED]
---
arch/x86/kvm/svm.c |8
1 files changed, 8
The generic x86 code has to know if the specific implementation uses Nested
Paging. In the generic code Nested Paging is called Two Dimensional Paging
(TDP) to avoid confusion with (future) TDP implementations of other vendors.
This patch exports the availability of TDP to the generic x86 code.
This patch contains the SVM architecture dependent changes for KVM to enable
support for the Nested Paging feature of AMD Barcelona and Phenom processors.
Signed-off-by: Joerg Roedel [EMAIL PROTECTED]
---
arch/x86/kvm/svm.c | 72 ---
1 files
The load_pdptrs() function is required in the SVM module for NPT support.
Signed-off-by: Joerg Roedel [EMAIL PROTECTED]
---
arch/x86/kvm/x86.c |1 +
include/asm-x86/kvm_host.h |2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kvm/x86.c
Joerg Roedel wrote:
This patch contains the changes to the KVM MMU necessary for support of the
Nested Paging feature in AMD Barcelona and Phenom Processors.
good patch, it look like things will be very fixable with it
Signed-off-by: Joerg Roedel [EMAIL PROTECTED]
---
Actually having good Real Mode support will really help KVM running wider
variety of guest OSes.
Very welcome move.
-Technologov
-
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On Thu, Feb 07, 2008 at 03:27:19PM +0200, Izik Eidus wrote:
Joerg Roedel wrote:
This patch contains the changes to the KVM MMU necessary for support of the
Nested Paging feature in AMD Barcelona and Phenom Processors.
good patch, it look like things will be very fixable with it
Joerg Roedel wrote:
On Thu, Feb 07, 2008 at 03:27:19PM +0200, Izik Eidus wrote:
Joerg Roedel wrote:
This patch contains the changes to the KVM MMU necessary for support of the
Nested Paging feature in AMD Barcelona and Phenom Processors.
good patch, it look like things
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