On 04/09/2013 10:20:41 PM, Yoder Stuart-B08248 wrote:
> -Original Message-
> From: Yoder Stuart-B08248
> Sent: Tuesday, April 09, 2013 3:36 PM
> To: ag...@suse.de
> Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org; Yoder
Stuart-B08248
> Subject: [PATCH] KVM: PPC: emulate dcbst
>
> Fro
On 09.04.2013, at 22:36, Stuart Yoder wrote:
> From: Stuart Yoder
>
> Signed-off-by: Stuart Yoder
Thanks, applied to kvm-ppc-queue.
Alex
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On 10.04.2013, at 00:37, Paul Mackerras wrote:
> On Mon, Apr 08, 2013 at 04:02:13PM +0530, Bharat Bhushan wrote:
>> Instruction emulation return EMULATE_DO_PAPR when it requires
>> exit to userspace on book3s. Similar return is required
>> for booke. EMULATE_DO_PAPR reads out to be confusing so i
This adds support for the ibm,int-on and ibm,int-off RTAS calls to the
in-kernel XICS emulation and corrects the handling of the saved
priority by the ibm,set-xive RTAS call. With this, ibm,int-off sets
the specified interrupt's priority in its saved_priority field and
sets the priority to 0xff (t
This is a repost of my patch series implementing in-kernel emulation
of the XICS interrupt controller architecture defined in PAPR (Power
Architecture Platform Requirements, the document that defines IBM's
pSeries platform architecture). This version of the patch series uses
the device API as post
From: Benjamin Herrenschmidt
This adds in-kernel emulation of the XICS (eXternal Interrupt
Controller Specification) interrupt controller specified by PAPR, for
both HV and PR KVM guests.
The XICS emulation supports up to 1048560 interrupt sources.
Interrupt source numbers below 16 are reserved;
This adds the ability for userspace to save and restore the state
of the XICS interrupt presentation controllers (ICPs) via the
KVM_GET/SET_ONE_REG interface. Since there is one ICP per vcpu, we
simply define a new 64-bit register in the ONE_REG space for the ICP
state. The state includes the CPU
From: Benjamin Herrenschmidt
Currently, we wake up a CPU by sending a host IPI with
smp_send_reschedule() to thread 0 of that core, which will take all
threads out of the guest, and cause them to re-evaluate their
interrupt status on the way back in.
This adds a mechanism to differentiate real h
This streamlines our handling of external interrupts that come in
while we're in the guest. First, when waking up a hardware thread
that was napping, we split off the "napping due to H_CEDE" case
earlier, and use the code that handles an external interrupt (0x500)
in the guest to handle that too.
This adds the API for userspace to instantiate an XICS device in a VM
and connect VCPUs to it. The API consists of a new device type for
the KVM_CREATE_DEVICE ioctl, a new capability KVM_CAP_IRQ_XICS, which
functions similarly to KVM_CAP_IRQ_MPIC, and the KVM_IRQ_LINE ioctl,
which is used to asser
From: Benjamin Herrenschmidt
This adds an implementation of the XICS hypercalls in real mode for HV
KVM, which allows us to avoid exiting the guest MMU context on all
threads for a variety of operations such as fetching a pending
interrupt, EOI of messages, IPIs, etc.
Signed-off-by: Benjamin Her
From: Michael Ellerman
For pseries machine emulation, in order to move the interrupt
controller code to the kernel, we need to intercept some RTAS
calls in the kernel itself. This adds an infrastructure to allow
in-kernel handlers to be registered for RTAS services by name.
A new ioctl, KVM_PPC_
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