For the origin value of CNTV_CVAL_EL0 architecturally UNKNOWN, we may
receive an unexpected PPI before we actual trigger the timer interrupt.
So we should set ARCH_TIMER_CTL_IMASK in timer_prep.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
Hi Marc，
I will consider more circumstances in the later test. Thanks for the
advice.
Thanks,
Jingyi
On 11/24/2020 7:02 PM, Marc Zyngier wrote:
On 2020-11-13 07:54, Jingyi Wang wrote:
Hi all，
Sorry for the delay. I have been testing the TWED feature performance
lately. We select unixbench
Hi Marc,
Gentle ping, could you please give some comments on this patch or the
current test results? Thanks in advance.
Thanks,
Jingyi
On 11/13/2020 3:54 PM, Jingyi Wang wrote:
Hi all，
Sorry for the delay. I have been testing the TWED feature performance
lately. We select unixbench
items have better performance if an appropriate
TWED value is set(up to 5.6%~11.9%). Meanwhile, the complete unixbench
test is run to prove that other testing items are not sensitive to this
parameter.
Thanks
Jingyi
On 9/29/2020 5:17 PM, Jingyi Wang wrote:
TWE Delay is an optional feature
Hi Marc,
On 9/29/2020 6:50 PM, Marc Zyngier wrote:
On 2020-09-29 10:17, Jingyi Wang wrote:
TWE Delay is an optional feature in ARMv8.6 Extentions. There is a
performance benefit in waiting for a period of time for an event to
arrive before taking the trap as it is common that event will arrive
| sched_in
--+---+
< 1 | = twed| = twed
otherwise| = twed + 1| = twed - 1
Signed-off-by: Zengruan Ye
Signed-off-by: Jingyi Wang
---
arch/arm64/include/asm/kvm_emulate.h | 6 ++
arch/arm64/include/asm/kvm_host.h|
From: Zengruan Ye
TWE Delay is an optional feature in ARMv8.6 Extentions. This patch
detect this feature.
Signed-off-by: Zengruan Ye
Signed-off-by: Jingyi Wang
---
arch/arm64/Kconfig | 10 ++
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/kernel/cpufeature.c
and "twed" to configure the
register.
Signed-off-by: Zengruan Ye
Signed-off-by: Jingyi Wang
---
arch/arm64/include/asm/kvm_arm.h | 5 +
arch/arm64/include/asm/kvm_emulate.h | 32
arch/arm64/include/asm/kvm_host.h| 13 +++
arch/arm6
and implements TWE delay
value dynamic adjustment.
Thanks for Shameer's advice on this series. The function of this patch
has been tested on TWED supported hardware and the performance of it is
still on test, any advice will be welcomed.
Jingyi Wang (2):
KVM: arm64: Make use of TWED feature
KVM
From: Zengruan Ye
Add tracepoints for TWE delay value update
Signed-off-by: Zengruan Ye
Signed-off-by: Jingyi Wang
---
arch/arm64/kvm/arm.c | 4
arch/arm64/kvm/trace_arm.h | 21 +
2 files changed, 25 insertions(+)
diff --git a/arch/arm64/kvm/arm.c b/arch
On 8/11/2020 3:49 PM, Marc Zyngier wrote:
On 2020-08-11 02:48, Jingyi Wang wrote:
Hi Marc,
On 8/5/2020 8:13 PM, Marc Zyngier wrote:
On 2020-08-05 12:54, Jingyi Wang wrote:
Hi all,
Currently, kvm-unit-tests only support GICv3 vLPI injection. May I ask
is there any plan or suggestion
Hi Marc,
On 8/5/2020 8:13 PM, Marc Zyngier wrote:
On 2020-08-05 12:54, Jingyi Wang wrote:
Hi all,
Currently, kvm-unit-tests only support GICv3 vLPI injection. May I ask
is there any plan or suggestion on constructing irq bypass mechanism
to test vLPI direct injection in kvm-unit-tests?
I'm
Hi all,
Currently, kvm-unit-tests only support GICv3 vLPI injection. May I ask
is there any plan or suggestion on constructing irq bypass mechanism
to test vLPI direct injection in kvm-unit-tests?
Thanks，
Jingyi
___
kvmarm mailing list
On 7/31/2020 8:01 PM, Andrew Jones wrote:
On Fri, Jul 31, 2020 at 03:42:34PM +0800, Jingyi Wang wrote:
With the development of arm gic architecture, we think it will be useful
to add some performance test in kut to measure the cost of interrupts.
In this series, we add GICv4.1 support
Triggers LPIs through the INT command and test the latency.
Mostly inherited form commit 0ef02cd6cbaa(arm/arm64: ITS: INT
functional tests).
Signed-off-by: Jingyi Wang
Reviewed-by: Eric Auger
---
arm/micro-bench.c | 44
1 file changed, 44 insertions
For we get the time duration of (10msec timer + injection latency)
in timer_exec(), we substract the value of 10msec in timer_post()
to get the actual latency.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arm
Besides using separate running times parameter, we add time limit
for loop_test to make sure each test should be done in a certain
time(5 sec here).
Signed-off-by: Jingyi Wang
Reviewed-by: Eric Auger
---
arm/micro-bench.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions
Trigger PPIs by setting up a 10msec timer and test the latency.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 53 ++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 09d9d53..1e1bde5
vtimer latency test" on Andrew's patch
- Add test->post() to get actual PPI latency
* From v1:
- Fix spelling mistake
- Use the existing interface to inject hw sgi to simply the logic
- Add two separate patches to limit the running times and time cost
of each individual micro-
For some test in micro-bench can be time consuming, we add a
micro-bench test parameter to allow each individual test to specify
its running times.
Signed-off-by: Jingyi Wang
Reviewed-by: Eric Auger
---
arm/micro-bench.c | 27 ++-
1 file changed, 14 insertions(+), 13
If gicv4.1(sgi hardware injection) is supported in kvm, we test ipi
injection via hw/sw way separately.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c| 62 ++--
lib/arm/asm/gic-v3.h | 3 +++
lib/arm/asm/gic.h| 1 +
3 files changed, 58
Because micro-bench may send a large number of ITS commands, we
should handle ITS command queue wrapping as kernel instead of just
failing the test.
Signed-off-by: Jingyi Wang
Reviewed-by: Eric Auger
---
lib/arm64/gic-v3-its-cmd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
Under certain circumstances, we need to further process microbench
test results, so we add test->post() in the microbench framework,
later patch will use that.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 31 ++-
1 file changed, 18 insertions(+), 13 deleti
If ipi_exec() fails because of timeout, we shouldn't increase
the number of ipi received.
Signed-off-by: Jingyi Wang
Reviewed-by: Eric Auger
---
arm/micro-bench.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 4612f41..794dfac
Later patches will use these functions for gic(ipi/lpi/timer) tests.
Signed-off-by: Jingyi Wang
Reviewed-by: Eric Auger
---
arm/micro-bench.c | 39 ++-
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
Hi Eric,
On 7/3/2020 3:45 PM, Auger Eric wrote:
Hi Jingyi,
On 7/3/20 9:41 AM, Jingyi Wang wrote:
Hi Eric, Drew,
On 7/2/2020 9:36 PM, Auger Eric wrote:
Hi Jingyi,
On 7/2/20 5:01 AM, Jingyi Wang wrote:
Trigger PPIs by setting up a 10msec timer and test the latency.
so for each iteration
Hi Eric, Drew,
On 7/2/2020 9:36 PM, Auger Eric wrote:
Hi Jingyi,
On 7/2/20 5:01 AM, Jingyi Wang wrote:
Trigger PPIs by setting up a 10msec timer and test the latency.
so for each iteration the accumulated valued is 10 ms + latency, right?
and what is printed at the end does include
Hi Eric,
On 7/2/2020 9:23 PM, Auger Eric wrote:
Hi Jingyi,
On 7/2/20 5:01 AM, Jingyi Wang wrote:
Besides using separate running times parameter, we add time limit
for loop_test to make sure each test should be done in a certain
time(5 sec here).
Signed-off-by: Jingyi Wang
---
arm/micro
On 7/2/2020 9:42 PM, Auger Eric wrote:
Hi Marc,
On 7/2/20 3:08 PM, Marc Zyngier wrote:
Hi Eric,
On 2020-07-02 13:57, Auger Eric wrote:
Hi Jingyi,
On 7/2/20 5:01 AM, Jingyi Wang wrote:
If gicv4.1(sgi hardware injection) supported, we test ipi injection
via hw/sw way separately.
Signed
On 7/2/2020 5:17 PM, Marc Zyngier wrote:
On 2020-07-02 10:02, Jingyi Wang wrote:
Hi Marc,
On 7/2/2020 4:22 PM, Marc Zyngier wrote:
On 2020-07-02 04:01, Jingyi Wang wrote:
If gicv4.1(sgi hardware injection) supported, we test ipi injection
via hw/sw way separately.
nit: active-less SGIs
Hi Marc,
On 7/2/2020 4:22 PM, Marc Zyngier wrote:
On 2020-07-02 04:01, Jingyi Wang wrote:
If gicv4.1(sgi hardware injection) supported, we test ipi injection
via hw/sw way separately.
nit: active-less SGIs are not strictly a feature of GICv4.1 (you could
imagine a GIC emulation offering
Hi Drew,
On 7/2/2020 1:44 PM, Andrew Jones wrote:
On Thu, Jul 02, 2020 at 11:01:32AM +0800, Jingyi Wang wrote:
Trigger PPIs by setting up a 10msec timer and test the latency.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 56 ++-
1 file
On 7/2/2020 1:48 PM, Andrew Jones wrote:
On Thu, Jul 02, 2020 at 11:01:31AM +0800, Jingyi Wang wrote:
Besides using separate running times parameter, we add time limit
for loop_test to make sure each test should be done in a certain
time(5 sec here).
Signed-off-by: Jingyi Wang
---
arm
On 7/2/2020 1:29 PM, Andrew Jones wrote:
On Thu, Jul 02, 2020 at 11:01:30AM +0800, Jingyi Wang wrote:
For some test in micro-bench can be time consuming, we add a
micro-bench test parameter to allow each individual test to specify
its running times.
Signed-off-by: Jingyi Wang
---
arm
and then in the commit message, instead of
The following patches will use that.
we use
Later patches will use these functions for gic(ipi/lpi/timer) tests.
Thanks,
drew
This looks more concise, thanks for reviewing
Thanks,
Jingyi
On Thu, Jul 02, 2020 at 11:01:26AM +0800, Jingyi Wang wrote
Trigger PPIs by setting up a 10msec timer and test the latency.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 56 ++-
1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 4c962b7..6822084
The following patches will use that.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 39 ++-
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 794dfac..fc4d356 100644
--- a/arm/micro-bench.c
+++ b
Besides using separate running times parameter, we add time limit
for loop_test to make sure each test should be done in a certain
time(5 sec here).
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/arm/micro
Triggers LPIs through the INT command and test the latency.
Mostly inherited form commit 0ef02cd6cbaa(arm/arm64: ITS: INT
functional tests).
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 44
1 file changed, 44 insertions(+)
diff --git a/arm
If ipi_exec() fails because of timeout, we shouldn't increase
the number of ipi received.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 4612f41..794dfac 100644
--- a/arm/micro
If gicv4.1(sgi hardware injection) supported, we test ipi injection
via hw/sw way separately.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c| 45 +++-
lib/arm/asm/gic-v3.h | 3 +++
lib/arm/asm/gic.h| 1 +
3 files changed, 44 insertions(+), 5
supported hardware.
* From v1:
- Fix spelling mistake
- Use the existing interface to inject hw sgi to simply the logic
- Add two separate patches to limit the running times and time cost
of each individual micro-bench test
Jingyi Wang (8):
arm64: microbench: get correct ipi recieved num
On 5/21/2020 10:00 PM, Zenghui Yu wrote:
On 2020/5/17 18:08, Jingyi Wang wrote:
If ipi_exec() fails because of timeout, we shouldn't increase
the number of ipi received.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Hi Drew,
On 5/18/2020 3:05 PM, Andrew Jones wrote:
On Sun, May 17, 2020 at 06:09:00PM +0800, Jingyi Wang wrote:
Triggers PPIs by setting up a 10msec timer and test the latency.
For this test can be time consuming, we add time limit for loop_test
to make sure each test should be done
Triggers LPIs through the INT command and test the latency.
Mostly inherited form commit 0ef02cd6cbaa(arm/arm64: ITS: INT
functional tests).
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 44
1 file changed, 44 insertions(+)
diff --git a/arm
Because micro-bench may send a large number of ITS commands, we
should handle ITS command queue wrapping as kernel instead of just
failing the test.
Signed-off-by: Jingyi Wang
---
lib/arm64/gic-v3-its-cmd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/arm64/gic-v3
If gicv4.1(sgi hardware injection) supported, we test ipi injection
via hw/sw way separately.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c| 53 +++-
lib/arm/asm/gic-v3.h | 5 +
lib/arm/asm/gic.h| 1 +
3 files changed, 54 insertions(+), 5
If ipi_exec() fails because of timeout, we shouldn't increase
the number of ipi received.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 4612f41..ca022d9 100644
--- a/arm/micro
The following patches will use that.
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 39 ++-
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index ca022d9..fc4d356 100644
--- a/arm/micro-bench.c
+++ b
Triggers PPIs by setting up a 10msec timer and test the latency.
For this test can be time consuming, we add time limit for loop_test
to make sure each test should be done in a certain time(5 sec here).
Signed-off-by: Jingyi Wang
---
arm/micro-bench.c | 81
With the development of arm gic architecture, we think it will be useful
to add some performance test in kut to measure the cost of interrupts.
In this series, we add GICv4.1 support for ipi latency test and
implement LPI/vtimer latency test.
Jingyi Wang (6):
arm64: microbench: get correct ipi
Hi Drew, Zenghui,
On 4/2/2020 7:52 PM, Zenghui Yu wrote:
Hi Drew, Jingyi,
On 2020/4/1 20:24, Andrew Jones wrote:
On Wed, Apr 01, 2020 at 06:08:10PM +0800, Jingyi Wang wrote:
With the development of arm gic architecture, we think it will be useful
to add some simple performance test in kut
With the development of arm gic architecture, we think it will be useful
to add some simple performance test in kut to measure the cost of
interrupts. X86 arch has implemented similar test.
Jingyi Wang (2):
arm/arm64: gic: Add IPI latency test
arm/arm64: Add vtimer latency test
arm/gic.c
This patch add a test to measure the latency of IPI injection.
Signed-off-by: Jingyi Wang
---
arm/gic.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index fcf4c1f..f5e830e 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -27,6 +27,9 @@ struct
This patch add a test to measure the precise vtimer firing time.
Signed-off-by: Jingyi Wang
---
arm/timer.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arm/timer.c b/arm/timer.c
index f390e8e..1d5b3dc 100644
--- a/arm/timer.c
+++ b/arm/timer.c
@@ -16,6 +16,9 @@
#define
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