tral like msi_phandle ? It
will also be
used by GICv3 ITS implementation.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
ller.
Yes, exactly. In my implementation being developed i actually reused first
patch from this set, and indeed 'v2m_handle' appeared to be useful for ITS. My
code flow is something like:
if (gicv3)
create_its()
else
create_v2m()
Kind regards,
Pavel Fedin
Expert Engineer
Samsu
arm in increasing v2m area.
P.S. And yes, VIRT_GIC_DIST_SPI should be VIRT_GIC_DIST_MBI instead
(Reviewed-by: Eric Auger ), just this fragment is from
my old integration branch, which i currently don't work on, because my new test
environment doesn't use GICv2 at all.
Kind regar
d to implement ITS in qemu while leaving LPI handling to kernel. In this
case my
qemu would have everything needed.
By the way, why did you decide to put everything into kernel? Yes, in-kernel
emulation is
faster, but ITS is not accessed frequently.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung
nother concern
> would be the support of GICv4, which relies on the command queue
> handling to be handled in the kernel
Wow, i didn't know about GICv4.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
_
o an LPI
and get
collection ID from there. However, yes, i agree, this approach has the same
performance
drawback as my suggested approach 2.
Any thoughts / ideas ?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
st and
fastest thing
to do.
If someone is interested, i could prepare an RFC patch series for this, which
would apply
on top of Andre's ITS implementation.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm
. In this
case raising an MSI by GSI would not differ from what i currently do.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Hello!
> But that fails compilation on ARM (which uses this file as well),
> because we have a dummy fail function in the header if
> CONFIG_HAVE_KVM_MSI is not defined.
May be then remove that fail function too? Too many #ifdef's are not good...
Kind regards,
Pavel Fedin
E
erfectly work because SPI signaling
is used
with GICv2m, and MSI with GICv3(+), which cannot be used at the same time.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@li
. No allocation is done.
Allocation is done only on x86, with routing. They just allocate GSI numbers
starting from zero and
route them to something (either irqchip or MSI).
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
x27;s and route them to irqchip explicitly, don't we ?
Sorry for being perhaps ignorant, i haven't studied x86 qemu code too much.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kv
t? By default all GSIs would be SPIs,
then this can be
changed by userspace, or reverted back... Who cares? When using direct mapping
qemu never calls
routing functions, so it's OK.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
_
t we have
now by default, for backwards compatibility. But by design we were never
obliged to stick to this.
Well, it's just MHO...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmar
Pi-2 with a little
more hacking.
Fourth, there is at least of one ARM64 machine with broken vGICv3. And you can
buy it. I have it
here. And it would also benefit from this code (yes, with GICv3 CPU interface
emulation added, which
becomes trivial).
Kind regards
struct kvm_irq_routing_msi msi;
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
else
schedule_work(&irqfd->inject);
--- cut ---
You apparently missed KVM_IRQ_ROUTING_EXTENDED_MSI here, as well as in
irqfd_update(). But, if you
accept my API proposal, this becomes irrelevant.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electron
I think to keep using the type for homogeneity.
Homogeneity is perfect IMHO.
If that would be simpler for you, i could post a patch for this which i made
on top of your series.
Sorry, i don't have time to respin the whole thing, busy with qemu GICv3 fight
:)
Kind regards,
Pavel Fedin
Expert
Hello!
> OK thanks for sharing. I need some more time to study qemu code too.
I am currently working on supporting this in qemu. Not ready yet, need some
time. But, with API i
suggest, things are really much-much simpler.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Resea
Hi!
> OK so both of you say the same thing. Will respin accordingly
You may also want to add this:
Tested-by: Pavel Fedin
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvm
my modified qemu now has kvm_msi_flags global variable which
defaults to 0. ITS
code, then, if activated, changes it to KVM_MSI_VALID_DEVID, and qemu starts
supplying device IDs to
the related calls.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electroni
_MSI_VALID_DEVID;
kvm_gsi_routing_allowed = true;
kvm_msi_via_irqfd_allowed = true;
}
--- cut ---
I can post my sets as RFCs to qemu mailing list, if you want to take a look at
the whole change
set.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
_
> Just so I'm sure I understand: The way the kernel differentiates between
> no-devid and devid==0, is whether or not the devid flag is set, correct?
Yes, exactly.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research ce
ID_DEVID and we
already have 'flags'
field. Using them would just make the API more consistent because
KVM_SIGNAL_MSI already uses them
in absolutely the same manner. That's my point and nothing more.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
ld throw it away
completely and invent
KVM_SIGNAL_EXT_MSI ioctl for sending MSIs with device ID. This would also be
consistent IMO.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists
Makes qemu working again with kernel-irqchip=off option
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 78fb820..3420657 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm
Allows to use KVM on hardware without vGIC. Interrupt controller has to be
emulated in userspace in this case.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index
om in-kernel virtual timer to the interrupt controller emulated in
userspace.
Pavel Fedin (2):
Fix NULL pointer dereferences if KVM is used without in-kernel irqchip
Detect vGIC presence at runtime
arch/arm/kvm/arm.c | 19 ++-
virt/kvm/arm/vgic.c | 5 -
2 files change
c code, which
> returns -EINVAL atm. So I plan to introduce this capability already with
> the ITS emulation series, so we can just pick it up in the IRQ routing
> series.
Then may be you follow https://lkml.org/lkml/2015/7/7/115 and replace flag
with something like
KVM_SIGNAL_EXT_MSI io
l(), because userland
can choose just not
to use vGIC for some reason (testing for example).
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
a function which you suggest.
Then:
1. Situation with missing vGIC is just considered to be normal; it's not a
to-be-ignored error any
more.
2. "vGIC present" situation is automatically determined by vgic_ops != NULL;
this means that probe
function completely worked and vGIC implementati
nce we agreed on not using flags,
i would suggest to
have KVM_SIGNAL_EXTENDED_MSI counterpart, which also doesn't use flags.
I know, we were already talking about it, so, if this gets ignored for the
second time, i assume
the Architects decided that fancy APIs are cool, and i promise to stop t
ddress_lo = (uint32_t)msg.address;
kroute.u.msi.address_hi = msg.address >> 32;
kroute.u.msi.data = le32_to_cpu(msg.data);
kroute.flags = kvm_msi_flags;
--- cut ---
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
of context switches have impact.
Actually, the problem is very poor vhost-net throughput, which jumps up when i
start the profiler
and goes back down when i stop it. Just to note...
I'm off since now for a small vacation, will be back on monday or tuesday. See
you guys!
Kind regards,
e can reuse existing ones. IMHO using flag would
make an API more
consistent.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailm
urces. Normally this means that vGIC hardware is defunct.
Any other code is still treated as full stop because it might mean some really
serious problems.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/ar
have
complete implementation of API which allows to emulate GIC in userspace by
qemu, and now i can run any virtual machine, including generic timer, on
vGIC-less machine. RasPI-2 is expected to benefit too.
Pavel Fedin (3):
KVM: arm: Fix NULL pointer dereference if KVM is used without
in-kernel
Makes qemu working again with kernel-irqchip=off option
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index d9631ec..5668c4e 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
Necessary for KVM without irqchip to function on ARM64. Allows to use
software GICv2 emulation where hardware acceleration is not available.
Signed-off-by: Pavel Fedin
---
arch/arm/include/asm/kvm_host.h | 5 +
arch/arm64/include/asm/kvm_asm.h | 1 +
arch/arm64/include/asm/kvm_host.h | 8
That was the problem.
Ok, this is 64-bit-specific, i can fix this up later. My patch set can be used
without 0003, in
this case it will fix only ARM32 architecture. So if you would like to accept
the rest, you can do
it.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research c
Hello!
> You may want to check commit 8a14849, which makes this whole patch
> irrelevant.
I have tested, the new code just works without patch No 0003. Simply throw it
away from the set.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center
s at it later is
> the ITS emulation anyway, any other code path simply ignores that.
Sorry for delayed reply, i'm a bit busy so cannot check all the emails in
time...
This is one more reason for using KVM_MSI_VALID_DEVID flag with
KVM_IRQ_ROUTING_MSI. In this case
you don't have to
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> Of Andre Przywara
> Sent: Friday, July 10, 2015 5:22 PM
> To: marc.zyng...@arm.com
2M or ITS emulation), I think it is acceptable to
> require a late, per-VM capability check in userland in that case.
Well, agree, and formally this is more correct. Just it would require slightly
more additions to
qemu. But it's not a real p
Hello!
> this respin tries to address all comments I got so far from the list.
> Thanks to Eric, Pavel and Christoffer for the review!
Tested-by: Pavel Fedin
Works fine.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center
t set */
> +
> route.msi.address_lo = msi->address_lo;
> route.msi.address_hi = msi->address_hi;
> route.msi.data = msi->data;
> --
> 1.9.1
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Hello!
> >> > +} else if (!msi->flags)
> >> > +return -EINVAL;
> > Did you mean "if (msg->flags)" here (inverted condition)?
>
> Indeed, and also you need { } around the return for the QEMU coding
> standard.
addresses
this scenario too, just
needs some extra bits on vtimer side (ability to init KVM without it).
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
estore this functionality.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
without both vGIC
and vTimer ? It will be an emulator's problem how to handle them then.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
n manipulations with
ARCH_TIMER_CTRL_IT_MASK. Without it i'm going to get multiple interrupts
instead of only one. It
would be possible to signal the interrupt as real level-sensitive (since we
will be tracking active
state), but... it's not possible to know when to deactivate the line, har
nd
vTimer, and that's all we do? It will be userland's problem how to handle them.
I need to tweak my
first patchset a very small bit in order to do this.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
der to do this.
>
> I I'll repeat what I already said: "Show me the patches".
>
> I'll only give you an answer once I exactly know what you're up to.
You have already seen them, it is the very same patchset we are discussing in
this thread.
Kind regards,
),
just for simplicity.
Ignoring would happen automatically, because IIRC older kernels do not
explicitly check 'pad' for
being zero, do they? And indeed in this case the userland can supply devid
unconditionally, making
things even simpler.
Kind regards,
Pavel Fedin
Ex
devIDs.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
despite it's indeed a small bit redundant. But i see that
kernel's policy is
to have insurance against all possible and impossible bad inputs, and the flag
really fits into the
concept.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung El
Now at least ARM is able to determine whether the machine has
virtualization support for irqchip or not at runtime. Obviously,
irqfd requires irqchip.
Signed-off-by: Pavel Fedin
---
This has to be verified with PowerPC and S390 maintainers. I've got an
impression that KVM_CAP_IRQCH
M ends in a
HYP crash because of unset vGIC save/restore function pointers
Pavel Fedin (3):
Fix NULL pointer dereference if KVM is used without in-kernel irqchip
Detect vGIC presence at runtime
Make KVM_CAP_IRQFD dependent on KVM_CAP_IRQCHIP
arch/arm/kvm/arm.c | 19 ---
vi
kvm_vgic_map_resources()
call without vGIC instantiation attempts to call
vm_ops.map_resources == NULL
The bug was introduced in b26e5fdac43c1b7c394502917e42e3b91f3aa1a3
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/kvm
timer which can be emulated in userspace.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 199a50a..1039161 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/
Tested-by: Pavel Fedin
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: Eric Auger [mailto:eric.au...@linaro.org]
> Sent: Monday, August 03, 2015 6:31 PM
> To: eric.au...@st.com; eric.au...@linaro.org;
>
ll.
I would love to go there, and my company wanted to send me there. But it
appears to be extremely difficult for a tech specialist from Russia to get a US
visa. They are still considering me and the time is running out, so i'm
unlikely to attend, unfortunately.
Kind regards,
Pavel Fedin
Print exception vector name, exception class and PC translated to EL1 virtual
address. Significantly aids debugging HYP crashes without special means like
JTAG.
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/handle_exit.c | 30 +
arch/arm64/kvm/hyp.S | 46
space
> similar to gicv2 in QEMU for gicv3.
This thing is optional and can be missing. It is for backwards compatibility
only, it allows to run GICv2 guests on GICv3. You should not use this API for
accessing system registers.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electr
PING
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> Of Pavel Fedin
> Sent: Wednesday, August 05, 2015 1:54 PM
> To: kvmarm@lists.
missing CP15 (or system in case of ARM64) registers. So,
this timer issue is
not grave, just i postpone implementing it until GIC issues are settled down.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm ma
hen we apparently don't have vGIC, and since
we know that vGIC and
vTimer are paired, we know that there is no vTimer too.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists
timer which can be emulated in userspace.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index fddaa2e..b44e53c 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/
dling in correct place
v1 => v2:
- Do not use defensive approach in patch 0001. Use correct conditions in
callers instead
- Added ARM64-specific code, without which attempt to run a VM ends in a
HYP crash because of unset vGIC save/restore function pointers
Pavel Fedin (3):
Fix NULL pointer
kvm_vgic_map_resources()
call without vGIC instantiation attempts to call
vm_ops.map_resources == NULL
The bug was introduced in b26e5fdac43c1b7c394502917e42e3b91f3aa1a3
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/kvm
Now at least ARM is able to determine whether the machine has
virtualization support for irqchip or not at runtime. Obviously,
irqfd requires irqchip.
Signed-off-by: Pavel Fedin
---
virt/kvm/kvm_main.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/virt/kvm/kvm_main.c
PING
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> Of Pavel Fedin
> Sent: Tuesday, August 11, 2015 10:34 AM
> To: kvmarm@lists.cs.
Hello!
> Please be more patient. For example, if a month or more passes without
> you hearing anything, then it's ok to ask what the plans are.
Ok, sorry, i didn't know about recommended turnaround times here.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics
Hello! Where are you? I'd like to take a look at your code.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: Vijay Kilari [mailto:vijay.kil...@gmail.com]
> Sent: Tuesday, August 11, 2015 6:16 PM
> To:
t will not
get this interrupt.
This patch fixes the problem by bringing back unconditional setting of
LR_STATE_PENDING bit.
The bug was caught on Cavium ThunderX machine, kernel v4.1.6, running
qemu "virt" guest, where it affected pl011 driver.
Signed-off-by: Pavel Fedin
---
vir
FIFO.
Could this be some
bug in kernel's pl011 driver itself, which does something wrong and does not
handle interrupts in a
proper way during output?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
__
--
Alex, are you reading us? Can you explain, why you introduced that extra check?
> And what you're suggesting is to actually introduce a bug.
Why would that be a bug, if it was not a bug in kernel 4.0?
Kind regards,
Pavel Fedin
Expert Engine
is
queued. Can we say
that this is wrong?
If you agree, may be do something else instead? May be we should cancel such
"ghost" interrupts
early, avoiding immediate and completely unnecessary maintenance interrupts
upon guest entry?
Kind regards,
Pavel Fedin
Expert Engineer
Samsun
an alternate solution like this,
i will test it, and
adjust if needed. My "bad codebase, broken HW and buggy userspace" appears to
be particulary prone
to finding these problems, i think it's going to be a nice testbed. :)
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electro
nning qemu "virt" guest,
where it was caused by emulated pl011.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 34dad3c..bf155e3 100644
--- a/virt/kvm/arm/vgic.
eans that we are going to lose everything.
An alternate would be: clear the bit, THEN call vgic_update_state() which
would set it back if
necessary. But does this extra bit of complexity worth anything, given one
paragraph above?
Kind regards,
Pavel Fedin
Ex
Call accessor functions if the register is defined in the list but does
not have accociated cell in CPU context.
This allows to implement accessors for vGIC CPU interface, necessary for
live migration.
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/sys_regs.c | 47
This patchset adds necessary userspace API in order to support vGICv3 live
migration. This includes accessing GIC distributor and redistributor memory
regions using device attribute ioctls, and system registers of
CPU interface using register get/set ioctls.
Pavel Fedin (3):
KVM: arm64
The access is done similar to GICv2, using KVM_DEV_ARM_VGIC_GRP_DIST_REGS
and KVM_DEV_ARM_VGIC_GRP_REDIST_REGS with KVM_SET_DEVICE_ATTR and
KVM_GET_DEVICE_ATTR ioctls.
Registers are always assumed to be of their native size, 4 or 8 bytes.
Signed-off-by: Pavel Fedin
---
arch/arm64/include/uapi
This commit adds accessors for all registers, being part of saved vGIC
context in the form of ICH_VMCR_EL2. This is necessary for enabling vGICv3
live migration.
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/sys_regs.c | 176 +
include/linux/irqchip
atch helped a lot to find out what was wrong. The main
missing information
was vector number, and translated PC is also useful.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.c
d implementing this as
device attribute would, i guess, give no difference from code's point of view.
We would have to encode system register numbers into attribute, then perform
table lookup, actually duplicating our system register access code. Does it
worth that?
Kind regards,
Pavel Fedi
ed on. By the way,
handling it in userspace would also be simpler.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
ad HYP_PAGE_OFFSET
>> -.quad PAGE_OFFSET
> why can you get rid of this?
Because i was used only to translate base address of text message, which moved
to C code.
> I'll think about it.
Ok.
Kind regards,
Pavel Fedin
Expert
Hello! Two weeks has passed, i have fixed up Marc's notes, so PING...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> Of Pave
t difficult to deal
with CPU fd's.
Because anyway you have to iterate through all VCPUs in order to save state
correctly.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing list
kvmarm@lis
tate of any
other vCPUs. And, since i am getting/setting its registers, i assume that the
vCPU is not running.
Well, i added the check. What next?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
___
kvmarm mailing
y.
I thought about it too, it's inconvenient. In the userland you would have to
do two accesses and
merge the result. It's just tedious. After all this API is not emulating guest
behavior, it's just
for reading/writing GIC state.
So on next respin i'll add size bit.
Kind
full 64-bit
accesses.
Signed-off-by: Pavel Fedin
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 34 -
arch/arm64/include/uapi/asm/kvm.h | 2 +
virt/kvm/arm/vgic-v3-emul.c| 96 ++
3 files changed, 115 insertions(+), 17 deletions
for distributor and redistributor register
accesses, do not assume size any more.
- Lots of refactor and reusable code extraction.
- Added forgotten documentation
Pavel Fedin (5):
KVM: arm/arm64: Refactor vGIC attributes handling code
KVM: arm64: Implement vGICv3 distributor and redistribu
Replace Rt with data pointer in struct sys_reg_params. This will allow to
reuse system register handling code in implementation of vGICv3 CPU
interface access API. Additionally, got rid of "massive hack"
in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/
Separate all implementation-independent code in vgic_attr_regs_access()
and move it to vgic.c. This will allow to reuse this code for vGICv3
implementation.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic-v2-emul.c | 126 +---
virt/kvm/arm/vgic.c
running.
Signed-off-by: Pavel Fedin
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 38 +++-
arch/arm64/include/uapi/asm/kvm.h | 7 +
include/linux/irqchip/arm-gic-v3.h | 18 +-
virt/kvm/arm/vgic-v3-emul.c| 246 +
4 files
In order to implement vGICv3 CPU interface access, we will need to perform
table lookup of system registers. We would need both index_to_params() and
find_reg() exported for that purpose, but instead we export a single function
which combines them both.
Signed-off-by: Pavel Fedin
---
arch/arm64
1 - 100 of 299 matches
Mail list logo
