On Mon, Feb 08, 2016 at 01:56:34PM +0100, Eric Auger wrote:
> > Do you mean the GIC itself? From registers, it appears to be a standard ARM
> > GIC, though i'm not sure exactly which one yet. However, it's stated in the
> > processor's datasheet that legacy interrupts aren't supported. It's one of
Hi Edward,
On 02/08/2016 12:13 PM, Edward Cragg wrote:
> Hi Eric,
>
> On Thu, Feb 04, 2016 at 06:30:34PM +0100, Eric Auger wrote:
>> Hi Edward,
>> On 02/04/2016 05:53 PM, Edward Cragg wrote:
>>> Hi,
>>>
>>> I'm involved in planning a project for which there is a requirement for PCIe
>>> passthroug
Hi Eric,
On Thu, Feb 04, 2016 at 06:30:34PM +0100, Eric Auger wrote:
> Hi Edward,
> On 02/04/2016 05:53 PM, Edward Cragg wrote:
> > Hi,
> >
> > I'm involved in planning a project for which there is a requirement for PCIe
> > passthrough in KVM on ARMv8. We have no hardware to test on at the momen
Hi Edward,
On 02/04/2016 05:53 PM, Edward Cragg wrote:
> Hi,
>
> I'm involved in planning a project for which there is a requirement for PCIe
> passthrough in KVM on ARMv8. We have no hardware to test on at the moment.
>
> I understand that virtualisation support for ARM is quite young, and it se
Hi,
I'm involved in planning a project for which there is a requirement for PCIe
passthrough in KVM on ARMv8. We have no hardware to test on at the moment.
I understand that virtualisation support for ARM is quite young, and it seems
like support is trickling in at the moment for this sort of thi
