Simon Byrnand wrote:
At 12:46 26/03/2004, Simon Byrnand wrote:
At 18:17 25/03/2004, Andrew Hall wrote:
You need to recompile the kernel after altering this value in
linux/include/net/pkt_sched.h. Also remember that if using SFQ on leaf
qdisc, then the queue length may cause delay problems if
Strange, must be somthing else going on.
I had the same 40 to 50 percent too slow, which was completely fixed bij using
PSCHED_CPU in pkt_sched.h.
Using kernel 2.4.24, I measure the speed with the iptables byte counters.
On Fri, 26 Mar 2004 16:27:42 +1200
Simon Byrnand [EMAIL PROTECTED]
: Simon Byrnand [EMAIL PROTECTED]
To: Jeroen Vriesman [EMAIL PROTECTED]; [EMAIL PROTECTED]
Sent: Thursday, March 25, 2004 4:36 PM
Subject: Re: [LARTC] HTB speed
At 11:14 14/03/2004, Jeroen Vriesman wrote:
Hi,
just putting the answer to my own question here, for those who have
Byrnand [EMAIL PROTECTED]
- To: Jeroen Vriesman [EMAIL PROTECTED]; [EMAIL PROTECTED]
- Sent: Thursday, March 25, 2004 4:36 PM
- Subject: Re: [LARTC] HTB speed
-
-
- At 11:14 14/03/2004, Jeroen Vriesman wrote:
- Hi,
-
- just putting the answer to my own question here, for those
- who have the
- same
At 11:14 14/03/2004, Jeroen Vriesman wrote:
Hi,
just putting the answer to my own question here, for those who have the
same problem, and read the mailing list archive.
The timing of the P4 based on jiffies is hopeless, it's different for
every processor, and can be a wrong by a factor 3.
If
considerably. This change needs to be done in
linux/net/sched/sch_sfq.c. which also needs a kernel recompilation.
- Original Message -
From: Simon Byrnand [EMAIL PROTECTED]
To: Jeroen Vriesman [EMAIL PROTECTED]; [EMAIL PROTECTED]
Sent: Thursday, March 25, 2004 4:36 PM
Subject: Re: [LARTC] HTB
in pkt_sched.h:
#define PSCHED_CLOCK_SOURCE PSCHED_CPU
that's all, I wonder why it's not default to do this, or maybe it's an
idea to make the packet scheduler detect the presence of tsc when the
module is loaded.
Hi,
I think not all processors accept this #define PSCHED_CLOCK_SOURCE
Hi,
Indeed, changing the timer to 1000Hz is possible, it turned out that I have a machine
here running with a 1000Hz timer ticker. (I've installed a realtime kernel on it for
audio recording).
About your previous question, I've noticed that the system with 1000Hz ticker (which
has been
Indeed, changing the timer to 1000Hz is possible, it turned out that I
have a machine here running with a 1000Hz timer ticker. (I've installed a
realtime kernel on it for audio recording).
About your previous question, I've noticed that the system with 1000Hz
ticker (which has been running
Hi Jeroen,
Thanx for your fast answer.
to use the TSC, the processor has to have a tsc, you can see that in
/proc/cpuinfo, for as far as I know, every P4 has it (but I'm not sure),
it's in the flags of cpuinfo:
On my P4-1800:
flags : fpu vme de pse tsc msr pae mce cx8 apic sep
Hi,
to use the TSC, the processor has to have a tsc, you can see that in /proc/cpuinfo,
for as far as I know, every P4 has it (but I'm not sure), it's in the flags of
cpuinfo:
On my P4-1800:
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat
pse36 clflush dts
List,
I just logged in to a machine with a modern AMD cpu, it also has a TSC.
[EMAIL PROTECTED]:~ cat /proc/cpuinfo
processor : 0
vendor_id : AuthenticAMD
cpu family : 6
model : 6
model name : AMD Athlon(TM) XP 2000+
stepping: 2
cpu MHz : 1668.736
Hi,
just putting the answer to my own question here, for those who have the same problem,
and read the mailing list archive.
The timing of the P4 based on jiffies is hopeless, it's different for every
processor, and can be a wrong by a factor 3.
If the tsc (time stamp counter) is used, the
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