On Tue, Aug 13, 2013 at 10:32:57AM -0500, Felipe Balbi wrote:
> On Mon, Aug 12, 2013 at 02:52:33PM -0400, Alan Stern wrote:
> > On Mon, 12 Aug 2013, Felipe Balbi wrote:
> > > anything that USB[23]0CV supports today. There are even link layer tests
> > > for USB3 and a bunch of others. This SINGLE_S
David Brown writes:
> The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
>
> Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git
> tags/msm-cleanup3-for-3.12
>
On 08/09/2013 03:53 AM, Ivan T. Ivanov wrote:
> From: "Ivan T. Ivanov"
>
> MSM USB3.0 core wrapper consist of USB3.0 IP (SNPS)
> and HS, SS PHY's controll and configuration registers.
s/controll/control/
> It could operate in device mode (SS, HS, FS) and host
> mode (SS, HS, FS, LS).
> diff --
On 08/13, Mike Turquette wrote:
> Quoting Stephen Boyd (2013-08-12 22:03:34)
> > The clock controller is hardware and the number of clock outputs
> > is fixed. Isn't all hardware fixed until you start talking about
> > FPGAs? The next minor revision of the clock controller may add
> > more clocks o
On Tue, 13 Aug 2013, Felipe Balbi wrote:
> > That's not what I meant. Yes, the test-device driver knows what test
> > it wants to run, based on the VID/PID. I was asking how it would
> > communicate this knowledge to the HCD.
> >
> > For example, it doesn't make sense to have a callback that me
On 8/12/2013 10:35 AM, Stephen Boyd wrote:
On 07/29/13 15:00, Kumar Gala wrote:
diff --git a/drivers/hwspinlock/msm_hwspinlock.c
b/drivers/hwspinlock/msm_hwspinlock.c
new file mode 100644
index 000..dbd9a69
--- /dev/null
+++ b/drivers/hwspinlock/msm_hwspinlock.c
@@ -0,0 +1,150 @@
+/*
+ * Co
On Mon, Aug 12, 2013 at 02:52:33PM -0400, Alan Stern wrote:
> On Mon, 12 Aug 2013, Felipe Balbi wrote:
>
> > > > maybe a single callback for supporting 'testmodes' ? which receives the
> > > > test mode as argument ?
> > >
> > > I don't have a clear picture of how you would apply such an approach
Reviewed-by: Yaniv Gardi
QUALCOMM ISRAEL, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
= > -Original Message-
= > From: linux-scsi-ow...@vger.kernel.org [mailto:linux-scsi-
= > ow...@vger.kernel.org] On Behalf Of Dolev Ra
Reviewed-by: Yaniv Gardi
QUALCOMM ISRAEL, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
= > -Original Message-
= > From: linux-scsi-ow...@vger.kernel.org [mailto:linux-scsi-
= > ow...@vger.kernel.org] On Behalf Of Dolev Ra
Reviewed-by: Yaniv Gardi
QUALCOMM ISRAEL, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
= > -Original Message-
= > From: linux-scsi-ow...@vger.kernel.org [mailto:linux-scsi-
= > ow...@vger.kernel.org] On Behalf Of Dolev Ra
Reviewed-by: Yaniv Gardi
QUALCOMM ISRAEL, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
= > -Original Message-
= > From: linux-scsi-ow...@vger.kernel.org [mailto:linux-scsi-
= > ow...@vger.kernel.org] On Behalf Of Dolev Ra
Quoting Stephen Boyd (2013-08-12 22:03:34)
> On 08/08, Mark Rutland wrote:
> > Hi Stephen,
> >
> > On Thu, Jul 25, 2013 at 01:43:37AM +0100, Stephen Boyd wrote:
> > > Fill in the data and wire up the global clock controller to the
> > > MSM clock driver. This should allow most non-multimedia devic
On 8/13/2013 7:23 PM, Josh Cartwright wrote:
On Tue, Aug 13, 2013 at 04:30:18PM +0530, Sujit Reddy Thumma wrote:
[..]
diff --git a/drivers/scsi/ufs/ufshcd-pci.c b/drivers/scsi/ufs/ufshcd-pci.c
index a823cf4..829f7a4 100644
--- a/drivers/scsi/ufs/ufshcd-pci.c
+++ b/drivers/scsi/ufs/ufshcd-pci.c
@
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipsets.
CC: Asutosh Das
CC: Venkat Gopalakrishnan
CC: Sahitya Tummala
CC: Subhash Jadavani
Signed-off-by: Georgi Djakov
---
Changes from v1:
- GPIO references are replaced by pinctr
On Aug 13, 2013, at 1:01 AM, Ohad Ben-Cohen wrote:
> On Mon, Aug 12, 2013 at 8:24 PM, Kumar Gala wrote:
>> So I think I'd ask you to recommend a name, should we just us 'hwspinlock'.
>> The general view from ePAPR and dts is the node name should be a bit more
>> generic (like ethernet or pci)
On Tue, Aug 13, 2013 at 04:30:18PM +0530, Sujit Reddy Thumma wrote:
[..]
> diff --git a/drivers/scsi/ufs/ufshcd-pci.c b/drivers/scsi/ufs/ufshcd-pci.c
> index a823cf4..829f7a4 100644
> --- a/drivers/scsi/ufs/ufshcd-pci.c
> +++ b/drivers/scsi/ufs/ufshcd-pci.c
> @@ -191,7 +191,13 @@ ufshcd_pci_probe(s
Add generic clock initialization support for UFSHCD platform
driver. The clock info is read from device tree using standard
clock bindings. A generic max-clock-frequency-hz property is
defined to save information on maximum operating clock frequency
the h/w supports.
Signed-off-by: Sujit Reddy Thu
Some vendor specific controller versions might need to configure
vendor specific - registers, clocks, voltage regulators etc. to
initialize the host controller UTP layer and Uni-Pro stack.
Provide some common initialization operations that can be used
to configure vendor specifics. The methods can
UFS HCI specificaiton allows the hardware vendors to have vendor specific
configurations using a dedicated register space. Most of these register
configurations are unique to each controller. The generic UFSHCD exports
a set of useful vendor operations that can be used to configure the host
control
UFS devices are powered by at most three external power supplies -
- VCC - The flash memory core power supply, 2.7V to 3.6V or 1.70V to 1.95V
- VCCQ - The controller and I/O power supply, 1.1V to 1.3V
- VCCQ2 - Secondary controller and/or I/O power supply, 1.65V to 1.95V
For some devices VCCQ or V
Hi,
On Mon, 2013-08-12 at 13:04 -0500, Felipe Balbi wrote:
> On Fri, Aug 09, 2013 at 10:31:58AM -0500, Kumar Gala wrote:
> >
> > On Aug 9, 2013, at 4:53 AM, Ivan T. Ivanov wrote:
> >
> > > From: "Ivan T. Ivanov"
> > >
> > > MSM USB3.0 core wrapper consist of USB3.0 IP (SNPS)
> >
> > probab
Hi,
On Fri, 2013-08-09 at 10:31 -0500, Kumar Gala wrote:
> On Aug 9, 2013, at 4:53 AM, Ivan T. Ivanov wrote:
>
> > From: "Ivan T. Ivanov"
> >
> > MSM USB3.0 core wrapper consist of USB3.0 IP (SNPS)
>
> probably good to spell out Synopsys rather than SNPS
I could make it look like this? Syn
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