Kevin Hilman <khil...@kernel.org> writes:
> Bjorn Andersson <bjorn.anders...@sonymobile.com> writes:
>
>> The Honami device does not boot due to the lack of pinctrl support
>> compiled in with the multi_v7_defconfig. This patch correct this and
>>
Lina Iyer <lina.i...@linaro.org> writes:
> On Thu, Nov 19 2015 at 16:35 -0700, Kevin Hilman wrote:
>>Lina Iyer <lina.i...@linaro.org> writes:
>>
>>> Reading the next wakeup of the CPU can only be realiably done only from
>>> that CPU. In the idle
Lorenzo Pieralisi writes:
> On Tue, Nov 17, 2015 at 03:37:42PM -0700, Lina Iyer wrote:
>> A PM domain comprising of CPUs may be powered off when all the CPUs in
>> the domain are powered down. Powering down a CPU domain is generally a
>> expensive operation and
Lina Iyer writes:
> A PM domain comprising of CPUs may be powered off when all the CPUs in
> the domain are powered down. Powering down a CPU domain is generally a
> expensive operation and therefore the power performance trade offs
> should be considered. The time between
Lina Iyer writes:
> Allow domain states to hold additional state related data in a u32
> value. This may be used by the platform driver.
Should probably expand the changelog here to give some examples how how
this might be used by the platform driver.
Kevin
--
To
Lina Iyer writes:
> Notify runtime PM when the CPU is going to be powered off in the idle
> state. This allows for runtime PM suspend/resume of the CPU as well as
> its PM domain.
>
> Cc: Daniel Lezcano
> Cc: Lorenzo Pieralisi
Lina Iyer writes:
> Allow devices that know when their next wakeup event is, to record save
> it as part of timing data. A genpd governor may use this data to
> determine if suspending the domain is going to affect the QoS of its
> devices.
>
> Signed-off-by: Lina Iyer
Lina Iyer writes:
> Reading the next wakeup of the CPU can only be realiably done only from
> that CPU. In the idle enter path record the next wake up of the CPU. The
> information is useful to determine the sleep time left for the CPU.
>
> Signed-off-by: Lina Iyer
ck controller with
> big endian IO accesses even though the device is little endian.
>
> Specify the endianness explicitly so that the regmap core
> properly byte swaps the accesses for us.
>
> Reported-by: Kevin Hilman <khil...@linaro.org>
> Cc: Simon Arlott <si...@fi
Hi Stephen,
Stephen Boyd writes:
> This patchset documents a compatible string format that encodes
> all the information that was being encoded in qcom specific DT
> properties in downstream msm kernels. The goal being to come
> up with a format that will allow us to
Hi Srini,
On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla
wrote:
> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
> IFC6410.
>
> Signed-off-by: Srinivas Kandagatla
kernelci.org found some new boot
Hi Andy,
Andy Gross writes:
> The following changes since commit 4040f37692ffbc602117d316c574a68a0fbfed93:
>
> Merge tag 'qcom-dt-for-4.3' into for-dt (2015-08-27 12:07:21 -0500)
>
> are available in the git repository at:
>
>
>
On Fri, Aug 7, 2015 at 9:18 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
Thanks Kevin,
On 07/08/15 17:13, Kevin Hilman wrote:
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
This patchset adds a new simple NVMEM framework to kernel, and it is
tested
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
This patchset adds a new simple NVMEM framework to kernel, and it is tested
with various drivers like QCOM thermal sensors, QCOM cpr driver,
begal bone cape manager and few more on the way.
Can you please consider this as 4.3
Stephen Boyd sb...@codeaurora.org writes:
On 03/13/2015 11:51 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 11:09 Fri 13 Mar , Stephen Boyd wrote:
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Jean-Christophe Plagniol-Villard plagn...@jcrosoft.com
Cc:
Stephen Boyd sb...@codeaurora.org writes:
On 06/08/2015 02:33 PM, Kevin Hilman wrote:
Stephen Boyd sb...@codeaurora.org writes:
On 06/03, Russell King - ARM Linux wrote:
On Tue, Jun 02, 2015 at 12:12:57PM -0700, Stephen Boyd wrote:
Some platforms always enter the kernel in the ARM state
() that switches into THUMB2 state.
This fixes a problem reported by Kevin Hilman on next-20150601
where the ifc6410 fails to boot a THUMB2 kernel because the
platform's firmware always enters the kernel in ARM mode from
deep idle states.
I think this bit of the commit message isn't quite
Rajendra Nayak rna...@codeaurora.org writes:
Hi Kevin,
Curious how are you testing this? with which thermal governor?
I have been mostly testing this with step wise on the db410c target
board.
I'm experimenting with the new thermal power_allocator governor
currently in linux-next, and
Hi Rajendra,
Rajendra Nayak rna...@codeaurora.org writes:
tsens is qualcomms' thermal temperature sensor device. It
supports reading temperatures from multiple thermal sensors
present on various QCOM SoCs.
Calibration data is generally read from a eeprom device.
Add a skeleton driver with
[+ Javi, Punit for power_allocator questions ]
Hi Rajendra,
Rajendra Nayak rna...@codeaurora.org writes:
This is an attempt to have a single tsens driver for
the different versions of the tsens IP that exist, on
different qcom msm/apq SoCs.
Support is added for msm8916, msm8960 and msm8974
arm-soc and
be squashed into one patch or stay split out. Either way, we have a
cross maintainer dependency here that needs to be resolved.
Tested-by: Kevin Hilman khil...@linaro.org
Boot tested on top of next-20150602 using multi_v7_defconfig +
CONFIG_THUMB2_KERNEL=y on a handful of qcom 8x[678]4
Geert Uytterhoeven ge...@linux-m68k.org writes:
On Fri, Apr 24, 2015 at 12:58 PM, Rajendra Nayak rna...@codeaurora.org
wrote:
Second, I want to see less users of pm_clk_add_notifier() since it's
not the proper/long-term way of how to assign PM domain pointers to a
device. Instead that shall
Rajendra Nayak rna...@codeaurora.org writes:
Remove all clock handling from the driver as this is not handled from
within platform runtime callbacks.
s/not/now/ ??
Kevin
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Rajendra Nayak rna...@codeaurora.org writes:
On 23 April 2015 at 10:45, Rajendra Nayak rna...@codeaurora.org wrote:
With platform support now in place to manage clocks from within runtime
PM
callbacks, get rid of all clock handling from the driver and convert the
driver to use runtime PM
Chidambaram pchid...@codeaurora.org
Original tree available at -
git://codeaurora.org/quic/la/kernel/msm-3.10.git
Cc: Stephen Boyd sb...@codeaurora.org
Cc: Arnd Bergmann a...@arndb.de
Cc: Kevin Hilman khil...@linaro.org
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Lina Iyer lina.i
Kumar Gala ga...@codeaurora.org writes:
The top level qcom,msm-id and qcom,board-id are utilized by bootloaders
on Qualcomm MSM platforms to determine which device tree should be
utilized and passed to the kernel.
Cc: devicet...@vger.kernel.org
Signed-off-by: Kumar Gala ga...@codeaurora.org
Lina Iyer lina.i...@linaro.org writes:
A core can be powered down for cpuidle or when it is hotplugged of.
s/of/off/ ?
In
either case, the warmboot return address would be different. Allow
setting the warmboot address for a specific cpu, optimize and write to
the firmware if the address
Lina Iyer lina.i...@linaro.org writes:
Dependent patchsets -
https://lkml.org/lkml/2014/8/4/767
http://www.spinics.net/lists/linux-arm-msm/msg10799.html
http://www.spinics.net/lists/linux-arm-msm/msg10795.html
Changes since v13:
- Return values for idle states
Oops, I thought I had sent this, but it was sitting in the drafts
folder. Sending anyways because it looks like most of these issues
still exist in v10.
Lina Iyer lina.i...@linaro.org writes:
SPM is a hardware block that controls the peripheral logic surrounding
the application cores
Daniel Lezcano daniel.lezc...@linaro.org writes:
On 11/21/2014 07:03 PM, Lina Iyer wrote:
Add cpuidle driver interface to allow cpus to go into C-States. Use the
cpuidle DT interface, common across ARM architectures, to provide the
idle state information to the cpuidle framework.
Supported
/soc/qcom/spm.c
@@ -0,0 +1,328 @@
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
nit: one more multi-line coding style missed (no need to repost just for
this, feel free to just updated it locally)
After that, feel free to add:
Reviewed-by: Kevin Hilman khil
at probe time. Restore this behavior by
generating a dynamic id if the line number is still negative
after checking for an alias or in the non-DT case looking at the
.id field of the platform device.
Reported-by: Kevin Hilman khil...@kernel.org
Tested-by: Kevin Hilman khil...@linaro.org
Signed-off
Stephen Boyd sb...@codeaurora.org writes:
On 11/13/2014 04:46 PM, Frank Rowand wrote:
On 11/13/2014 11:31 AM, Stephen Boyd wrote:
Sorry, I'm sort of lost. If there are serial aliases in the dts file,
then we should alias all of the serial ports. If there aren't aliases
then we're backwards
Stephen Boyd sb...@codeaurora.org writes:
On 11/10/2014 10:54 AM, Kevin Hilman wrote:
On Wed, Oct 22, 2014 at 5:33 PM, Stephen Boyd sb...@codeaurora.org wrote:
We rely on probe order of this driver to determine the line number for
the uart port. This makes it impossible to know the line
On Wed, Oct 22, 2014 at 5:33 PM, Stephen Boyd sb...@codeaurora.org wrote:
We rely on probe order of this driver to determine the line number for
the uart port. This makes it impossible to know the line number
when these devices are populated via DT. Use the DT alias
mechanism to assign the
Hi Kumar,
Kumar Gala ga...@codeaurora.org writes:
Will not make the 3.18 merge window. I will queue it up for 3.19.
Yes, it's too late for the merge window proper, but since it's DT only
support for new platform, you can submit it as a fix to us (arm-soc) for
v3.18-rc.
In fact, if you chose
Lina Iyer lina.i...@linaro.org writes:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes over the putting the core in low
Lina Iyer lina.i...@linaro.org writes:
Add SPM device bindings for QCOM 8084 based cpus. SPM is the sub-system
power manager and controls the logic around the cores (cpu and L2).
Each core has an instance of SPM and controls only that core. Each cpu
SPM is configured to support WFI and SPC
Lina Iyer lina.i...@linaro.org writes:
On Mon, Sep 29 2014 at 17:37 -0600, Stephen Boyd wrote:
On 09/26/14 17:58, Lina Iyer wrote:
Based on work by many authors, available at codeaurora.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
[lina: simplify the driver for an initial submission,
Lorenzo Pieralisi lorenzo.pieral...@arm.com writes:
Hi Lina,
On Sat, Sep 27, 2014 at 01:58:13AM +0100, Lina Iyer wrote:
Add cpuidle driver interface to allow cpus to go into C-States. Use the
cpuidle DT interface common across ARM architectures to provide the
C-State information to the
On Tue, Sep 30, 2014 at 10:51 AM, Nicolas Pitre
nicolas.pi...@linaro.org wrote:
On Tue, 30 Sep 2014, Kevin Hilman wrote:
Lorenzo Pieralisi lorenzo.pieral...@arm.com writes:
Hi Lina,
On Sat, Sep 27, 2014 at 01:58:13AM +0100, Lina Iyer wrote:
Add cpuidle driver interface to allow cpus
Nicolas Pitre nicolas.pi...@linaro.org writes:
On Tue, 30 Sep 2014, Kevin Hilman wrote:
On Tue, Sep 30, 2014 at 10:51 AM, Nicolas Pitre
nicolas.pi...@linaro.org wrote:
On Tue, 30 Sep 2014, Kevin Hilman wrote:
Lorenzo Pieralisi lorenzo.pieral...@arm.com writes:
[...]
This may
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
These patches adds dt nodes for RPM, USB and SATA IPs found in APQ8064.
All the driver support for these IPs are already available in v3.17, except
the RPM driver which is now accepted by Lee and Mark.
These patches depend on the
Lina Iyer lina.i...@linaro.org writes:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes over the putting the core in low
Lina Iyer lina.i...@linaro.org writes:
On Wed, Sep 24 2014 at 12:07 -0600, Kumar Gala wrote:
On Sep 23, 2014, at 6:51 PM, Lina Iyer lina.i...@linaro.org wrote:
Based on work by many authors, available at codeaurora.org
SPM is a hardware block that controls the peripheral logic surrounding
Lina Iyer lina.i...@linaro.org writes:
On Fri, Sep 26 2014 at 13:04 -0600, Kevin Hilman wrote:
Lina Iyer lina.i...@linaro.org writes:
On Wed, Sep 24 2014 at 12:07 -0600, Kumar Gala wrote:
[...]
General comment, lets use qcom instead of msm for various things.
[snip]
OK, Done. I renamed
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
On 24/09/14 16:22, Kevin Hilman wrote:
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
since commit 31964ffebbb9 (tty: serial: msm: Remove direct access to
GSBI)'
serial hangs if earlyprintk are enabled.
This hang
Srinivas Kandagatla srinivas.kandaga...@linaro.org writes:
since commit 31964ffebbb9 (tty: serial: msm: Remove direct access to GSBI)'
serial hangs if earlyprintk are enabled.
This hang is noticed only when the GSBI driver is probed and all the
earlyprintks before gsbi probe are seen on the
(not
honami-xperia)
After fixing that up, I was able to test it on my Z1 (Thanks Tim/Bjorn!)
but found I needed to add in the qcom,msm-id stuff first. I guess that
will be remedied with the updated mkbootimg tool, correct?
Anyways, after fixing the filename, feel free to add:
Tested-by: Kevin Hilman
On Tue, Sep 23, 2014 at 10:42 AM, Kumar Gala ga...@codeaurora.org wrote:
On Aug 15, 2014, at 12:41 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
The use case here is when we have a bootconsole which is printing the
characters on serial console and gsbi driver comes up after
Lina Iyer lina.i...@linaro.org writes:
Add allowable C-States for each cpu using the cpu-idle-states node.
ARM spec dictates WFI as the default idle state at 0. Support standalone
power collapse (power down that does not affect any SoC idle states) for
each cpu.
Signed-off-by: Lina Iyer
Lina Iyer lina.i...@linaro.org writes:
Signed-off-by: Lina Iyer lina.i...@linaro.org
Why the move? It looks like scm-boot.c still calls into the main
scm_call() stuff that still lives under arch/arm/mach-qcom, and not in
arm64, so I'm not seeing the motiviation for the change (and the
Lina Iyer lina.i...@linaro.org writes:
On Thu, Aug 21, 2014 at 03:24:44AM +0200, Daniel Lezcano wrote:
On 08/20/2014 12:15 AM, Lina Iyer wrote:
[...]
So IIUC, if you specify the index 1, that means the state[0] will be
the default WFI. But you override the callback below in the loop.
I
Lina Iyer lina.i...@linaro.org writes:
On Wed, Aug 27, 2014 at 10:18:24AM -0700, Kevin Hilman wrote:
Lina Iyer lina.i...@linaro.org writes:
Signed-off-by: Lina Iyer lina.i...@linaro.org
Why the move? It looks like scm-boot.c still calls into the main
scm_call() stuff that still lives under
Bjorn Andersson bj...@kryo.se writes:
On Tue, Jun 17, 2014 at 10:07 AM, Kevin Hilman khil...@linaro.org wrote:
+Paul Walmsley
Bjorn Andersson bjorn.anders...@sonymobile.com writes:
This series adds a regulator driver for the Resource Power Manager found in
Qualcomm 8660, 8960 and 8064
Kumar Gala ga...@codeaurora.org writes:
On Jun 18, 2014, at 10:53 AM, Kevin Hilman khil...@linaro.org wrote:
Bjorn Andersson bj...@kryo.se writes:
On Tue, Jun 17, 2014 at 10:07 AM, Kevin Hilman khil...@linaro.org wrote:
+Paul Walmsley
Bjorn Andersson bjorn.anders...@sonymobile.com
in the basic library functions so that we can boot apq8074
dragonboards again instead of crashing when we try to jump to
NULL function pointers.
Reported-by: Kevin Hilman khil...@linaro.org
Cc: Georgi Djakov gdja...@mm-sol.com
Cc: Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by: Stephen
Hi Kumar,
Kevin Hilman khil...@linaro.org writes:
Kumar Gala ga...@codeaurora.org writes:
Enable support for the MSM8x60, MSM8960, and MSM8974 SoCs, clocks and
serial console as part of the standard multi_v7_defconfig.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
I leave
Kevin Hilman khil...@linaro.org writes:
Stephen Boyd sb...@codeaurora.org writes:
On 02/28, Kevin Hilman wrote:
Hi Kumar,
Kevin Hilman khil...@linaro.org writes:
Kumar Gala ga...@codeaurora.org writes:
Enable support for the MSM8x60, MSM8960, and MSM8974 SoCs, clocks and
serial
Kumar Gala ga...@codeaurora.org writes:
On Feb 26, 2014, at 8:22 AM, Kevin Hilman khil...@linaro.org wrote:
Kumar Gala ga...@codeaurora.org writes:
Introduce a new mach-qcom that will support SoCs that intend to be
multiplatform compatiable while keeping mach-msm to legacy SoC/board
in
multi_v7_defconfig
Enable support for the MSM8x60, MSM8960, and MSM8974 SoCs, clocks and
serial console as part of the standard multi_v7_defconfig.
Signed-off-by: Kumar Gala ga...@codeaurora.org
[khilman: removed non-qcom changes]
Signed-off-by: Kevin Hilman khil...@linaro.org
---
arch/arm
Stephen Boyd sb...@codeaurora.org writes:
These patches add the clock controller nodes, enable the clock drivers
on MSM based platforms, and hook it up enough to get the serial console
working. This is based on the merge of Mike's clk-next branch with
linux-next-20140116. The changes need the
Josh Cartwright jo...@codeaurora.org writes:
Both the PM_RUNTIME and PM_SLEEP callbacks call into the common
msm_otg_{suspend,resume} routines, however these routines are only being
built when CONFIG_PM_SLEEP. In addition, msm_otg_{suspend,resume} also
depends on msm_hsusb_config_vddcx(),
Daniel Walker dwal...@fifo99.com writes:
On Wed, Oct 30, 2013 at 04:08:27PM -0700, Kevin Hilman wrote:
Olof Johansson o...@lixom.net writes:
I would be very happy to take more code for the older Qualcomm chipset
to enable full functionality for them, but it's been my impression
that far
Daniel Walker dwal...@fifo99.com writes:
On Thu, Oct 31, 2013 at 10:12:03AM -0700, Kevin Hilman wrote:
Daniel Walker dwal...@fifo99.com writes:
No. The idea behind splitting them is to allow current platforms with
active maintainers to progress without being held back. The older
Olof Johansson o...@lixom.net writes:
I would be very happy to take more code for the older Qualcomm chipset
to enable full functionality for them, but it's been my impression
that far from all that is needed to make it a useful platform is in
the upstream kernel, and there's been no signs of
David Brown dav...@codeaurora.org writes:
The following changes since commit 4a10c2ac2f368583138b774ca41fac4207911983:
Linux 3.12-rc2 (2013-09-23 15:41:09 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git
Stephen Boyd sb...@codeaurora.org writes:
Register with the generic sched_clock framework now that it
supports 64 bits. This fixes two problems with the current
sched_clock support for machines using the architected timers.
First off, we don't subtract the start value from subsequent
David Brown dav...@codeaurora.org writes:
The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git
Anirudh Ghayal agha...@codeaurora.org writes:
On 11/26/2012 7:17 PM, Mark Brown wrote:
On Mon, Nov 26, 2012 at 05:13:37AM -0800, agha...@codeaurora.org wrote:
For example:
Consumer (A) cpu-freq sets the voltage range to {1.275v, 1.375v}. The
regulator framework eventually sets the regulator
Russell King - ARM Linux li...@arm.linux.org.uk writes:
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
Acked-by: Kevin Hilman khil...@ti.com
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More majordomo
/gpio.txt
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
For OMAP:
Tested-by: Kevin Hilman khil...@ti.com
Acked-by: Kevin Hilman khil...@ti.com
Also goes for patches 12 13 also.
Kevin
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the proper ordering of these patches.
Still looking for acks or tested-by's for these patches.
Tested-by: Kevin Hilman khil...@deeprootsystems.com
on a few davinci platforms.
Kevin
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Saravana Kannan skan...@codeaurora.org writes:
Some drivers/devices might need some minimum system bus performance to
provide acceptable service. Provide a PM QoS parameter to send these requests
to.
The new parameter is named system bus performance since it is generic enough
for the unit
Grant Likely grant.lik...@secretlab.ca writes:
[...]
One of the primary goals of this (at least for me and it seems Magnus also)
is to keep drivers ignorant of their bus type, and any bus-type-specific
code should be done in the bus_type implementation.
Heh; which just screams to me that
Grant Likely grant.lik...@secretlab.ca writes:
[...]
My fears on this point may very well be unfounded. This isn't the
hill I'm going to die on either. Show me an implementation of driver
sharing that is clean and prove me wrong! :-)
IMHO, simply overriding the few dev_pm_ops methods
Grant Likely grant.lik...@secretlab.ca writes:
I'm not convinced (yet) that this is the right approach, and I'd like
to see a few sample drivers converted to the new approach. Creating
new bus_types that inherit from the platform_bus is actually not a
bad idea, and it is an elegant way to
Patrick Pannuto ppann...@codeaurora.org writes:
On 08/04/2010 05:16 PM, Kevin Hilman wrote:
Patrick Pannuto ppann...@codeaurora.org writes:
Inspiration for this comes from:
http://www.mail-archive.com/linux-o...@vger.kernel.org/msg31161.html
Also, later in that thread I also wrote[1
Patrick Pannuto ppann...@codeaurora.org writes:
You had indicated that you were going on vacation for a month and I
had not seen any more follow-up on this issue, so I forged ahead.
Great, I'm glad you forged ahead. There is definitely a broader need
for something like this, and I have
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