RTC found in s2mps15 is almost same as one found in s2mps14.
This patch add required changes to enable s2mps15 rtc timer.
Signed-off-by: Alim Akhtar
---
drivers/rtc/rtc-s5m.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
Hi Laurent,
On Mon, Oct 26, 2015 at 3:25 AM, Laurent Pinchart
wrote:
> On Saturday 24 October 2015 19:34:03 Geert Uytterhoeven wrote:
>> On Sat, Oct 24, 2015 at 3:10 AM, Stephen Boyd wrote:
>> > On 10/22, Geert Uytterhoeven wrote:
>> >>
Samsung's S2MPS15 PMIC is targetted to be used with Samsung's Exynos7 SoC.
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators, RTC, three 32.768 KHz clock outputs and allows
programming these blocks via a I2C interface. This patch series adds
From: Guo Zeng
this patch merges lots of discrete dividers, divider tables and dto
into arrays, then drops lots of codes.
Signed-off-by: Guo Zeng
Signed-off-by: Barry Song
---
-v2: fix some checkpatch issues
S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
adds supports for the same to the s2mps11 clock driver.
Signed-off-by: Alim Akhtar
---
drivers/clk/Kconfig |5 +++--
drivers/clk/clk-s2mps11.c | 24
2 files changed, 27
On Sun, Oct 25, 2015 at 11:41 PM, Javier Martinez Canillas
wrote:
> Commit 4a7748c3d641 ("clk: Allow drivers to build if COMPILE_TEST is
> enabled") allowed clk drives to be compile tested on other archs but
> the COMMON_CLK_VERSATILE was only enabled on platforms that
On 10/20, Georgi Djakov wrote:
> We are moving the sleep clock to the DT. While all patches
> are merged, we will ignore sleep_clk_src registration errors.
> By ignoring this error, the msm8916 boards will continue booting
> during this transition period, otherwise the clock controller
>
On 10/20, Georgi Djakov wrote:
> Remove the hard-coded clock rate from the driver and set the XO
> parent to the on-board XO oscillator that is defined in the DT.
>
> Signed-off-by: Georgi Djakov
> ---
> drivers/clk/qcom/gcc-msm8916.c |2 +-
> 1 file changed, 1
On 10/24, Joachim Eastwood wrote:
> Add clk_hw_is_enabled() to the provider APIs so clk providers can
> use a struct clk_hw instead of a struct clk to check if a clk is
> enabled or not.
>
> Signed-off-by: Joachim Eastwood
> ---
Applied to clk-next
--
Qualcomm Innovation
On 10/24, Joachim Eastwood wrote:
> CCU branch clock register must only be accessed while the base
> (parent) clock is running. Access with a disabled base clock
> will cause the system to hang. Fix this issue by adding code
> that check if the parent clock is running in the is_enabled
> clk_ops
The halt bits for these clocks seem wrong. I get the following
warning while booting on an msm8960-cdp:
WARNING: CPU: 0 PID: 1 at drivers/clk/qcom/clk-branch.c:97
clk_branch_toggle+0xd0/0x138()
dsi1_clk status stuck at 'on'
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
On Fri, Oct 23, 2015 at 3:01 AM, Zhiqiang Hou wrote:
> From: Mingkai Hu
>
> LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
> similar to LS1021a which complies to Chassis 2.1 spec.
>
> Following levels of DTSI/DTS files have been
On 10/24, Joachim Eastwood wrote:
> The clock consumer (CCU) of the CGU must be able to check if a CGU
> base clock is really running since access to the CCU registers
> requires a running base clock. Access with a disabled base clock will
> cause the system to hang. Fix this issue by adding code
On Fri, Oct 23, 2015 at 3:01 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> Signed-off-by: Hou Zhiqiang
> Acked-by: Stephen Boyd
> ---
> V6: V5 V4 V3 V2
> - No change.
I know you mentioned the
On Mon, Oct 26, 2015 at 11:51 AM, Michael Turquette
wrote:
> Quoting Rafael J. Wysocki (2015-10-25 06:54:39)
>> On Sun, Oct 25, 2015 at 12:06 AM, Mark Brown wrote:
>> > On Sat, Oct 24, 2015 at 04:17:12PM +0200, Rafael J. Wysocki wrote:
>> >
>> >>
Put the cxo and pxo clocks into the dt files as 'cxo_board' and
'pxo_board'. This provides a few benefits. It allows us to
specify the frequency of these clocks at the board level instead
of hard-coding them in the driver. It allows us to insert an RPM
clock in between the consumers of the
We want to put the XO board clocks into the dt files. Add an API
to do this generically. This also makes a place for us to handle
the case where the RPM driver is enabled or disabled.
Cc: Georgi Djakov
Signed-off-by: Stephen Boyd
---
I'm also
On 10/26/2015 8:53 PM, Florian Fainelli wrote:
Hi all,
This patch series adds support for the Broadcom BCM63138 DSL SoCs
clocking framework.
Since the HW is identical to the one found in Broadcom iProc SoCs, but the
integration is different (obviously), there is still a new compatible string
BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.
Since the ARMPLL controller is entirely compatible with the iProc ARM
PLL, we just initialize it without additional parameters.
Signed-off-by:
Add the ARM PLL controller which comes standard with the Cortex-A9 found
on the BCM63138 SoCs. This is the same controller as the one found in
the Broadcom iProc architecture, however, we have a separate compatible
string to indicate the integration difference.
While at it, properly rename
Hi all,
This patch series adds support for the Broadcom BCM63138 DSL SoCs
clocking framework.
Since the HW is identical to the one found in Broadcom iProc SoCs, but the
integration is different (obviously), there is still a new compatible string
introduced just in case we happen to find issues
On Tuesday, October 20, 2015 12:04:05 PM Alan Stern wrote:
> On Tue, 20 Oct 2015, Mark Brown wrote:
>
> > On Tue, Oct 20, 2015 at 10:40:03AM -0400, Alan Stern wrote:
> >
> > > Furthermore, that applies only to devices that use synchronous suspend.
> > > Async suspend is becoming common, and
Hi Geert,
On Monday 26 October 2015 20:02:45 Geert Uytterhoeven wrote:
> On Fri, Oct 23, 2015 at 1:10 PM, Laurent Pinchart wrote:
> > On Friday 16 October 2015 14:49:16 Geert Uytterhoeven wrote:
> >> On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
> >> Generator) and MSSR
On 10/26, Javier Martinez Canillas wrote:
> Commit 4a7748c3d641 ("clk: Allow drivers to build if COMPILE_TEST is
> enabled") allowed clk drives to be compile tested on other archs but
s/drives/drivers/
> the COMMON_CLK_VERSATILE was only enabled on platforms that already
> selected OF support so
On Mon, 26 Oct 2015, Alim Akhtar wrote:
> Hi Lee,
> Thanks for looking into this.
>
> On 10/26/2015 04:36 PM, Lee Jones wrote:
> >On Mon, 26 Oct 2015, Alim Akhtar wrote:
> >
> >>From: Thomas Abraham
> >>
> >>Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC.
S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
adds supports for the same to the s2mps11 clock driver.
Signed-off-by: Alim Akhtar
---
drivers/clk/Kconfig |5 +++--
drivers/clk/clk-s2mps11.c | 24
2 files changed, 27
From: Thomas Abraham
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators and allows programming these regulators via a
I2C interface. This patch adds initial support for LDO/Buck regulators of
S2MPS15 PMIC.
Hello Geert,
Thanks a lot for your feedback.
On 10/26/2015 06:02 PM, Geert Uytterhoeven wrote:
> On Sun, Oct 25, 2015 at 11:41 PM, Javier Martinez Canillas
> wrote:
>> Commit 4a7748c3d641 ("clk: Allow drivers to build if COMPILE_TEST is
>> enabled") allowed clk drives to
On 10/26/2015 04:39 PM, Lee Jones wrote:
On Mon, 26 Oct 2015, Alim Akhtar wrote:
From: Thomas Abraham
Add dt-binding documentation for s2mps15 PMIC device. The s2mps15 device
is similar to s2mps11/14 PMIC device and has 27 LDO and 10 buck regulators.
Cc:
Instead of passing around register bases, pass around a regmap
in this driver. This refactoring make things so much easier when
we later want to manage an ICST that is part of a syscon.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc:
This adds the device tree bindings for the ARM Syscon ICST
oscillators, which is a register-level interface to the
Integrated Device Technology (IDT) ICS525 and ICS307
serially programmable oscillators.
Cc: devicet...@vger.kernel.org
Cc: Michael Turquette
Cc: Stephen
This adds support for the ARM syscon ICST clocks to initialized
directly from the device tree syscon node on ARM Integrator,
Versatile and RealView reference designs.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-clk@vger.kernel.org
On Mon, Oct 26, 2015 at 02:14:15PM +0100, Linus Walleij wrote:
> On Thu, Oct 15, 2015 at 9:26 PM, Stephen Boyd wrote:
> > On 10/15, Linus Walleij wrote:
> >> +
> >> + if (of_device_is_compatible(np, "arm,syscon-icst525"))
> >> + icst_desc.params = _params;
>
RTC found in s2mps15 is almost same as one found in s2mps14.
This patch add required changes to enable s2mps15 rtc timer.
Signed-off-by: Alim Akhtar
---
drivers/rtc/rtc-s5m.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
On Thu, Oct 15, 2015 at 9:26 PM, Stephen Boyd wrote:
> On 10/15, Linus Walleij wrote:
>> +
>> + if (of_device_is_compatible(np, "arm,syscon-icst525"))
>> + icst_desc.params = _params;
>> + else if (of_device_is_compatible(np, "arm,syscon-icst307"))
>> +
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