On Fri, 17 Nov 2023 21:08:35 +0100, David Wronek wrote:
> Document the QMP UFS PHY compatible for SC7180
>
> Signed-off-by: David Wronek
> ---
> .../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring
rtion(+)
>
Acked-by: Rob Herring
t; ---
> .../devicetree/bindings/crypto/ti,sa2ul.yaml | 24 ++-
> 1 file changed, 23 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring
ng the soc
> name as the compatible string.
>
> [1].
> https://lore.kernel.org/linux-arm-msm/20201119155233.3974286-7-thara.gopin...@linaro.org/
>
> Cc: Thara Gopinath
> Cc: Bjorn Andersson
> Cc: Rob Herring
> Cc: Andy Gross
> Cc: Herbert Xu
> Cc
On Tue, Mar 09, 2021 at 01:50:03AM +0530, Vaibhav Gupta wrote:
> From: Peter Ujfalusi
>
> Add the AM64 version of sa2ul to the compatible list.
>
> [v_gu...@ti.com: Conditional dma-coherent requirement, clocks]
> Signed-off-by: Peter Ujfalusi
> Signed-off-by: Vaibhav Gupta
> ---
> .../devicet
4: pass dt_binding_check.
> v3: make resets required if brcm,bcm6368-rng.
> v2: document reset support.
>
> .../devicetree/bindings/rng/brcm,bcm2835.yaml | 11 +++
> 1 file changed, 11 insertions(+)
>
Reviewed-by: Rob Herring
t;
> .../devicetree/bindings/rng/brcm,bcm2835.yaml | 10 ++
> 1 file changed, 10 insertions(+)
>
Reviewed-by: Rob Herring
On Thu, 04 Mar 2021 08:33:07 +0100, Ãlvaro Fernández Rojas wrote:
> Some devices may need to perform a reset before using the RNG, such as the
> BCM6368.
>
> Signed-off-by: Ãlvaro Fernández Rojas
> ---
> v5: no changes.
> v4: pass dt_binding_check.
> v3: make resets required if brcm,bcm636
On Thu, Mar 4, 2021 at 6:07 AM Nicolas Saenz Julienne
wrote:
>
> Hi Alvaro,
>
> On Tue, 2021-02-23 at 18:00 +0100, Álvaro Fernández Rojas wrote:
> > Some devices may need to perform a reset before using the RNG, such as the
> > BCM6368.
> >
> > Signed-off-by: Álvaro Fernández Rojas
> > ---
> > v
On Tue, 23 Feb 2021 18:00:05 +0100, Ãlvaro Fernández Rojas wrote:
> Some devices may need to perform a reset before using the RNG, such as the
> BCM6368.
>
> Signed-off-by: Ãlvaro Fernández Rojas
> ---
> v3: make resets required if brcm,bcm6368-rng.
> v2: document reset support.
>
> .../d
On Tue, Feb 02, 2021 at 04:33:56PM -0800, Stephen Boyd wrote:
> Quoting Rob Herring (2021-02-02 12:55:42)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clocks.yaml
> >
> > b/Documentation/devicetree/bindings/clock/al
On Wed, Feb 03, 2021 at 09:01:23AM +0100, Geert Uytterhoeven wrote:
> Hi Rob,
>
> On Tue, Feb 2, 2021 at 9:55 PM Rob Herring wrote:
> > Properties in if/then schemas weren't getting checked by the meta-schemas.
> > Enabling meta-schema checks finds several errors.
&g
n Gen 3
which can be conditioned on !renesas,ipmmu-vmsa.
Cc: Joerg Roedel
Cc: Will Deacon
Cc: Yoshihiro Shimoda
Cc: io...@lists.linux-foundation.org
Signed-off-by: Rob Herring
---
.../bindings/iommu/renesas,ipmmu-vmsa.yaml | 12 +++-
1 file changed, 11 insertions(+), 1 delet
od Koul
Cc: Geert Uytterhoeven
Cc: Linus Walleij
Cc: Daniel Lezcano
Cc: linux-crypto@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: linux-l...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: linux-g...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/c
rnel.org
Cc: linux-g...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: io...@lists.linux-foundation.org
Cc: linux-watch...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../bindings/clock/allwinner,sun9i-a80-usb-clocks.yaml| 2 +-
Documentation/devicetree/bindings/clock/arm,s
On Thu, Dec 10, 2020 at 02:03:11PM -0600, Rob Herring wrote:
> PicoXcell has had nothing but treewide cleanups for at least the last 8
> years and no signs of activity. The most recent activity is a yocto vendor
> kernel based on v3.0 in 2015.
>
> These patches can go via
Daniele Alessandrelli
> ---
> .../crypto/intel,keembay-ocs-ecc.yaml | 47 +++
> MAINTAINERS | 7 +++
> 2 files changed, 54 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml
>
Reviewed-by: Rob Herring
On Thu, 10 Dec 2020 14:03:15 -0600, Rob Herring wrote:
> PicoXcell has had nothing but treewide cleanups for at least the last 8
> years and no signs of activity. The most recent activity is a yocto vendor
> kernel based on v3.0 in 2015.
>
> Cc: Jamie Iles
> Cc: linux-cryp
PicoXcell has had nothing but treewide cleanups for at least the last 8
years and no signs of activity. The most recent activity is a yocto vendor
kernel based on v3.0 in 2015.
These patches can go via the respective maintainers' trees.
Rob
Rob Herring (4):
ARM: dts: Remove Pico
PicoXcell has had nothing but treewide cleanups for at least the last 8
years and no signs of activity. The most recent activity is a yocto vendor
kernel based on v3.0 in 2015.
Cc: Jamie Iles
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
arch/arm/boot/dts/Makefile
PicoXcell has had nothing but treewide cleanups for at least the last 8
years and no signs of activity. The most recent activity is a yocto vendor
kernel based on v3.0 in 2015.
Cc: Jamie Iles
Cc: Russell King
Signed-off-by: Rob Herring
---
MAINTAINERS | 9
arch/arm
PicoXcell has had nothing but treewide cleanups for at least the last 8
years and no signs of activity. The most recent activity is a yocto vendor
kernel based on v3.0 in 2015.
Cc: Jamie Iles
Cc: Herbert Xu
Cc: "David S. Miller"
Cc: linux-crypto@vger.kernel.org
Signed-off-by: R
PicoXcell has had nothing but treewide cleanups for at least the last 8
years and no signs of activity. The most recent activity is a yocto vendor
kernel based on v3.0 in 2015.
Cc: Jamie Iles
Cc: linux-crypto@vger.kernel.org
Signed-off-by: Rob Herring
---
I'll take this via the DT
---
> .../crypto/intel,keembay-ocs-aes.yaml | 45 +++
> 1 file changed, 45 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml
>
Reviewed-by: Rob Herring
On Thu, Nov 19, 2020 at 10:52:33AM -0500, Thara Gopinath wrote:
> Add compatible string to support v5.4 crypto engine.
>
> Signed-off-by: Thara Gopinath
> Reviewed-by: Bjorn Andersson
> ---
> Documentation/devicetree/bindings/crypto/qcom-qce.txt | 4 +++-
> 1 file changed, 3 insertions(+), 1 de
lessandrelli
> Acked-by: Mark Gross
> ---
> .../crypto/intel,keembay-ocs-hcu.yaml | 46 +++
> 1 file changed, 46 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
>
Reviewed-by: Rob Herring
On Tue, Nov 17, 2020 at 1:39 AM Gilad Ben-Yossef wrote:
>
> On Mon, Nov 16, 2020 at 8:54 PM Rob Herring wrote:
> >
> > On Thu, Oct 22, 2020 at 1:18 AM Gilad Ben-Yossef
> > wrote:
> > >
> > >
> > > Hi again,
> > >
> > >
On Thu, Oct 22, 2020 at 1:18 AM Gilad Ben-Yossef wrote:
>
>
> Hi again,
>
> Any opinion on the suggested below?
Sorry, lost in the pile...
> Thanks!
> Gilad
>
>
> On Tue, Sep 29, 2020 at 9:08 PM Gilad Ben-Yossef wrote:
>>
>>
>> On Wed, Sep 23,
On Tue, Nov 03, 2020 at 06:49:23PM +, Daniele Alessandrelli wrote:
> From: Declan Murphy
>
> Add device-tree bindings for the Intel Keem Bay Offload Crypto Subsystem
> (OCS) Hashing Control Unit (HCU) crypto driver.
>
> Signed-off-by: Declan Murphy
> Signed-off-by: Daniele Alessandrelli
>
On Fri, Oct 16, 2020 at 06:27:57PM +0100, Daniele Alessandrelli wrote:
> From: Declan Murphy
>
> Add device-tree bindings for the Intel Keem Bay Offload Crypto Subsystem
> (OCS) Hashing Control Unit (HCU) crypto driver.
>
> Signed-off-by: Declan Murphy
> Signed-off-by: Daniele Alessandrelli
>
On Wed, Sep 16, 2020 at 10:19:49AM +0300, Gilad Ben-Yossef wrote:
> Document ccree driver supporting new optional parameters allowing to
> customize the DMA transactions cache parameters and ACE bus sharability
> properties.
>
> Signed-off-by: Gilad Ben-Yossef
> ---
> Documentation/devicetree/bi
ons(+)
> create mode 100644 Documentation/devicetree/bindings/rng/ingenic,trng.yaml
>
Reviewed-by: Rob Herring
On Thu, 03 Sep 2020 20:03:58 +0200, Krzysztof Kozlowski wrote:
> Correct a typo in the compatible - missing trailing 's'.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Appli
On Sat, Sep 05, 2020 at 05:51:48PM +0200, Martin Cerveny wrote:
>
> On Wed, 2 Sep 2020, Corentin Labbe wrote:
> > On Tue, Sep 01, 2020 at 01:40:15PM +0200, Maxime Ripard wrote:
> > > On Tue, Sep 01, 2020 at 12:57:19PM +0200, Corentin Labbe wrote:
> > > > On Tue, Sep 01, 2020 at 11:32:49AM +0200, M
python3.6/site-packages/dtschema/schemas/reg.yaml
>
> Fix this by reducing the address sizes for the example to 1 cell from
> current 2.
>
> Fixes: 2ce9a7299bf6 ("dt-bindings: crypto: Add TI SA2UL crypto accelerator
> documentation")
> Reported-by: Rob Herring
>
On Thu, Aug 20, 2020 at 01:51:21PM +0300, Atte Tommiska wrote:
> Document the device tree bindings of Xiphera's XIP8001B-trng IP.
typo in the subject. Otherwise,
Reviewed-by: Rob Herring
>
> Signed-off-by: Atte Tommiska
> ---
> .../bindings/rng/xiphera,xip80
ixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring
On Wed, 19 Aug 2020 15:21:34 +0300, Atte Tommiska wrote:
> Document the device tree bindings of Xiphera's XIP8001B-trng IP.
>
> Signed-off-by: Atte Tommiska
> ---
> .../bindings/rng/xiphera,xip8001b-trng.yaml | 30 +++
> 1 file changed, 30 insertions(+)
> create mode 100644
>
On Wed, 05 Aug 2020 14:28:04 +0800, Anson Huang wrote:
> Convert the i.MX rng binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang
> ---
> Documentation/devicetree/bindings/rng/imx-rng.txt | 23 --
> Documentation/devicetree/bindings/rng/imx-rng.yaml | 50
> +++
On Wed, 05 Aug 2020 10:43:30 +0800, Anson Huang wrote:
> Convert the i.MX sahara binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang
> ---
> .../devicetree/bindings/crypto/fsl-imx-sahara.txt | 15 --
> .../devicetree/bindings/crypto/fsl-imx-sahara.yaml | 35
>
On Wed, 05 Aug 2020 10:43:29 +0800, Anson Huang wrote:
> Convert the i.MX SCC binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang
> ---
> .../devicetree/bindings/crypto/fsl-imx-scc.txt | 21 -
> .../devicetree/bindings/crypto/fsl-imx-scc.yaml| 52
>
On Wed, 05 Aug 2020 10:43:28 +0800, Anson Huang wrote:
> Convert the MXS DCP binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang
> ---
> .../devicetree/bindings/crypto/fsl-dcp.txt | 18
> .../devicetree/bindings/crypto/fsl-dcp.yaml| 49
> ++
on and authentication of content in applications
> requiring DRM (digital rights management) and
> content/asset protection
>
> SA2UL provides support for number of different cryptographic algorithms
> including SHA1, SHA256, SHA512, AES, 3DES, and various combinations of
> the p
ings/rng/ingenic,rng.yaml | 36
> ++
> 1 file changed, 36 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/rng/ingenic,rng.yaml
>
Reviewed-by: Rob Herring
elying on
> RNGB as source of randomness.
>
> On the other hand, the i.MX6 SoCs with RNGB have a DCP
> (Data Co-Processor) crypto accelerator and this block and RNGB
> are independent.
>
> Signed-off-by: Horia Geantă
> ---
> Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
Reviewed-by: Rob Herring
On Sun, Jun 21, 2020 at 05:56:54PM +0300, Horia Geantă wrote:
> RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
> Add corresponding compatible strings.
>
> Note:
>
> Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
> also have a RNGB, however it's part of the
> ---
> .../bindings/rng/silex-insight,ba431-rng.yaml | 36 +++
> 1 file changed, 36 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml
>
Reviewed-by: Rob Herring
On Mon, 25 May 2020 21:56:04 +0200, Olivier Sobrie wrote:
> Silex Insight is a microelectronic company whose headquarter is located
> in Belgium.
> Web site of the company: https://www.silexinsight.com/
>
> Signed-off-by: Olivier Sobrie
> ---
> Documentation/devicetree/bindings/vendor-prefixes.y
On Mon, May 25, 2020 at 10:28:46PM +0200, Arnd Bergmann wrote:
> On Mon, May 25, 2020 at 10:07 PM Olivier Sobrie
> wrote:
> >
> > Silex insight BA431 is an IP designed to generate random numbers that
> > can be integrated in various FPGA.
> > This driver adds support for it through the hwrng inter
map-rng.yaml | 77 +++
> 2 files changed, 77 insertions(+), 38 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/rng/omap_rng.txt
> create mode 100644 Documentation/devicetree/bindings/rng/ti,omap-rng.yaml
>
Reviewed-by: Rob Herring
ngs/crypto/ti,sa2ul.yaml | 76 +++
> 1 file changed, 76 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
>
Reviewed-by: Rob Herring
> * Encryption and authentication of content in applications
> requiring DRM (digital rights management) and
> content/asset protection
>
> SA2UL provides support for number of different cryptographic algorithms
> including SHA1, SHA256, SHA512, AES, 3DES, and various combinations of
>
> 1 file changed, 52 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
>
Reviewed-by: Rob Herring
> 1 file changed, 92 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml
>
Reviewed-by: Rob Herring
On Fri, 20 Sep 2019 18:36:35 +0200, Krzysztof Kozlowski wrote:
> Convert Samsung Exynos Security SubSystem (SSS) and SlimSSS hardware
> crypto accelerator bindings to DT schema format using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> Rebased on linux-next due to conflicting
On Wed, 2 Oct 2019 18:13:40 +0200, Krzysztof Kozlowski wrote:
> Convert Samsung Exynos Pseudo Random Number Generator bindings to DT
> schema format using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> Changes since v2:
> 1. Add additionalProperties false,
> 2. Include clock h
ith removing old legacy platform_data.
>
> Let's also add a proper device tree binding and keep it together with
> the fix.
>
> Cc: devicet...@vger.kernel.org
> Cc: Aaro Koskinen
> Cc: Adam Ford
> Cc: Pali Rohár
> Cc: Rob Herring
> Cc: Sebastian Rei
hanged, 12 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.txt
>
Reviewed-by: Rob Herring
On Mon, 5 Aug 2019 15:02:15 +0200, Fabien Parent wrote:
> This commit adds the device-tree documentation for the RNG IP on the
> MediaTek MT8516 SoC.
>
> Signed-off-by: Fabien Parent
> ---
> Documentation/devicetree/bindings/rng/mtk-rng.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Applied, t
On Thu, Aug 8, 2019 at 2:51 AM Neil Armstrong wrote:
>
> This is a first tentative to convert some of the simplest Amlogic
> dt-bindings to the yaml format.
>
> All have been tested using :
> $ make ARCH=arm64 dtbs_check
>
> Issues with the amlogic arm64 DTs has already been identified thanks
> to
On Mon, Jul 22, 2019 at 06:02:40PM +0300, Tomer Maimon wrote:
> Added device tree binding documentation for Nuvoton BMC
> NPCM Random Number Generator (RNG).
>
> Signed-off-by: Tomer Maimon
> ---
> .../bindings/rng/nuvoton,npcm-rng.txt | 17 +
> 1 file changed, 17 inser
: convert to yaml
> dt-bindings: phy: meson-g12a-usb2-phy: convert to yaml
> dt-bindings: phy: meson-g12a-usb3-pcie-phy: convert to yaml
> dt-bindings: serial: meson-uart: convert to yaml
> dt-bindings: watchdog: meson-gxbb-wdt: convert to yaml
For the series,
Reviewed-by: Rob Herring
What's your merge plan? Do you want me to take the whole series?
Rob
On Thu, Aug 1, 2019 at 7:56 AM Neil Armstrong wrote:
>
> This is a first tentative to convert some of the simplest Amlogic
> dt-bindings to the yaml format.
Great to see this.
I've gone thru all of the patches. Some of the same minor comments I
made also apply to the patches I didn't comment on.
On Thu, Jul 25, 2019 at 1:43 PM Corentin Labbe wrote:
>
> This patch adds documentation for Device-Tree bindings for the
> Amlogic GXL cryptographic offloader driver.
>
> Signed-off-by: Corentin Labbe
> ---
> .../bindings/crypto/amlogic-gxl-crypto.yaml | 45 +++
Follow the comp
tion, so
why does it need to be in DT. DT is not the only way instantiate
drivers.
Rob
>
> Thanks
>
>
> On Tue, 2019-07-23 at 01:13 +0800, Rob Herring wrote:
> > On Mon, Jun 24, 2019 at 03:24:11PM +0800, Neal Liu wrote:
> > > Document the binding used by t
On Fri, Jun 28, 2019 at 09:57:36AM +0530, Keerthy wrote:
> The series adds Crypto hardware accelerator support for SA2UL.
> SA2UL stands for security accelerator ultra lite.
>
> The Security Accelerator (SA2_UL) subsystem provides hardware
> cryptographic acceleration for the following use cases:
On Mon, Jun 24, 2019 at 03:24:11PM +0800, Neal Liu wrote:
> Document the binding used by the MediaTek ARMv8 SoCs random
> number generator with TrustZone enabled.
>
> Signed-off-by: Neal Liu
> ---
> .../devicetree/bindings/rng/mtk-sec-rng.txt| 10 ++
> 1 file changed, 10 insert
On Thu, 11 Jul 2019 14:23:01 +0200, Maxime Ripard wrote:
> The older Allwinner SoCs have a crypto engine that is supported in Linux,
> with a matching Device Tree binding.
>
> Now that we have the DT validation in place, let's convert the device tree
> bindings for that controller over to a YAML s
On Fri, Jun 07, 2019 at 11:57:49AM -0700, Florian Fainelli wrote:
> On 5/10/19 10:31 AM, Florian Fainelli wrote:
> > BCM7211 features a RNG200 block, document its compatible string.
> >
> > Signed-off-by: Florian Fainelli
>
> Rob, does this look okay to you?
Yes, sorry, a bit behind on reviews.
On Fri, 10 May 2019 10:31:10 -0700, Florian Fainelli wrote:
> BCM7211 features a RNG200 block, document its compatible string.
>
> Signed-off-by: Florian Fainelli
> ---
> Documentation/devicetree/bindings/rng/brcm,iproc-rng200.txt | 1 +
> 1 file changed, 1 insertion(+)
&g
On Mon, Jun 10, 2019 at 06:36:23PM +0800, Neal Liu wrote:
> Document the binding used by the MediaTek ARMv8 SoCs random
> number generator with TrustZone enabled.
>
> Signed-off-by: Neal Liu
> ---
> Documentation/devicetree/bindings/rng/mtk-rng.txt | 15 ---
> 1 file changed, 12 in
-off-by: Ard Biesheuvel
> ---
> Documentation/devicetree/bindings/crypto/atmel-crypto.txt | 13 -
> Documentation/devicetree/bindings/trivial-devices.yaml| 2 ++
> 2 files changed, 2 insertions(+), 13 deletions(-)
Reviewed-by: Rob Herring
On Fri, May 24, 2019 at 11:27 AM Ard Biesheuvel
wrote:
>
> Add a compatible string for the Atmel SHA204A I2C crypto processor.
>
> Signed-off-by: Ard Biesheuvel
> ---
> Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Rob Herring
On Fri, May 24, 2019 at 8:16 AM Ard Biesheuvel
wrote:
>
> On Fri, 24 May 2019 at 15:12, Rob Herring wrote:
> >
> > On Tue, Apr 30, 2019 at 11:29 AM Ard Biesheuvel
> > wrote:
> > >
> > > Add a compatible string for the Atmel SHA204A I2C crypto proces
On Tue, Apr 30, 2019 at 11:29 AM Ard Biesheuvel
wrote:
>
> Add a compatible string for the Atmel SHA204A I2C crypto processor.
>
> Cc: Rob Herring
> Cc: Mark Rutland
> Signed-off-by: Ard Biesheuvel
> ---
> Documentation/devicetree/bindings/crypto/atmel-crypto.txt | 13
On Thu, Jan 24, 2019 at 04:45:20PM +0100, Kamil Konieczny wrote:
> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
> SubSystem) IP.
>
> Reviewed-by: Krzysztof Kozlowski
> Signed-off-by: Kamil Konieczny
> ---
> .../devicetree/bindings/crypto/samsung-sss.txt | 14 +++
On Thu, Dec 27, 2018 at 7:40 AM Ard Biesheuvel
wrote:
>
> On Thu, 27 Dec 2018 at 12:08, Sumit Garg wrote:
> >
> > Add bindings for OP-TEE based optional hardware random number
> > generator identifier property. It could be used on ARM based devices
> > where entropy source is not accessible to no
On Thu, Nov 29, 2018 at 02:42:18PM +0800, Herbert Xu wrote:
> On Tue, Nov 13, 2018 at 09:40:36AM +, Gilad Ben-Yossef wrote:
> > Add device tree bindings associating Arm TrustZone CryptoCell 703 with the
> > ccree driver.
> >
> > Signed-off-by: Gilad Ben-Yossef
> > ---
> > Documentation/devic
changed, 1 insertion(+)
>
Reviewed-by: Rob Herring
On Fri, Nov 16, 2018 at 02:18:54PM +0800, Herbert Xu wrote:
> On Wed, Nov 07, 2018 at 03:10:16PM +0800, Ryder Lee wrote:
> > This updates bindings for MT7629 RNG driver.
> >
> > Signed-off-by: Ryder Lee
>
> Who is meant to take this patch?
I've applied it.
Rob
t; 1 file changed, 5 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring
On Wed, Oct 17, 2018 at 08:47:55PM +0530, AnilKumar Chimata wrote:
> Add dt parameters information specific to the Inline
> Crypto Engine (ICE) device.
>
> Signed-off-by: AnilKumar Chimata
> ---
> .../devicetree/bindings/crypto/msm/ice.txt | 34
> ++
> 1 file changed
On Thu, Oct 25, 2018 at 10:29 AM Theodore Y. Ts'o wrote:
>
> On Thu, Oct 25, 2018 at 09:55:48AM -0500, Rob Herring wrote:
> > > +Introduction:
> > > +=
> > > +Storage encryption has been one of the most required feature from
> > > s
On Wed, Oct 24, 2018 at 04:44:37PM +0530, an...@codeaurora.org wrote:
> Hi,
>
> Thanks for the comments, response inline.
FYI, this was from a bot.
>
> Thanks,
> AnilKumar
>
>
> On 2018-10-18 17:13, kbuild test robot wrote:
> > Hi AnilKumar,
> >
> > Thank you for the patch! Yet something to
On Wed, Oct 17, 2018 at 08:47:56PM +0530, AnilKumar Chimata wrote:
> This patch adds support for Inline Crypto Engine (ICE), which
> is embedded into storage device/controller such as UFS/eMMC.
> ICE is intended for high throughput cryptographic encryption
> or decryption of storage data.
>
> Sign
On Tue, Oct 16, 2018 at 02:35:32PM +0100, Gilad Ben-Yossef wrote:
> Add device tree bindings associating Arm TrustZone CryptoCell 713 with the
> ccree driver.
"dt-bindings: crypto: ..." for the subject.
>
> Signed-off-by: Gilad Ben-Yossef
> ---
> Documentation/devicetree/bindings/crypto/arm-cry
rypto/fsl-dcp.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring
On Wed, Sep 12, 2018 at 05:07:17PM +0100, Jonathan Cameron wrote:
> There should not be a comma in the address used for the instance
> so drop them.
>
> This is a left over from a review of the final version before
> Herbert Xu picked the series up.
>
> Reported-by: Rob Her
On Mon, Sep 3, 2018 at 10:09 PM Herbert Xu wrote:
>
> On Mon, Aug 06, 2018 at 07:48:52AM -0400, Robert P. J. Day wrote:
> >
> > Signed-off-by: Robert P. J. Day
>
> Adding Rob Herring to the cc list.
Please resend to DT list if you want me to take it. Otherwise,
Acked-by: Rob Herring
@ -2,7 +2,7 @@
>
> Required properties:
> - compatible: Should be "nxp,pn544-i2c".
> -- clock-frequency: I�C work frequency.
> +- clock-frequency: I²C work frequency.
I'd prefer just plain ASCII 'I2C' here, but either way:
Acked-by: Rob Herring
Rob
to@400,d200 {
The unit address is still wrong. It should be '400d000'.
Really, your dts file should utilize 'ranges' and not just have 64-bit
addresses and sizes everywhere.
With that,
Reviewed-by: Rob Herring
> + compatible = "hisilicon,hip07-se
On Mon, Jul 16, 2018 at 11:43:40AM +0100, Jonathan Cameron wrote:
> The hip06 and hip07 SoCs contain a number of these crypto units which
> accelerate AES and DES operations.
>
> Signed-off-by: Jonathan Cameron
> ---
> .../bindings/crypto/hisilicon,hip07-sec.txt| 69
> ++
On Mon, Jun 25, 2018 at 2:27 PM Fabio Estevam wrote:
>
> Hi Rob,
>
> On Mon, Jun 25, 2018 at 5:21 PM, Rob Herring wrote:
>
> > Looks like imx51 should be a fallback and you can drop the driver
> > change.
>
> I thought about that too.
>
> If I do like th
On Fri, Jun 22, 2018 at 03:45:28PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam
>
> i.MX51 and i.MX53 share the same sahara IP block version, so add
> i.MX51 in the list of supported SoCs.
>
> Signed-off-by: Fabio Estevam
> ---
> Changes since v1:
> - Fix typo in commit log "i.MX51 and i.M
On Tue, Jun 19, 2018 at 03:24:29PM +0530, Vinod Koul wrote:
> Later qcom chips support v2 of the prng, so add new compatible
> qcom,prng-v2 for this.
>
> Signed-off-by: Vinod Koul
> ---
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Documentation/devicetree
On Wed, Mar 7, 2018 at 8:54 AM, PrasannaKumar Muralidharan
wrote:
> Hi Rob,
>
> On 6 March 2018 at 19:25, Rob Herring wrote:
>> On Tue, Mar 6, 2018 at 3:32 AM, James Hogan wrote:
>>> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>>
On Tue, Mar 6, 2018 at 3:32 AM, James Hogan wrote:
> On Mon, Sep 18, 2017 at 07:32:40PM +0530, PrasannaKumar Muralidharan wrote:
>> Add RNG node to jz4780 dtsi. This driver uses registers that are part of
>> the register set used by Ingenic CGU driver. Use regmap in RNG driver to
>> access its reg
e shared between hwrng and crypto drivers.
> +- clocks: phandle to the reference clocks for the subsystem
> +- clock-names: functional clock name. Should be set to "fck"
> +- reg: HWRNG module register space
> +
> +Example:
> +/* K2HK */
> +
> +hwrng@0x24000 {
rng@2
t; .../devicetree/bindings/rng/{imx-rngc.txt => imx-rng.txt} | 10
> --
> 1 file changed, 4 insertions(+), 6 deletions(-)
> rename Documentation/devicetree/bindings/rng/{imx-rngc.txt => imx-rng.txt}
> (59%)
Reviewed-by: Rob Herring
changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Rob Herring
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