On 10/10/13 9:54 AM, Ryan Mallon wrote:
On 09/10/13 18:55, Mika Westerberg wrote:
On Tue, Oct 08, 2013 at 05:00:54PM +0200, Romain Baeriswyl wrote:
@@ -307,15 +309,25 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
/* set standard and fast speed deviders for high/low periods */
+ if
On 10/9/13 4:56 PM, Mika Westerberg wrote: On Tue, Oct 08, 2013 at 05:00:55PM
+0200, Romain Baeriswyl wrote:
Some legacy devices support ony I2C standard mode at 100kHz.
This patch allows to select the standard mode through the DTS
with the use of the existing clock-frequency parameter.
When
On 8/21/13 11:39 PM, Christian Ruppert wrote:
On Fri, Aug 16, 2013 at 11:15:12AM +0900, Shinya Kuribayashi wrote:
On 8/5/13 6:31 PM, Christian Ruppert wrote:
On Wed, Jul 24, 2013 at 11:31:44PM +0900, Shinya Kuribayashi wrote:
As said before, all t_SCL things should go away. Please forget
Hi,
On 8/19/13 8:36 PM, Mika Westerberg wrote:
On Fri, Aug 16, 2013 at 11:15:12AM +0900, Shinya Kuribayashi wrote:
Actually, the I2C specification clearly defines f_SCL;max (and thus
implies t_SCL;min), both in the tables and the timing diagrams. Why can
we ignore this constraint while having
...@linux.intel.com
Looks good, thanks.
Acked-by: Shinya Kuribayashi skuri...@pobox.com
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On 7/22/13 10:17 PM, Christian Ruppert wrote: On Wed, Jul 17, 2013 at
11:39:58PM +0900, Shinya Kuribayashi wrote:
On 7/16/13 8:16 PM, Christian Ruppert wrote: On Sat, Jul 13, 2013 at
02:36:43PM +0900, Shinya Kuribayashi wrote:
Basically, DW I2C core provides a good enough (and quite direct
On 7/16/13 8:16 PM, Christian Ruppert wrote: On Sat, Jul 13, 2013 at
02:36:43PM +0900, Shinya Kuribayashi wrote:
Basically, DW I2C core provides a good enough (and quite direct) way
to control tHIGH and tLOW timing specs, *HCNT and *LCNT registers.
But from my experience (with a slightly old
/we think, in most cases it work without
problem. What's more important for me is to record the issue and
how to solve it. So I'd like to have patch 2 and 3 separately.
Thank you for your offer anyway,
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cooking these patches over a year, and they
work perfectly fine with older kernels ..v3.4 so far.
Shinya Kuribayashi (5):
i2c: i2c-sh_mobile: calculate clock parameters at driver probing time
i2c: i2c-sh_mobile: optimize ICCH/ICCL values according to I2C bus speed
i2c: i2c
hardware I/O accesses. We don't have to care about run-time PM
maintenance here.
Signed-off-by: Shinya Kuribayashi shinya.kuribayashi...@renesas.com
---
drivers/i2c/busses/i2c-sh_mobile.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c
-by: Shinya Kuribayashi shinya.kuribayashi...@renesas.com
---
drivers/i2c/busses/i2c-sh_mobile.c | 121 ++---
1 file changed, 72 insertions(+), 49 deletions(-)
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c
b/drivers/i2c/busses/i2c-sh_mobile.c
index 309d0d5..1ad80c9 100644
(), but they're providing good descriptions of
SH-/R-Mobile I2C hardware spec, and I'd leave them as separated.
Signed-off-by: Shinya Kuribayashi shinya.kuribayashi...@renesas.com
---
drivers/i2c/busses/i2c-sh_mobile.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git
clock counter gets incremented every
2 clocks of the operating clock.
This patch makes it configurable through platform data.
Signed-off-by: Shinya Kuribayashi shinya.kuribayashi...@renesas.com
---
drivers/i2c/busses/i2c-sh_mobile.c | 5 +
include/linux/i2c/i2c-sh_mobile.h | 1 +
2 files changed
, and the transaction failed.
Tracked-down-by: Teppei Kamijou teppei.kamijou...@renesas.com
Signed-off-by: Shinya Kuribayashi shinya.kuribayashi...@renesas.com
---
drivers/i2c/busses/i2c-sh_mobile.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c
b/drivers/i2c
On 02/03/2011 11:19 AM, dirk.brande...@gmail.com wrote:
@@ -356,24 +393,24 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
u32 ic_con;
/* Disable the adapter */
- writel(0, dev-base + DW_IC_ENABLE);
+ dw_writel(dev, 0, DW_IC_ENABLE);
/* set the slave
/i2c-designware.c
deleted file mode 100644
index cd03f5e..000
--- a/drivers/i2c/busses/i2c-designware.c
+++ /dev/null
Will take git diff with rename detection, and check diffs later.
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offset)
{
Unnecessary empty line.
As for the rest, this is ok.
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in the above patch simply using #ifdef HAVE_CLK, rather than completely
removed. The other is, how about separating such changes into another
commit, or cook it along with PATCH 3/9?
I'll follow up other patches later.
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|
+ I2C_FUNC_SMBUS_WORD_DATA |
+ I2C_FUNC_SMBUS_I2C_BLOCK;
+
dev-base = ioremap(mem-start, resource_size(mem));
if (dev-base == NULL) {
dev_err(pdev-dev, failure mapping io resources\n);
Ditto.
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, this patch improves a situation at
PCI driver side only, and we need to come up with a way for platform
side in the future!
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at the start at Dirk-san's
patchset. We don't want to make a already proposed patch adapted to
a modified driver.
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err_free_irq;
}
+ pm_runtime_enable(pdev-dev);
return 0;
err_free_irq:
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Renesas Electronics
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On 9/27/2010 6:00 PM, Linus Walleij wrote:
2010/9/24 Shinya Kuribayashi shinya.kuribayashi...@renesas.com:
On 9/23/2010 4:04 PM, Linus Walleij wrote:
Is this I2C core capable of I2C_FUNC_SMBUS_QUICK? Unless it's capable
of full SMBus emulation, it would be better to turn off relevant flags
the driver, so would like to make sure)
Is this I2C core capable of I2C_FUNC_SMBUS_QUICK? Unless it's capable
of full SMBus emulation, it would be better to turn off relevant flags
for safety. I'm not objecting to the patch, but just wondered.
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it as two drivers. Otherwise you drag a lot of PCI and PCI
pm logic into a simpler driver that is used on non PCI platforms.
Got it, thanks. I'll have a look at the differences, first.
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Jean-Hugues Deschenes wrote:
This is the v2 version of the patch which adds support
for the i2c Designware controller when its endianness
differs from that of the cpu.
---
Changelog v1-v2
- rename i2c_dw_(read|write)l to dw_(read|write)l (Shinya Kuribayashi)
- rename dw_(read|write)l's addr
Shinya Kuribayashi wrote:
Jean-Hugues Deschenes wrote:
This is the v2 version of the patch which adds support
for the i2c Designware controller when its endianness
differs from that of the cpu.
---
Changelog v1-v2
- rename i2c_dw_(read|write)l to dw_(read|write)l (Shinya Kuribayashi)
- rename
] wrappers do. I'd prefer a
reasonably shorter name for this kind of accessors!
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/swab
settings in any way, that's fine.
Then I wonder is there any way to statically optimize them?
Note that I'm not objecting against this patch, just would like
to search for a better way if available!
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, but it
seems doesn't work for your environment, R/W data is swapped :-(
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an additional patch shortly.
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In the case of no-ACKs, we don't want to see dev_err() messages in the
console, because some utilities like i2c-tools are capable of printing
decorated console output. This patch will ease such situations.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
Hi Ben,
This patch
Baruch,
Shinya Kuribayashi wrote:
* ABRT_MASTER_DIS: Fix a typo.
* i2c_dw_handle_tx_abort: Return an appropriate error number
depending on abort_source.
* i2c_dw_xfer: Add a missing abort_source initialization.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
Hi Baruch,
Baruch Siach wrote:
Your contribution to the implementation of transactions that are longer than
the hardware buffers is very important. I wrote this code as a theoretical
exercise, as I never had access to an i2c slave which requires long
transactions. So I'm not surprised to find
Hi Baruch,
Baruch Siach wrote:
On Tue, Oct 13, 2009 at 11:54:21AM +0900, Shinya Kuribayashi wrote:
This will ease our testing a bit with i2c-tools. Note that DW I2C core
doesn't support I2C_FUNC_SMBUS_QUICK, as it's not capable of slave-
addressing-only I2C transactions.
Is this supposed
Ben, Mark and Russell,
Russell King - ARM Linux wrote:
[ big snip ]
I would strongly advise you to ensure that your implementation conforms
to the intentions of the clk API
Thanks for kind explanations. I'd like to give the clkdev a try.
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NEC Electronics
Shinya Kuribayashi wrote:
As wait_for_completion_interruptible_timeout() will be invoked after
the first call to i2c_dw_xfer_msg() is made whether or not an error is
detected in it, we need to mark -cmd_complete as completed to avoid a
needless HZ timeout.
diff --git a/drivers/i2c/busses/i2c
Ben Dooks wrote:
On Tue, Oct 13, 2009 at 11:50:49AM +0900, Shinya Kuribayashi wrote:
This driver is originally prepared for the ARM kernel where rich and
well-maintained clkdev clock framework is available, and clock name
might not be strictly required. ARM's clkdev does slightly fuzzy
Mark Brown wrote:
On Tue, Oct 13, 2009 at 11:50:49AM +0900, Shinya Kuribayashi wrote:
This driver is originally prepared for the ARM kernel where rich and
well-maintained clkdev clock framework is available, and clock name
might not be strictly required. ARM's clkdev does slightly fuzzy
. Then I'll respin and give it a
test, thanks.
Baruch, I'd say the base driver is in good shape enogh, so I'm having
a fun with modifing the driver. Thanks for the initial work.
P.S. ARM and MIPS lists are Cc:ed as I believe there must be potential
users of this driver.
Shinya Kuribayashi (16
This driver looks originally meant for armel machines where readw()/
writew() works perfectly fine. But that doens't work for big-endian
systems.
This patch converts all 8/16-bit-aware usages to 32-bit variants, so
that the driver works for MIPS big-endian machines, too.
Signed-off-by: Shinya
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware.c
b/drivers/i2c/busses/i2c-designware.c
index efddae1..0164092 100644
There's no need to interface using with struct i2c_adapter pointer.
Let's use a local struct dw_i2c_dev pointer, instead.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff
There's no need to interface using with struct i2c_adapter pointer.
Let's use a local struct dw_i2c_dev pointer, instead.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff
We couldn't know the original intent for this variable, but at this
point it's useless.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c
could make use of the driver.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware.c
b/drivers/i2c/busses/i2c-designware.c
index 9d81775
timing spec.
To make the driver configurable as much as possible for various cases,
we'd have separated arguments tf and offset, and for safety default
values should be 0.3 us and 0, respectively.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c
In case an i2c_msg, which is currently work-in-progress, has more bytes
to be written, we need to set STATUS_WRITE_IN_PROGRESS _and_ exit from
the msg_write_idx-search loop. Otherwise, we'll overtake the current
index without waiting for transmission completed.
Signed-off-by: Shinya Kuribayashi
, and hook it in the handler)
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c | 15 +++
1 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware.c
b/drivers/i2c/busses/i2c-designware.c
index 52a69a2
i2c_dw_xfer_msg().
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c | 45 +++---
1 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/drivers/i2c/busses/i2c-designware.c
b/drivers/i2c/busses/i2c
slightly hard to follow.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
Furthermore, even with this change, i2c_dw_xfer_msg() is still
inconsistent with i2c_dw_read(). I don't have preference around
here, but would like to sort out. Any suggestions are welcome.
drivers/i2c
As wait_for_completion_interruptible_timeout() will be invoked after
the first call to i2c_dw_xfer_msg() is made whether or not an error is
detected in it, we need to mark -cmd_complete as completed to avoid a
needless HZ timeout.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
This will ease our testing a bit with i2c-tools. Note that DW I2C core
doesn't support I2C_FUNC_SMBUS_QUICK, as it's not capable of slave-
addressing-only I2C transactions.
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---
drivers/i2c/busses/i2c-designware.c |9 -
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