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Gary Poppitz wrote:
We tracked down a problem with the 964 chipset with a 0x180 ID code that
may save someone on the list some time.
The chip will only transfer multiples of 4 bytes. Anything else will
cause it to hang.
After further research, this is popping up on a number of chips (and
Jeff Garzik wrote:
Thanks, I'll suck this into the pipeline.
For any comments/changes that arise, please send patches incremental to
this patch.
Thanks Jeff!
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Mark Lord wrote:
Jens Axboe wrote:
It looks like I will need to do a workaround for all SATA ATAPI
devices: if the transfer is not a multiple of 4 bytes, pad it with an
DMA 1-3 byte DMA segment.
Yup, that requirement has existed on most of the hardware
I've done drivers for, both SATA and a
Jens Axboe wrote:
On Thu, Feb 17 2005, Jeff Garzik wrote:
It looks like I will need to do a workaround for all SATA ATAPI devices:
if the transfer is not a multiple of 4 bytes, pad it with an DMA 1-3
byte DMA segment.
Yeah we definitely need something like that. The optimal solution is to
make
Andy Warner wrote:
Jeff Garzik wrote:
[...]
I'm starting to wonder if polling isn't just a dismal failure on SATA,
since the status register/etc. is all emulated. Thinking further along
those lines (how an ATA shadow register set is faked by the host
controller using FIS data), I wonder if
Jeff Garzik wrote:
[...]
AHCI is the first scenario where PIO-via-DMA could be utilized in an
efficient manner. The upcoming SiI 3124 is another. A few others
(ADMA, Marvell) are PIO-via-DMA controllers as well. I agree this is a
good thing.
I _think_ the SATA-II stuff from Promise
Danny Cox wrote:
I've been mostly lurking here for awhile now, just seeing how things
are going. I've seen various drives on a blacklist, and various
controllers that do this or that well, but have problems doing foo.
There also seem to have been a Strange Interaction as well, but that's
Andy Warner wrote:
Jeff Garzik wrote:
[...]
AHCI is the first scenario where PIO-via-DMA could be utilized in an
efficient manner. The upcoming SiI 3124 is another. A few others
(ADMA, Marvell) are PIO-via-DMA controllers as well. I agree this is a
good thing.
I _think_ the SATA-II stuff
Just a quick note on the SX4 Card - I have seen data corruption on
hard-drives too in the simplest possible setup, so I'd stay clear of
that card until further notice.
Mine is sitting in a cupboard right now, awaiting 'someone' (me, if I
get some time to learn low-level kernel drivers)
Andy Warner wrote:
Brad Campbell wrote:
[...]
Actually, I'm not sure without the libata dev patch as that removes SMART support, and I'm not
convinced that my smartd polling every 20 minutes does not have something to do with it. All I know
is the older kernel seems to cope. We'll see. 320
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