This patch set default values for the FIFO PCI Bus Arbitration to avoid data
corruption. The root cause is due to our PCI bus master handling mismatch with
the chipset PCI bridge during DMA xfer (write data to the device). The patch is
to setup the DMA fifo threshold so that there is no chance
Carlos Pardo wrote:
This patch set default values for the FIFO PCI Bus Arbitration to avoid data
corruption. The root cause is due to our PCI bus master handling mismatch with
the chipset PCI bridge during DMA xfer (write data to the device). The patch is
to setup the DMA fifo threshold so that
