On Mon, Apr 28, 2014 at 06:17:13PM +0200, Alexandre Belloni wrote:
> Add the PWM bindings for the Allwinner A20.
>
> Signed-off-by: Alexandre Belloni
Applied, thanks
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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On Mon, Apr 28, 2014 at 06:17:11PM +0200, Alexandre Belloni wrote:
> Add the PWM bindings for the Allwinner A10.
>
> Signed-off-by: Alexandre Belloni
Applied, thanks
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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From: Masanari Iida
Date: Tue, 29 Apr 2014 00:41:21 +0900
> Fix format string mismatch in bonding_show_min_links().
>
> Signed-off-by: Masanari Iida
Applied, thanks.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
Hi,
On Mon, Apr 28, 2014 at 06:17:08PM +0200, Alexandre Belloni wrote:
> This adds a generic PWM framework driver for the PWM controller
> found on Allwinner SoCs.
>
> Signed-off-by: Alexandre Belloni
> Acked-by: Maxime Ripard
> ---
> drivers/pwm/Kconfig | 9 ++
> drivers/pwm/Makefile
Commit d57c33c5daa4 (add generic fixmap.h) added (among other
similar things) set_fixmap_io to deal with early ioremap of devices.
More recently, commit bf4b558eba92 (arm64: add early_ioremap support)
converted the arm64 earlyprintk to use set_fixmap_io. A side effect of
this conversion is that
On Mon, Apr 28, 2014 at 07:30:26PM +0200, Apelete Seketeli wrote:
> Hi Felipe,
>
> On Mon, Apr-14-2014 at 10:12:56 PM +0200, Apelete Seketeli wrote:
> > Document the process of writing an musb glue layer by taking the
> > Ingenic JZ4740 glue layer as an example, as it seems more simple than
> >
On 04/28/2014 12:20 PM, Joel Fernandes wrote:
> On 04/28/2014 11:43 AM, Dave Martin wrote:
>> On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote:
>>> On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
>>> (Cortex A15) fails to come up causing SMP boot on
On Mon, 2014-04-28 at 09:52 +0200, Peter Zijlstra wrote:
> On Tue, Apr 22, 2014 at 03:19:26PM -0700, Davidlohr Bueso wrote:
> > ---
> > include/linux/rwsem.h | 9 +-
> > kernel/locking/rwsem-xadd.c | 213
> > +++-
> > kernel/locking/rwsem.c |
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On Mon, Apr 28, 2014 at 08:52:48PM +0300, Ivan T. Ivanov wrote:
> On Mon, 2014-04-28 at 12:03 -0500, Felipe Balbi wrote:
> > On Mon, Apr 28, 2014 at 09:00:43PM +0400, Sergei Shtylyov wrote:
> > > Hello.
> > >
> > > On 04/28/2014 05:34 PM, Ivan T. Ivanov wrote:
> > >
> > > >From: "Ivan T. Ivanov"
Pointer 'pbpctl_dev_c' in function bypass_init_module() is unused. Thus remove
it. With the last variable declaration gone, there is no more need for an own
block. Remove it and adapt the indenting accordingly.
Signed-off-by: Christian Engelmayer
---
v2: Added changes requested by Dan Carpenter:
On Mon 2014-04-28 22:24:36, Jenny Tc wrote:
> Dmitry/Pavel,
>
> Request your feedback on this. Fixed the comments from Pavel and waiting for
> your feedback on the changes
IIRC, my latest comments were "this is completely misdesigned, it is
using strings and table searches where it should use
On 04/28/2014 05:18 AM, Thierry Reding wrote:
> On Mon, Apr 28, 2014 at 12:56:03PM +0200, Arnd Bergmann wrote:
...
>> A lot of drivers probably only support one
>> master, so they can just set #iommu-cells=<0>, others might require
>> IDs that do not fit into one cell.
>
> You mean "#iommu-cells
Am 28.04.2014 19:17, schrieb Randy Dunlap:
>
> uml defconfig on x86_64:
>
> CC arch/um/kernel/asm-offsets.s
> In file included from include/linux/sem.h:5:0,
> from include/linux/sched.h:35,
> from arch/x86/um/shared/sysdep/kernel-offsets.h:2,
>
On Mon, 2014-04-28 at 12:03 -0500, Felipe Balbi wrote:
> On Mon, Apr 28, 2014 at 09:00:43PM +0400, Sergei Shtylyov wrote:
> > Hello.
> >
> > On 04/28/2014 05:34 PM, Ivan T. Ivanov wrote:
> >
> > >From: "Ivan T. Ivanov"
> >
> > >This fixes following:
> >
> > >WARNING:
On Tue, Apr 29, 2014 at 1:14 AM, Boris BREZILLON
wrote:
> Hi Chen-Yu,
>
> On 28/04/2014 17:59, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
>> wrote:
>>> The PRCM (Power/Reset/Clock Management) unit provides several clock
>>> devices:
>>> - AR100 clk: used
On Mon, Apr 28, 2014 at 06:17:10PM +0200, Alexandre Belloni wrote:
> Add the pinctrl descriptions for both PWM channels of the Allwinner A10.
>
> Signed-off-by: Alexandre Belloni
Applied to sunxi/dt-for-3.16, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android
On Mon, Apr 28, 2014 at 01:50:13PM -0400, Jeff Layton wrote:
> Currently, the fl_owner isn't set for flock locks. Some filesystems use
> byte-range locks to simulate flock locks and there is a common idiom in
> those that does:
>
> fl->fl_owner = (fl_owner_t)filp;
> fl->fl_start = 0;
>
On Mon, Apr 28, 2014 at 12:57 PM, Pawel Moll wrote:
> In "Device Tree powered" systems, platform devices are usually
> massively populated with of_platform_populate() call, executed
> at some level of initcalls, either by generic architecture
> or by platform-specific code.
>
> There are
On 04/28/2014 11:43 AM, Dave Martin wrote:
> On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote:
>> On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
>> (Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
>> seems to be because the
On Mon, Apr 28, 2014 at 03:32:04AM +0100, Ding Tianhong wrote:
> On 2014/4/26 18:22, Ding Tianhong wrote:
> > On 2014/4/26 17:23, Catalin Marinas wrote:
> >> On 26 Apr 2014, at 09:38, Ding Tianhong wrote:
> >>> Add OProfile support for arm64, using the perf backend, and failing back
> >>> to
On Mon, 2014-04-28 at 18:37 +0100, Pawel Moll wrote:
> On Thu, 2014-02-13 at 13:15 -0600, Rob Herring wrote:
> > On Tue, Feb 11, 2014 at 10:53 AM, Pawel Moll wrote:
> > > In "Device Tree powered" systems, platform devices are usually
> > > massively populated with of_platform_populate() call,
On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote:
> On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
> (Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
> seems to be because the CPU is in ARM mode once the ROM hands over
On Mon, 2014-04-28 at 17:52 +0200, Antonios Motakis wrote:
> This allows to make use of the VFIO_IOMMU_TYPE1 driver with platform
> devices on ARM in addition to PCI. This is required in order to use the
> Exynos SMMU, or ARM SMMU driver with VFIO_IOMMU_TYPE1.
>
> Signed-off-by: Antonios Motakis
On 04/27/2014 07:35 AM, Jianyu Zhan wrote:
Currently, put_compound_page should carefully handle tricky case
to avoid racing with compound page releasing or spliting, which
makes it growing quite lenthy(about 200+ lines) and need deep
tab indention, which makes it quite hard to follow and
On Sat, 2014-04-26 at 16:50 +0200, Peter Zijlstra wrote:
> On Fri, Apr 25, 2014 at 12:54:14PM -0700, Jason Low wrote:
> > Preeti mentioned that sd->balance_interval is changed during load_balance().
> > Should we also consider updating the interval in rebalance_domains() after
> > calling
On 04/26/2014 11:36 AM, Sergei Shtylyov wrote:
> Hello.
>
> On 26-04-2014 3:02, Joel Fernandes wrote:
>
>> DRA7xx SoCs have a DES3DES IP. Add DT data for the same.
>
>> Signed-off-by: Joel Fernandes
>> ---
>> arch/arm/boot/dts/dra7.dtsi | 11 +++
>> 1 file changed, 11
From: Christian Borntraeger
When starting lots of dataplane devices the bootup takes very long on
Christian's s390 with irqfd patches. With larger setups he is even
able to trigger some timeouts in some components. Turns out that the
KVM_SET_GSI_ROUTING ioctl takes very long (strace claims up
On Tue, Apr 22, 2014 at 10:41:12AM +0800, Jet Chen wrote:
> On 04/22/2014 09:59 AM, Paul E. McKenney wrote:
> >On Mon, Apr 21, 2014 at 02:28:21PM +0800, Jet Chen wrote:
> >>Hi Paul,
> >>
> >>we noticed the below changes on
> >>git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
>
Lee,
On Mon, Apr 28, 2014 at 4:57 AM, Lee Jones wrote:
>> >> > Nearly all of the registers in tps65090 combine control bits and
>> >> > status bits. Turn off caching of all registers except the select few
>> >> > that can be cached.
>> >>
>> >> Lee, I don't mind if I apply this and send a pull
recursive locking detected ]
[0.00] 3.15.0-rc2-next-20140428-00030-gd3550d8 #38 Not tainted
[0.00] -
[0.00] swapper/0 is trying to acquire lock:
[0.00] (console_lock){..}, at: []
register_console+0x15e/0x295
[0.00
On Monday 28 April 2014 17:50:29 Jiang, Dave wrote:
> On Mon, 2014-04-28 at 13:03 +0200, Ondrej Zary wrote:
> > Hello,
> > just upgraded a server running 3.2.54-2 to 3.2.57-3 (Debian Wheezy) and
> > it does not boot anymore because of isci driver breakage.
>
> I would not run anything less than
On Mon, Apr 28, 2014 at 11:55 PM, Peter Zijlstra wrote:
> What version,
the code snipt in question is extracted from v3.15-rc3.
for the (1) check in previous email, its assembled code looks like:
--- (1) snipt ---
mov(%rdi),%rax (a)
test
bfa709bc823fc32ee8dd5220d1711b46078235d8 (cpufreq: powerpc: add cpufreq
transition latency for FSL e500mc SoCs) introduced a modpost error:
ERROR: "__udivdi3" [drivers/cpufreq/ppc-corenet-cpufreq.ko] undefined!
make[1]: *** [__modpost] Error 1
Fix this by avoiding 64 bit integer division.
gcc
Add the PWM bindings for the Allwinner A20.
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts/sun7i-a20.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index c6eb881a3ced..19d1f60209c5 100644
---
On Wed, Apr 23, 2014 at 9:49 AM, Alexandre Courbot wrote:
> On Wed, Apr 23, 2014 at 12:02 AM, Linus Walleij
> wrote:
>> On Tue, Apr 15, 2014 at 8:41 AM, Chen-Yu Tsai wrote:
>>
>>> This patch provides of_get_gpiod_flags_by_name(), which looks up GPIO
>>> phandles by name only, through
Enable the PWM for both PWM channels on the cubietruck. They can be found on
connector CN8.
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
On Mon, Apr 28, 2014 at 06:25:56PM +0530, George Cherian wrote:
> In beagle bone white (AM335x) CPTS has a choice of 2 clocksource
> -dpll_core_m5_ck
> -dpll_core_m4_ck
> and by default dpll_core_m5_ck is used. Where as in AM437x the
> default clocksource used is dpll_core_m4_ck .
Is your patch
Add the pinctrl descriptions for both PWM channels of the Allwinner A10.
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts/sun4i-a10.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index
This adds a generic PWM framework driver for the PWM controller
found on Allwinner SoCs.
Signed-off-by: Alexandre Belloni
Acked-by: Maxime Ripard
---
drivers/pwm/Kconfig | 9 ++
drivers/pwm/Makefile| 1 +
drivers/pwm/pwm-sunxi.c | 345
This is the documentation for the Allwinner Socs PWM bindings.
Signed-off-by: Alexandre Belloni
Acked-by: Maxime Ripard
---
Documentation/devicetree/bindings/pwm/pwm-sunxi.txt | 20
1 file changed, 20 insertions(+)
create mode 100644
Add the PWM bindings for the Allwinner A10.
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts/sun4i-a10.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 109e796e4a69..bb11c422526b 100644
---
Add the pinctrl descriptions for both PWM channels of the Allwinner A20.
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index
Hi,
This patch set adds support for the PWM controller found on the Allwinner SoCs.
The first patch adds the driver itself.
The second patch adds the DT binding documentation
The third patch adds the bindings to the sun7i-a20 DTS include.
And finally, the la patch adds support for the PWMs to
On Mon, Apr 28, 2014 at 08:11:33PM +0530, George Cherian wrote:
> On 4/28/2014 7:28 PM, Guido Martínez wrote:
> >Use phandles instead of unit adresses to reference usb and dma nodes.
> >This makes the DT more robust and readable.
> The series will give dtb build errors
> Error:
On Mon, Apr 28, 2014 at 03:20:44PM +1000, Stephen Rothwell wrote:
> Hi Felipe,
>
> Today's linux-next merge of the usb-gadget tree got a conflict in
> drivers/usb/phy/phy-mv-u3d-usb.c between commit 543cab640279 ("usb: phy:
> mv_u3d: Remove usb phy driver for mv_u3d") from the usb tree and commit
On Fri, Apr 25, 2014 at 10:00:21PM +0200, Alexandre Belloni wrote:
> Document the device tree for the clocks sharing a common set of registers
>
> Signed-off-by: Alexandre Belloni
> ---
> Cc: devicet...@vger.kernel.org
> .../devicetree/bindings/clock/berlin-clock.txt | 29
>
This allows to make use of the VFIO_IOMMU_TYPE1 driver with platform
devices on ARM in addition to PCI. This is required in order to use the
Exynos SMMU, or ARM SMMU driver with VFIO_IOMMU_TYPE1.
Signed-off-by: Antonios Motakis
---
drivers/vfio/Kconfig| 2 +-
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
wrote:
> Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
> controller subdevices.
>
> Signed-off-by: Boris BREZILLON
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 49
>
> 1
On 28/04/2014 17:25, Emilio López wrote:
> Hi Boris,
>
> El 28/04/14 11:58, Boris BREZILLON escribió:
>> The PRCM (Power/Reset/Clock Management) unit provides several clock
>> devices:
>> - AR100 clk: used to clock the Power Management co-processor
>> - AHB0 clk: used to clock the AHB0 bus
>> -
The ARM SMMU can take an IOMMU_EXEC protection flag in addition to
IOMMU_READ and IOMMU_WRITE. Expose this as an IOMMU capability.
Signed-off-by: Antonios Motakis
---
drivers/iommu/arm-smmu.c | 2 ++
include/linux/iommu.h| 5 +++--
2 files changed, 5 insertions(+), 2 deletions(-)
diff
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
wrote:
> The PRCM (Power/Reset/Clock Management) unit provides several clock
> devices:
> - AR100 clk: used to clock the Power Management co-processor
> - AHB0 clk: used to clock the AHB0 bus
> - APB0 clk and gates: used to clk
>
> Add
A VFIO userspace driver will start by opening the VFIO device
that corresponds to an IOMMU group, and will use the ioctl interface
to get the basic device info, such as number of memory regions and
interrupts, and their properties.
This patch enables the IOCTLs:
- VFIO_DEVICE_GET_INFO
-
Allow to memory map the MMIO regions of the device so userspace can
directly access them.
Signed-off-by: Antonios Motakis
---
drivers/vfio/platform/vfio_platform.c | 40 ++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git
VFIO returns a file descriptor which we can use to manipulate the memory
regions of the device. Since some memory regions we cannot mmap due to
security concerns, we also allow to read and write to this file descriptor
directly.
Signed-off-by: Antonios Motakis
---
This patch allows to set an eventfd for a patform device's interrupt,
and also to trigger the interrupt eventfd from userspace for testing.
Signed-off-by: Antonios Motakis
---
drivers/vfio/platform/vfio_platform.c | 36 +++-
drivers/vfio/platform/vfio_platform_irq.c | 123
On Mon, Apr 28, 2014 at 04:49:23PM -0400, Zhuang Jin Can wrote:
> Adds a debugfs file "snapshot" to dump dwc3 requests, trbs and events.
you need to explain what are you trying to provide to our users here.
What "problem" are you trying to solve ?
> As ep0 requests are more complex than others.
On Mon, Apr 28, 2014 at 11:53:28PM +0800, Jianyu Zhan wrote:
> Actually, I checked the assembled code, the compiler is _not_
> so smart to recognize this case. It just does optimization as
> the hint unlikely() told it.
What version, and why didn't your changelog include this useful
information?
On Mon, Apr 28, 2014 at 11:00 PM, Michal Hocko wrote:
> This is a big change and really hard to review to be honest. Maybe a
> split up would make it easier to follow.
Ok, actually it is quite simple, but the diff looks messy, I will try
to split up
this patch to several phases.
Thanks,
Jianyu
Return information for the interrupts exposed by the device.
This patch extends VFIO_DEVICE_GET_INFO with the number of IRQs
and enables VFIO_DEVICE_GET_IRQ_INFO
Signed-off-by: Antonios Motakis
---
drivers/vfio/platform/Makefile| 2 +-
drivers/vfio/platform/vfio_platform.c
Adds support to mask interrupts, and also for automasked interrupts.
Level sensitive interrupts are exposed as automasked interrupts and
are masked and disabled automatically when they fire.
Signed-off-by: Antonios Motakis
---
drivers/vfio/platform/vfio_platform_irq.c | 117
This patch forms the skeleton for platform devices support with VFIO.
Signed-off-by: Antonios Motakis
---
drivers/vfio/Kconfig | 1 +
drivers/vfio/Makefile | 1 +
drivers/vfio/platform/Kconfig | 9 ++
The ARM SMMU driver expects the IOMMU_EXEC flag, otherwise it will
set the page tables for a device as XN (execute never). This affects
devices such as the ARM PL330 DMA Controller, which fails to operate
if the XN flag is set on the memory it tries to fetch its instructions
from.
We introduce
From: Kim Phillips
Needed by platform device drivers, such as the vfio-platform driver [1],
in order to bypass the existing OF, ACPI, id_table and name string matches,
and successfully be able to be bound to any device, like so:
echo vfio-platform >
Hi, Michal,
On Mon, Apr 28, 2014 at 10:54 PM, Michal Hocko wrote:
> I really fail to see how that helps. compound_head is inlined and the
> compiler should be clever enough to optimize the code properly. I
> haven't tried that to be honest but this looks like it only adds a code
> without any
On Mon, Apr 28, 2014 at 04:35:38PM +0100, Nix wrote:
> /proc/$pid/stack of the two communicating ssh daemons was instructive:
>
> [] unix_wait_for_peer+0x9f/0xbc
> [] unix_dgram_sendmsg+0x41b/0x534
This one is a dgram socket...
> [] sock_sendmsg+0x84/0x9e
> [] SyS_sendto+0x10e/0x13f
> []
28.04.2014, 16:27, "Michal Hocko" :
> The series is based on top of the current mmotm tree. Once the series
> gets accepted I will post a patch which will mark the soft limit as
> deprecated with a note that it will be eventually dropped. Let me know
> if you would prefer to have such a patch a
Today we get error such as
L3 Custom Error: MASTER MPU TARGET L4PER2
But since the actual instruction triggerring the error Vs the point
at which we report error may not be aligned, it makes sense to try
and provide additional information - example the type of operation
that was attempted to
From: Rajendra Nayak
On DRA7, unlike on OMAP4 and OMAP5, the flag mux input numbers used
to indicate the source of errors are not continous. Have a way in the
driver to catch these and WARN the user of the flag mux input thats
either undocumented or wrong.
In the similar vein, Timeout errors in
On Mon, 28 Apr 2014, Vivek Gautam wrote:
> Add support to consume phy provided by Generic phy framework.
> Keeping the support for older usb-phy intact right now, in order
> to prevent any functionality break in absence of relevant
> device tree side change for ohci-exynos.
> Once we move to new
Fix format string mismatch in bonding_show_min_links().
Signed-off-by: Masanari Iida
---
drivers/net/bonding/bond_sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 431892f..cb95ee4 100644
---
From: Sricharan R
Since omap_l3_noc driver is now being used for OMAP5 and reusable with
DRA7 and AM437x, using omap4 specific naming is misleading.
Signed-off-by: Sricharan R
Signed-off-by: Nishanth Menon
Acked-by: Santosh Shilimkar
Acked-by: Peter Ujfalusi
Tested-by: Darren Etheridge
---
From: Rajendra Nayak
DRA7 is distinctly different from OMAP4 in terms of masters and clock
domain organization. There two main clock domains which is divided as
follows:
<0x4400 0x100> is clk1 and clk2 is the sub clock domain
<0x4500 0x1000> is clk3
Add all the data needed
Move the L3 master structure out of the static definition to enable
reuse for other SoCs.
Signed-off-by: Nishanth Menon
Acked-by: Santosh Shilimkar
Acked-by: Peter Ujfalusi
Tested-by: Darren Etheridge
---
V3: no change
drivers/bus/omap_l3_noc.h | 15 +++
1 file changed, 11
just simplify derefencing that is equivalent.
Signed-off-by: Nishanth Menon
Acked-by: Santosh Shilimkar
Acked-by: Peter Ujfalusi
Tested-by: Darren Etheridge
---
V3: no change
drivers/bus/omap_l3_noc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 25 Apr 2014, n...@esperi.org.uk verbalised:
> (This is extremely speculative: I don't really know how to debug
> problems like this, particularly not when the only machine I can
> reproduce the problem on is the headless one at the centre of my
> network, and with its NFS server stalled
On Mon, Apr 28, 2014 at 09:22:58AM -0500, Graham Moore wrote:
> On Mon, Apr 28, 2014 at 2:06 AM, Huang Shijie wrote:
> > On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
> >>
> >> Two things competing over the same pointer looks misdesigned to me. I will
> >> need
> >> to dig into
As per Documentation (OMAP4+), then masterid is infact encoded as
follows:
"L3_TARG_STDERRLOG_MSTADDR[7:0] STDERRLOG_MSTADDR stores the NTTP
master address. The master address is the concatenation of Prefix &
Initiator ConnID. It is defined on 8 bits. The 6 MSBs are used to
distinguish the
Currently the target instance information is organized indexed by bit
field offset into multiple arrays.
1. We currently have offsets specific to each target associated with each
clock domains are in seperate arrays:
l3_targ_inst_clk1
l3_targ_inst_clk2
l3_targ_inst_clk3
2. Then they are
This allows us to encompass target information and flag mux offset that
points to the target information into a singular structure. This saves
us the need to look up two different arrays indexed by module ID for
information.
This allows us to reduce the static target information allocation to
Il 28/04/2014 16:06, Andrea Arcangeli ha scritto:
>
> "task" is only used to increment task_struct->xxx_flt. I don't think
> async_pf_execute() actually needs this (current is PF_WQ_WORKER after
> all), but I didn't dare to do another change in the code I can hardly
> understand.
Considering
On 04/28, Denys Vlasenko wrote:
>
> It is possible to replace rip-relative addressing mode
> with addressing mode of the same length: (reg+disp32).
> This eliminates the need to fix up immediate
> and instruction length.
"and change instruction length", I presume.
I like this patch very much,
we do not use iclk directly anymore. And, even if we had to, we
should be using pm_runtime APIs to do the same to be completely SoC
independent.
Signed-off-by: Nishanth Menon
Acked-by: Santosh Shilimkar
Acked-by: Peter Ujfalusi
Tested-by: Darren Etheridge
---
change in V3: none
From: Afzal Mohammed
Add AM4372 information to handle L3 error.
AM4372 has two clk domains 100f and 200s. Provide flagmux and data
associated with it.
NOTE: Timeout doesn't have STDERRLOG_MAIN register. And per hardware
team, L3 timeout error cannot be cleared the normal way (by setting
bit 31
The logic between handling CUSTOM_ERROR and STANDARD_ERROR is just the
reporting style.
So make it generic, simplify and standardize the reporting with both
master and target information printed to log.
Handle the register address difference for master code for standard
error and custom error as
Current interrupt handler does the first level parse to identify the
slave and then handles the slave even identification, reporting and
clearing of event as well. It is hence logical to split the handler
into two where the primary handler just parses the flagmux till it
identifies a slave and the
The following V3 of the series is based on v3.15-rc1 + peter's patch series:
patch #1: https://patchwork.kernel.org/patch/3923141/
(drivers: bus: omap_l3: Convert to use devm_kzalloc)
patch #2: https://patchwork.kernel.org/patch/3923061/
(drivers: bus: omap_l3:
L3 error may be triggered using Debug interface (example JTAG) or
due to other errors, for example an opcode fetch (due to function
pointer or stack corruption) or a data access (due to some other
failure). NOC registers contain additional information to help aid
debug information.
With this, we
Hi Boris,
El 28/04/14 11:58, Boris BREZILLON escribió:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk
Add support for these clks
Andrew,
You applied the last (4th) memcg-kill-config_mm_owner.patch, but other
patches in this thread were ignored. Hopefully thi is because I sent
them chaotically.
Let me resend 1-3 in case you missed them. Acked by Michal.
Oleg.
init/main.c |1 -
kernel/exit.c | 18
Il 28/04/2014 17:03, Oleg Nesterov ha scritto:
async_pf_execute() passes tsk == current to gup(), this is doesn't
hurt but unnecessary and misleading. "tsk" is only used to account
the number of faults and current is the random workqueue thread.
Signed-off-by: Oleg Nesterov
---
On 4/28/14, 9:17 AM, Jiri Olsa wrote:
On Mon, Apr 28, 2014 at 09:01:57AM -0600, David Ahern wrote:
On 4/28/14, 3:22 AM, Jiri Olsa wrote:
From: Jiri Olsa
There's false assumption in the library detection code
assuming -liberty and -lz are always present once bfd
is detected. The fails on
Per reference manuals of Freescale P1020 and P2020 SoCs, USB controller
present in these SoCs has bit 17 of USBx_CONTROL register marked as
Reserved - there is no PHY_CLK_VALID bit there.
Testing for this bit in ehci_fsl_setup_phy() behaves differently on two
P1020RDB boards available here - on
> > Should I resend this patch series? If so, I will add some thing like the
> > following:
> >
> > The FTM PWM driver will be used in our Vybrid, LS1 and LS2+ SoCs, and on
> > Vybrid
> > and LS2 SoCs, the FTM devices are in LE mode, while on LS1 SoCs it in BE
> > mode.
> >
> > So this patch
On Sun, Apr 27, 2014 at 09:07:25PM +0100, Yuyang Du wrote:
> On Fri, Apr 25, 2014 at 03:53:34PM +0100, Morten Rasmussen wrote:
> > I fully agree. My point was that there is more to task consolidation
> > than just observing the degree of task parallelism. The system topology
> > has a lot to say
Remove start_kernel()->mm_init_owner(_mm, _task).
This doesn't really hurt but unnecessary and misleading. init_task
is the "swapper" thread == current, its ->mm is always NULL. And
init_mm can only be used as ->active_mm, not as ->mm.
mm_init_owner() has a single caller with this patch, perhaps
for_each_process_thread() is sub-optimal. All threads share the same
->mm, we can swicth to the next process once we found a thread with
->mm != NULL and ->mm != mm.
Signed-off-by: Oleg Nesterov
Reviewed-by: Michal Hocko
---
kernel/exit.c | 12 +---
1 files changed, 9 insertions(+),
"Search through everything else" in mm_update_next_owner() can
hit a kthread which adopted this "mm" via use_mm(), it should
not be used as mm->owner. Add the PF_KTHREAD check.
While at it, change this code to use for_each_process_thread()
instead of deprecated do_each_thread/while_each_thread.
Currently we use __raw_readl and writel in this driver. Considering
there is no specific need for a memory barrier, replacing writel
with endian-neutral writel_relaxed and replacing __raw_readls with
the corresponding endian-neutral readl_relaxed allows us to have a
standard set of register
This is an embarrassing patch :(.
Texas Corporation does not make OMAP. Texas Instruments Inc does.
For that matter I dont seem to be able to find a Texas Corporation on
the internet either.
While at it, update coverage to the current year and update the template
to remove redundant information
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