Hello,
just some commit log nit picking:
$Subject ~= s/mrmory/memory/
And also "ARM: " is the more typical prefix. Don't know if there is a
best practice for patches touching both arm and arm64. (But assuming
this will go through Russell's patch tracker this doesn't matter much.)
On Thu, Sep
The f2fs_direct_IO uses __allocate_data_block, but inside the allocation path,
we should update i_size at the changed time to update its inode page.
Otherwise, we can get wrong i_size after roll-forward recovery.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/data.c | 8
1 file changed, 8
Previously, f2fs activates SSR if the # of free segments reaches to the # of
overprovisioned segments.
In this case, SSR starts to use dirty segments only, so that the overprovisoned
space cannot be selected for new data.
This means that we have no chance to utilizae the overprovisioned space at
This patch changes the ipu_policy setting to use any combination of orthogonal
policies.
Signed-off-by: Changman Lee
Signed-off-by: Jaegeuk Kim
---
Documentation/filesystems/f2fs.txt | 6 +++---
fs/f2fs/segment.c | 2 +-
fs/f2fs/segment.h | 39
This patch introduces a flag in the nat entry structure to merge various
information such as checkpointed and fsync_done marks.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/node.c | 13 +++--
fs/f2fs/node.h | 28
2 files changed, 31 insertions(+), 10 deletions(-)
On 09/18/2014 12:53 PM, Lee Jones wrote:
On Thu, 18 Sep 2014, micky_ch...@realsil.com.cn wrote:
From: Micky Ching
Fix rts5227&5249 failed send buffer cmd after suspend,
PM_CTRL3 should reset before send any buffer cmd after suspend.
Otherwise, buffer cmd will failed, this will lead resume
On Thursday 18 September 2014 08:55 AM, Vivek Gautam wrote:
> Hi Kishon,
>
>
> On Wed, Sep 17, 2014 at 10:24 PM, Kishon Vijay Abraham I
> wrote:
>>
>>
>> On Tuesday 16 September 2014 10:32 AM, Vivek Gautam wrote:
>>> Currently the DP_PHY_ENABLE register is mapped in the driver,
>>> and
This patch revisited whole the recovery information during the f2fs_sync_file.
In this patch, there are three information to make a decision.
a) IS_CHECKPOINTED, /* is it checkpointed before? */
b) HAS_FSYNCED_INODE, /* is the inode fsynced before? */
c) HAS_LAST_FSYNC, /* has the
We can summarize the roll forward recovery scenarios as follows.
[Term] F: fsync_mark, D: dentry_mark
1. inode(x) | CP | inode(x) | dnode(F)
-> Update the latest inode(x).
2. inode(x) | CP | inode(F) | dnode(F)
-> No problem.
3. inode(x) | CP | dnode(F) | inode(x)
-> Recover to the latest
On Sat, Sep 13, 2014 at 01:23:59AM +0200, Alexandre Belloni wrote:
> From: Boris BREZILLON
>
> Retrieve the NFC clock to make sure it is enabled. Make that optional to
> ensure
> compatibility with previous device trees but document it as mandatory so newer
> device trees will include it.
>
>
On Mon, Sep 15, 2014 at 01:14:09PM +0800, Huang Ying wrote:
> On Sun, 2014-09-14 at 00:48 -0700, Jaegeuk Kim wrote:
> > On Sat, Sep 13, 2014 at 10:23:18PM +0800, Huang Ying wrote:
> > > On Fri, 2014-09-12 at 15:34 +0800, Huang Ying wrote:
> > > > On Thu, 2014-09-11 at 22:13 -0700, Jaegeuk Kim
On 09/17/2014 10:29 PM, Masanari Iida wrote:
This patch fix spelling typo "sleeped" in printk, found in
multiple rtlwifi drivers.
Signed-off-by: Masanari Iida
---
drivers/net/wireless/rtlwifi/rtl8188ee/phy.c | 2 +-
drivers/net/wireless/rtlwifi/rtl8192ce/phy.c | 2 +-
On Tue, 16 Sep 2014, Jacob Pan wrote:
> X-Powers AXP288 is a customized PMIC for Intel Baytrail-CR platforms. Similar
> to AXP202/209, AXP288 comes with USB charger, more LDO and BUCK channels, and
> AD converters. It also provides extended status and interrupt reporting
> capabilities than the
On Mon, Sep 15, 2014 at 11:13:15AM +0900, Changman Lee wrote:
> Hi JK,
>
> I think it' nicer if this can be used as 'OR' with other policy
> together. If so, we can also cover the weakness in high utilization.
Agreed.
I'll send another patch for that.
Thanks,
>
> Regard,
> Changman
>
> On
Hi,
Thank you for the review.
I changed the return value of MAX_BIO_BLOCKS to int.
IMO, it's the best way that I can do for now.
Thanks,
>From f3bcd1d658d1c4aa8178ddc2d4e6a7e45d8405cd Mon Sep 17 00:00:00 2001
From: Jaegeuk Kim
Date: Thu, 11 Sep 2014 14:37:35 -0700
Subject: [PATCH] f2fs: use
On Thursday 18 September 2014 12:34 AM, Peter Griffin wrote:
> Hi Kishon,
>
> On Wed, 17 Sep 2014, Kishon Vijay Abraham I wrote:
>
>> Hi,
>>
>> On Friday 15 August 2014 06:10 PM, Peter Griffin wrote:
>>> This patch removes the superflous .owner field for drivers which
>>> use the
On 09/17/2014 10:57 PM, Stephen Warren wrote:
> On 09/17/2014 01:55 PM, Ulf Hansson wrote:
>> On 12 September 2014 19:18, Stephen Warren wrote:
>>> From: Stephen Warren
>>>
>>> As soon as the CD IRQ is requested, it can trigger, since it's an
>>> externally controlled event. If it does,
Adds better description of IOSF driver to determinine when it should be enabled.
Also moves the Kconfig option to "Processor type and features" menu from main
configuration menu.
Signed-off-by: David E. Box
---
arch/x86/Kconfig | 32 +---
1 file changed, 17
Add Braswell PCI ID to list of supported ID's for iosf driver.
Signed-off-by: David E. Box
---
arch/x86/kernel/iosf_mbi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/iosf_mbi.c b/arch/x86/kernel/iosf_mbi.c
index 0a2faa3..e01f741 100644
--- a/arch/x86/kernel/iosf_mbi.c
Makes the iosf sideband available through debugfs. Allows developers to
experiment with using the sideband to provide debug and analytical tools for
units on the SoC.
Signed-off-by: David E. Box
---
arch/x86/Kconfig | 13 +
arch/x86/kernel/iosf_mbi.c | 23
These changes apply on top of the patches currently in Peter Anvin's tip tree.
V2: More descriptive Kconfig prompt for IOSF_MBI and IOSF_MBI_DEBUG
Cleaned up ifdef use on IOSF_MBI_DEBUG with DUMMY functions
David E. Box (3):
x86: iosf: Add Braswell PCI ID
x86: iosf: Add better
On 09/17/2014 10:58 PM, Greg Kroah-Hartman wrote:
> On Wed, Sep 17, 2014 at 03:44:58PM +0200, Michal Simek wrote:
>> Hi Greg,
>>
>> On 09/10/2014 12:43 PM, Michal Simek wrote:
>>> Add earlycon support for the cadence serial port.
>>> This is based on recent patches:
>>> "tty/serial: pl011: add
On Tue, Sep 16, 2014 at 5:43 PM, Tobias Klauser wrote:
>
> This could be simplified to:
>
> long arch_ptrace(struct task_struct *child, long request, unsigned long addr,
> unsigned long data)
> {
> return ptrace_request(child, request, addr, data);
> }
Okay, will change
On 09/17/2014 06:17 PM, Mark Rutland wrote:
> On Wed, Sep 17, 2014 at 03:30:49PM +0100, Michal Simek wrote:
>> From: Peter Crosthwaite
>>
>> Modern TTC implementations can extend the timer width to 32 bit. This
>> feature is not self identifying so the driver needs to be made aware
>> via device
On 18 September 2014 00:07:53 CEST, Greg Kroah-Hartman
wrote:
>On Wed, Sep 17, 2014 at 11:47:23PM +0200, Frans Klaver wrote:
>> The disp attribute is write-only, but sysfs doesn't know this.
>Currently
>> show_sys_acpi() is mimicking sysfs behavior, if the underlying acpi
>call
>> should fail.
On 18 September 2014 00:06:52 CEST, Joe Perches wrote:
>On Wed, 2014-09-17 at 23:47 +0200, Frans Klaver wrote:
>> Correct indentation and brace usage to comply with
>> Documentation/CodingStyle.
>>
>> Signed-off-by: Frans Klaver
>> ---
>> drivers/platform/x86/eeepc-laptop.c | 8 +---
>> 1
On Thu, 18 Sep 2014, micky_ch...@realsil.com.cn wrote:
> From: Micky Ching
>
> Fix rts5227&5249 failed send buffer cmd after suspend,
> PM_CTRL3 should reset before send any buffer cmd after suspend.
> Otherwise, buffer cmd will failed, this will lead resume fail.
>
> Signed-off-by: Micky
On 09/17/2014 08:23 PM, Kevin Easton wrote:
> I was actually thinking that the kernel would take care of the xsave /
> xrstor (for current), updating tsk->thread.fpu.state (for non-running
> threads) and sending an IPI for threads running on other CPUs.
>
> Of course userspace can always then
dma_mapping_error takes two parameters, but some of examples
in Documentation/DMA-API-HOWTO.txt just takes one. So correct
it.
Signed-off-by: Liu Hua
---
Documentation/DMA-API-HOWTO.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/DMA-API-HOWTO.txt
Now that we have completely moved from older USB-PHY drivers
to newer GENERIC-PHY drivers for PHYs available with USB controllers
on Exynos series of SoCs, we can remove the support for the same
in our host drivers too.
We also defer the probe for our host in case we end up getting
EPROBE_DEFER
Now that we have completely moved from older USB-PHY drivers
to newer GENERIC-PHY drivers for PHYs available with USB controllers
on Exynos series of SoCs, we can remove the support for the same
in our host drivers too.
We also defer the probe for our host in case we end up getting
EPROBE_DEFER
On 09/15/2014 06:44 PM, Kim Phillips wrote:
On Thu, 11 Sep 2014 12:34:21 -0500
"J. German Rivera" wrote:
From: "J. German Rivera"
APIs to access the Management Complex (MC) hardware
module of Freescale LS2 SoCs. This patch includes
APIs to check the MC firmware version and to manipulate
Addy,
On Wed, Sep 17, 2014 at 6:26 PM, addy ke wrote:
> Add public list
>
> On 2014/9/17 23:17, Doug Anderson wrote:
>> Addy,
>>
>> On Tue, Sep 16, 2014 at 6:30 PM, addy...@rock-chips.com
>> wrote:
>>> hi, all
>>
>> Any reason why you didn't add some public lists? It seems like this
>> is a
I am Heather Walker,This is my Third Email to you,I am at the end of the
road, and about to donate a huge amount through you. I promise that your
assistance would be rewarded. Please reply back to me for more
information. Remain Blessed
--
To unsubscribe from this list: send the line "unsubscribe
Hi all,
Today's linux-next merge of the kvm-arm tree got a conflict in
virt/kvm/arm/vgic.c between commit c06a841bf363 ("KVM: ARM: vgic:
register kvm_device_ops dynamically") from the kvm tree and commit
de56fb1923ca ("KVM: vgic: declare probe function pointer as const")
from the kvm-arm tree.
I
Hi Alan,
On Wed, Sep 17, 2014 at 8:27 PM, Alan Stern wrote:
> On Wed, 17 Sep 2014, Vivek Gautam wrote:
>
>> Now that we have completely moved from older USB-PHY drivers
>> to newer GENERIC-PHY drivers for PHYs available with USB controllers
>> on Exynos series of SoCs, we can remove the support
On 2014/9/4 5:19, Andrew Pinski wrote:
> Defines the macros which allow the signal structures to be the same between
> ILP32 and LP64.
>
> Signed-off-by: Andrew Pinski
> ---
> arch/arm64/include/uapi/asm/siginfo.h | 33
> arch/arm64/include/uapi/asm/signal.h
idea to add
yourself as a MAINTAINER for st-pwm?
(next-20140917))$ ./scripts/get_maintainer.pl -f drivers/regulator/st-pwm.c
Liam Girdwood (supporter:VOLTAGE AND CURRE...)
Mark Brown (supporter:VOLTAGE AND CURRE...)
Grant Likely (maintainer:OPEN FIRMWARE AND...)
Rob Herring (maintainer:OPEN
On Thu, Sep 18, 2014 at 08:59:32AM +0530, Pankaj Dubey wrote:
> +CC: Dong Aisheng
>
> Hi Arnd,
>
> On Wednesday, September 17, 2014, Arnd Bergmann wrote,
> > > V2 of this patchset and related discussion can be found here [1].
> > >
> > > Changes since v2:
> > > - Added back platform device
On Wed, Sep 17, 2014 at 04:50:50PM +0530, Pankaj Dubey wrote:
> Hi,
>
> On Wednesday, September 17, 2014, Dong Aisheng Wrote,
> > >
> > > +static struct syscon *of_syscon_register(struct device_node *np) {
> > > + struct syscon *syscon;
> > > + struct regmap *regmap;
> > > + void __iomem *base;
>
This patch fix spelling typo "sleeped" in printk, found in
multiple rtlwifi drivers.
Signed-off-by: Masanari Iida
---
drivers/net/wireless/rtlwifi/rtl8188ee/phy.c | 2 +-
drivers/net/wireless/rtlwifi/rtl8192ce/phy.c | 2 +-
drivers/net/wireless/rtlwifi/rtl8192cu/phy.c | 2 +-
+CC: Dong Aisheng
Hi Arnd,
On Wednesday, September 17, 2014, Arnd Bergmann wrote,
> > V2 of this patchset and related discussion can be found here [1].
> >
> > Changes since v2:
> > - Added back platform device support from syscon, with one change that
> >syscon will not be probed for DT
Hi Kishon,
On Wed, Sep 17, 2014 at 10:24 PM, Kishon Vijay Abraham I wrote:
>
>
> On Tuesday 16 September 2014 10:32 AM, Vivek Gautam wrote:
>> Currently the DP_PHY_ENABLE register is mapped in the driver,
>> and accessed to control power to the PHY.
>> With mfd-syscon and regmap interface
Hi Paul,
Please find the following patches which enable RCU early boot tests. For now
all we do in these tests are enqueue test callbacks and check if they are being
invoked or not.
I was able to reproduce the hang which Amit reported after reverting the fix. So
this should catch such errors if
Hi Paul,
Please find the following patches which enable RCU early boot tests. For now
all we do in these tests are enqueue test callbacks and check if they are being
invoked or not.
I was able to reproduce the hang which Amit reported after reverting the fix. So
this should catch such errors if
Add config and boot parameters to enable the self tests in rcutorture testing.
Signed-off-by: Pranith Kumar
---
tools/testing/selftests/rcutorture/configs/rcu/TINY02 | 2 ++
tools/testing/selftests/rcutorture/configs/rcu/TINY02.boot | 2 ++
Document the RCU self test boot parameters in kernel-parameters.txt.
Signed-off-by: Pranith Kumar
---
Documentation/kernel-parameters.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index
Add early boot self tests for RCU under CONFIG_PROVE_RCU.
Currently the only test is adding a dummy callback which increments a counter
which we then later verify after calling rcu_barrier*().
Signed-off-by: Pranith Kumar
---
kernel/rcu/rcu.h| 2 ++
kernel/rcu/tiny.c | 4 ++-
> -Original Message-
> From: David Miller [mailto:da...@davemloft.net]
> Sent: Wednesday, September 17, 2014 12:56 PM
> From: "Kweh, Hock Leong"
> Date: Wed, 17 Sep 2014 02:41:39 +
>
> > Thanks for the pointer. I did a quickly checking on the class number
> > to see if I could use
Hi,
In this patch series we use winkle for offlined cores. I successfully
tested the working of this with subcore functionality.
Test scenario was as follows:
1. Set SMT mode to 1, Set subores-per-core to 1
2. Offline a core, in this case cpu 32 (sending it to winkle)
3. Set subcores-per-core to
This patch fix spelling typos found in Kconfig.
Signed-off-by: Masanari Iida
---
arch/blackfin/Kconfig | 2 +-
arch/mips/cavium-octeon/Kconfig | 2 +-
drivers/i2c/busses/Kconfig | 2 +-
drivers/irqchip/Kconfig | 2 +-
drivers/platform/x86/Kconfig| 8
On Thu, Sep 18, 2014 at 11:31:35AM +0900, Masahiro Yamada wrote:
> On Wed, 17 Sep 2014 10:13:08 -0700 Brian Norris
> wrote:
> > On Tue, Sep 16, 2014 at 08:04:18PM +0900, Masahiro Yamada wrote:
> > > Masahiro Yamada (7):
> > > mtd: denali: fix the format of comment blocks
> > > mtd: denali:
[ cut here ]
WARNING: CPU: 2 PID: 1065 at lib/dma-debug.c:593
debug_dma_assert_idle+0x159/0x1d0()
ohci-pci :00:04.0: DMA-API: cpu touching an active dma mapped cacheline
[cln=0x03004180]
CPU: 2 PID: 1065 Comm: tumblerd Not tainted 3.17.0-0.rc5.git1.1.fc22.i686 #1
Call
Interesting anti-pattern.
Signed-off-by: Rusty Russell
---
drivers/char/hw_random/core.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index b4a21e9521cf..6a34feca6b43 100644
---
The previous patch added one potential problem: we can still be
reading from a hwrng when it's unregistered. Add a wait for zero
in the hwrng_unregister path.
Signed-off-by: Rusty Russell
---
drivers/char/hw_random/core.c | 5 +
1 file changed, 5 insertions(+)
diff --git
current_rng holds one reference, and we bump it every time we want
to do a read from it.
This means we only hold the rng_mutex to grab or drop a reference,
so accessing /sys/devices/virtual/misc/hw_random/rng_current doesn't
block on read of /dev/hwrng.
Using a kref is overkill (we're always
There's currently a big lock around everything, and it means that we
can't query sysfs (eg /sys/devices/virtual/misc/hw_random/rng_current)
while the rng is reading. This is a real problem when the rng is slow,
or blocked (eg. virtio_rng with qemu's default /dev/random backend)
This doesn't help
Another interesting anti-pattern.
Signed-off-by: Rusty Russell
---
drivers/char/hw_random/core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index 6a34feca6b43..96fa06716e95 100644
--- a/drivers/char/hw_random/core.c
+++
Amos Kong writes:
> I started a QEMU (non-smp) guest with one virtio-rng device, and read
> random data from /dev/hwrng by dd:
>
> # dd if=/dev/hwrng of=/dev/null &
>
> In the same time, if I check hwrng attributes from sysfs by cat:
>
> # cat /sys/class/misc/hw_random/rng_*
>
> The cat
On 2014-09-18, Kevin Easton wrote:
> On Thu, Sep 18, 2014 at 12:40:29AM +, Ren, Qiaowei wrote:
>>> Would it be prudent to use an error code other than EINVAL for the
>>> "hardware doesn't support it" case?
>>>
>> Seems like no specific error code for this case.
>
> ENXIO would probably be
在 2014年09月18日 04:13, Dmitry Torokhov 写道:
On Wed, Sep 17, 2014 at 12:48:16PM -0700, Doug Anderson wrote:
Caesar,
On Tue, Sep 16, 2014 at 8:59 PM, Caesar Wang wrote:
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Signed-off-by: zhaoyifeng
Signed-off-by:
Hi Brian,
On Wed, 17 Sep 2014 10:13:08 -0700
Brian Norris wrote:
> On Tue, Sep 16, 2014 at 08:04:18PM +0900, Masahiro Yamada wrote:
> >
> >
> > Masahiro Yamada (7):
> > mtd: denali: fix the format of comment blocks
> > mtd: denali: remove unnecessary variable initializations
> > mtd:
On Wednesday 17 September 2014, Catalin Marinas wrote:
> > > I think it gets worse, this function is called from irqchip_init(). I
> > > would have been slightly happier if it was called from the arm64
> > > init_IRQ(). But putting an ARM specific GIC initialisation call in a
> > > generic
On Thu, Sep 18, 2014 at 12:40:29AM +, Ren, Qiaowei wrote:
> > Would it be prudent to use an error code other than EINVAL for the
> > "hardware doesn't support it" case?
> >
> Seems like no specific error code for this case.
ENXIO would probably be OK. It's not too important as long as it's
>
> Could you add me to your Cc: list on this thread, please? I'm
> interested in the outcome... Thanks!
>
Hi Richard,
I've resend a v2 patch and now quote it in the end of this mail
for you.
I'm sorry to say the previously work of mine seems useless. Moving
audit_inode() to the O_CREAT case
On Wed, Sep 17, 2014 at 06:52:44PM +0100, Mark Rutland wrote:
> On Wed, Sep 17, 2014 at 10:57:59AM +0100, Robin Gong wrote:
> > This driver register pm_power_off with snvs power off function. If
> > your boards NOT use PMIC_ON_REQ to turn on/off external pmic, or use
> > other pin to do, please
From: Suravee Suthikulpanit
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure GICv2m register frame. Currently, GICV2m is available
in certain version of GIC-400.
The patch introduces a new property in
From: Suravee Suthikulpanit
This patch implelments the ARM64 version of arch_setup_msi_irqs(),
which does not return 1 for when PCI_CAP_ID_MSI and nvec > 1.
Cc: Mark Rutland
Cc: Marc Zyngier
Cc: Jason Cooper
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Suravee Suthikulpanit
---
From: Suravee Suthikulpanit
NOTE: Resend w/ proper subject for the 2/2 patch.
This patch set introduces support for MSI(-X) in GICv2m specification,
which is implemented in some variation of GIC400.
This depends on and has been tested with the following patch set which
implements PCI supports
On Thu, Sep 18, 2014 at 3:09 AM, David Hildenbrand
wrote:
>> On Wed, Sep 17, 2014 at 10:22 PM, Jens Axboe wrote:
>> >
>> > Another way would be to ensure that the timeout handler doesn't touch
>> > hw_ctx
>> > or tag_sets that aren't fully initialized yet. But I think this is
>> >
While debugging the kdump kernel, I found there is a compiling error:
If is_kdump_kernel() is called in some driver(for example, add it in
debugging code in module qla2xxx), there will be a compiling error:
ERROR: "elfcorehdr_addr" [drivers/scsi/qla2xxx/qla2xxx.ko] undefined!
Add EXPORT_SYMBOL
From: Suravee Suthikulpanit
This patch implelments the ARM64 version of arch_setup_msi_irqs(),
which does not return 1 for when PCI_CAP_ID_MSI and nvec > 1.
Cc: Mark Rutland
Cc: Marc Zyngier
Cc: Jason Cooper
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Suravee Suthikulpanit
---
From: Suravee Suthikulpanit
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure GICv2m register frame. Currently, GICV2m is available
in certain version of GIC-400.
The patch introduces a new property in
From: Suravee Suthikulpanit
This patch set introduces support for MSI(-X) in GICv2m specification,
which is implemented in some variation of GIC400.
This depends on and has been tested with the following patch set which
implements PCI supports for ARM64:
[PATCH v10 00/10] Support for
On 2014년 09월 17일 17:53, Vikas Sajjan wrote:
> Hi,
>
> On Wed, Sep 17, 2014 at 8:52 AM, Jonghwa Lee wrote:
>> Add rtc alarm and tick irq to wakeup sources in exynos3250.
>>
>> Signed-off-by: Jonghwa Lee
>> Acked-by : Chanwoo choi
>> ---
>> arch/arm/mach-exynos/pm.c |9 -
>> 1 file
On 2014년 09월 18일 00:48, Guenter Roeck wrote:
> On Wed, Sep 17, 2014 at 02:54:37PM +0900, Jonghwa Lee wrote:
>> To get more comprehensive and integrated thermal management, it adds ntc
>> thermistor to thermal framework as a thermal sensor. It's governed thermal
>> susbsystem only if it is
this patch extend the start and end address of initrd to be page aligned,
so that we can free all memory including the un-page aligned head or tail
page of initrd, if the start or end address of initrd are not page
aligned, the page can't be freed by free_initrd_mem() function.
Signed-off-by:
006815] kobject: (8807b4ef5dc8): attempted to be registered with
empty name!
[ 414.009482] Modules linked in:
[ 414.010818] CPU: 25 PID: 9860 Comm: trinity-c662 Tainted: GW
3.17.0-rc5-next-20140917-sasha-00041-gd01267b #1198
[ 414.014626] 0009 880236547a68 f
Commit ff7ee93f4 introduces kmemleak_alloc() for alloc_page_cgroup(),
but corresponding kmemleak_free() is missing, which makes kmemleak be
wrongly disabled after memory offlining. Log is pasted at the end of
this commit message.
This patch add kmemleak_free() into free_page_cgroup(). During page
On X86 there are already tracepoints for IRQ vectors through which IPIs
are handled. However this is highly X86 specific, and the IPI signaling
is not currently traced.
This is an attempt at adding generic IPI tracepoints to X86.
Signed-off-by: Nicolas Pitre
Acked-by: Daniel Lezcano
---
Hi Bjorn,
I see,
Thanks for your kind remind :)
-Original Message-
On Tue, Sep 16, 2014 at 7:05 PM, Wang, Yalin wrote:
[..]
> diff --git a/arch/arm/mach-msm/rpm-smd.c b/arch/arm/mach-msm/rpm-smd.c
Hi Yalin,
This file does not exist in mainline and this is not the forum for sending
On 09/18/2014 12:54 AM, Doug Anderson wrote:
Hi,
On Wed, Sep 17, 2014 at 9:51 AM, Mark Brown wrote:
On Wed, Sep 17, 2014 at 09:07:59PM +0800, Chris Zhong wrote:
Get voltage & duty table from device tree might be better, other platforms can
also use this
driver without any modify.
From: Micky Ching
Fix rts5227&5249 failed send buffer cmd after suspend,
PM_CTRL3 should reset before send any buffer cmd after suspend.
Otherwise, buffer cmd will failed, this will lead resume fail.
Signed-off-by: Micky Ching
---
drivers/mfd/rts5227.c| 19 +++
This is needed for calls into OF code that parses PCI ranges.
It signals support for memory mapped PCI I/O accesses that
are described be device trees.
Cc: Russell King
Cc: Arnd Bergmann
Cc: Rob Herring
Reviewed-by: Catalin Marinas
Signed-off-by: Liviu Dudau
---
arch/arm/include/asm/io.h |
Before commit 7b5436635800 the pci_host_bridge was created before the root bus.
As that commit has added a needless dependency on the bus for
pci_alloc_host_bridge()
the creation order has been changed for no good reason. Revert the order of
creation as we are going to depend on the
The inline version of ioport_map() that gets used when !CONFIG_GENERIC_IOMAP
is wrong. It returns a mapped (i.e. virtual) address that can start from
zero and completely ignores the PCI_IOBASE and IO_SPACE_LIMIT that most
architectures that use !CONFIG_GENERIC_MAP define.
Signed-off-by: Liviu
From: Catalin Marinas
The handling of PCI domains (or PCI segments in ACPI speak) is
usually a straightforward affair but its implementation is
currently left to the architectural code, with pci_domain_nr(b)
querying the value of the domain associated with bus b.
This patch introduces
Some architectures do not have a simple view of the PCI I/O space
and instead use a range of CPU addresses that map to bus addresses.
For some architectures these ranges will be expressed by OF bindings
in a device tree file.
This patch introduces a pci_register_io_range() helper function with
a
On Thu, Sep 18, 2014 at 12:48 AM, Christoph Hellwig wrote:
> On Wed, Sep 17, 2014 at 05:47:58PM +0800, Ming Lei wrote:
>> From: Ming Lei
>>
>> This patch removes two unnecessary blk_clear_rq_complete(),
>> the REQ_ATOM_COMPLETE flag is cleared inside blk_mq_start_request(),
>> so:
>>
>> -
Provide a function to parse the PCI DT ranges that can be used to
create a pci_host_bridge structure together with its associated
bus.
Cc: Bjorn Helgaas
Cc: Arnd Bergmann
Cc: Grant Likely
Cc: Rob Herring
Cc: Catalin Marinas
Signed-off-by: Liviu Dudau
---
drivers/of/of_pci.c| 108
This is my version 11 of the attempt at adding support for generic PCI host
bridge controllers that make use of device tree information to
configure themselves. It contains minor cleanups compared with v10 to address
the existing comments.
I'm going to ask for this series to be included in -next.
Hi,
This patch adds support for PCIe to AArch64. It depends on my v11 patch
that adds support for creating generic host bridge resources from device
trees. With that in place, I was able to boot a platform that
has PCIe host bridge support and use a PCIe network card.
Changes from v10:
- Added
Introduce a default implementation for remapping PCI bus I/O resources
onto the CPU address space. Architectures with special needs may
provide their own version, but most should be able to use this one.
Cc: Bjorn Helgaas
Cc: Arnd Bergmann
Cc: Rob Herring
Reviewed-by: Catalin Marinas
If the firmware has not assigned all the bus resources and
we are not just probing the PCIe busses, it makes sense to
assign the unassigned resources in pci_scan_root_bus().
Cc: Bjorn Helgaas
Cc: Arnd Bergmann
Cc: Jason Gunthorpe
Cc: Rob Herring
Signed-off-by: Liviu Dudau
---
Use the generic PCI domain and OF functions
to provide support for PCI Express on arm64.
Acked-by: Catalin Marinas
Signed-off-by: Liviu Dudau
---
arch/arm64/Kconfig | 22 ++-
arch/arm64/include/asm/Kbuild| 1 +
arch/arm64/include/asm/io.h | 3 +-
Add of_pci_get_domain_nr() to retrieve the PCI domain number
of a given device from DT. If the information is not present,
the function can be requested to allocate a new domain number.
Cc: Bjorn Helgaas
Cc: Arnd Bergmann
Cc: Grant Likely
Cc: Rob Herring
Reviewed-by: Catalin Marinas
The ranges property for a host bridge controller in DT describes
the mapping between the PCI bus address and the CPU physical address.
The resources framework however expects that the IO resources start
at a pseudo "port" address 0 (zero) and have a maximum size of IO_SPACE_LIMIT.
The conversion
On 17 September 2014 15:25, Peter Zijlstra wrote:
> On Tue, Sep 16, 2014 at 12:14:54AM +0200, Vincent Guittot wrote:
>> On 15 September 2014 13:42, Peter Zijlstra wrote:
>
>> > OK, I've reconsidered _again_, I still don't get it.
>> >
>> > So fundamentally I think its wrong to scale with the
Add public list
On 2014/9/17 23:17, Doug Anderson wrote:
> Addy,
>
> On Tue, Sep 16, 2014 at 6:30 PM, addy...@rock-chips.com
> wrote:
>> hi, all
>
> Any reason why you didn't add some public lists? It seems like this
> is a perfect discussion for linux-i2c.
>
>
>> According to i2c-bus
On Wed, Sep 17, 2014 at 5:26 PM, Chao Yu wrote:
> Both ceph_update_writeable_page and ceph_setattr will verify file size
> with max size ceph supported.
> There are two caller for ceph_update_writeable_page, ceph_write_begin and
> ceph_page_mkwrite. For ceph_write_begin, we have already verified
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