Add support for reading switch registers with 'ethtool -d'.
Signed-off-by: Guenter Roeck
---
v3:
- No change
v2:
- Do not compare new function pointers against NULL
- Check if get_regs is set before calling it
include/net/dsa.h | 7 +++
net/dsa/slave.c | 23 +++
2
On Wed, Oct 29, 2014 at 05:23:59PM +, Qais Yousef wrote:
> On 10/29/2014 05:08 PM, Andrew Bresticker wrote:
> > On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote:
> >> On 10/29/2014 12:12 AM, Andrew Bresticker wrote:
> >>> +- reg : Base address and length of the GIC registers.
> >>>
> >>
Signed-off-by: Mikael Svantesson
---
drivers/staging/skein/skein_api.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/skein/skein_api.c
b/drivers/staging/skein/skein_api.c
index 6e700ee..5bfce07 100644
--- a/drivers/staging/skein/skein_api.c
+++
Krzysztof Kozlowski writes:
> When resuming the system the power domain has to be powered on early so
> any runtime PM aware devices could resume.
>
> This fixes following scenario reproduced on Exynos DRM:
> 1. Power domain is off before suspending the system.
> 2. System is suspended to RAM.
>
On Wed, 29 Oct 2014, Peter Zijlstra wrote:
On Wed, Oct 29, 2014 at 04:32:04PM +, Auld, Will wrote:
I maybe repeating what Peter has just said but for elements in the
hierarchy where the mask is the same as its parents mask there is no
need for a separate CLOS even in the case where there
From: Peter Zijlstra
Date: Wed, 29 Oct 2014 18:31:10 +0100
> On Wed, Oct 29, 2014 at 06:13:45PM +0100, Peter Zijlstra wrote:
>> On Wed, Oct 29, 2014 at 09:29:55AM -0700, Cong Wang wrote:
>> > While you are on it, please fix rtnl_lock_unregistering_all() too?
>>
>> Ah, that's hidden someplace
From: Peter Zijlstra
Date: Wed, 29 Oct 2014 17:16:57 +0100
> On Tue, Oct 28, 2014 at 10:25:41PM +0800, Fengguang Wu wrote:
>> [ 122.247299] [ cut here ]
>> [ 122.247328] WARNING: CPU: 0 PID: 61 at kernel/sched/core.c:7312
>> __might_sleep+0x50/0x249()
>> [ 122.247334]
On 10/29/2014 12:43 AM, Arnd Bergmann wrote:
> On Tuesday 28 October 2014 20:58:48 Kevin Cernekee wrote:
>>
>> +#ifdef CONFIG_RAW_IRQ_ACCESSORS
>> +
>> +#ifndef irq_reg_writel
>> +# define irq_reg_writel(val, addr) __raw_writel(val, addr)
>> +#endif
>> +#ifndef irq_reg_readl
>> +# define
If an attacker can cause a controlled kernel stack overflow,
overwriting the restart block is a very juicy exploit target.
Moving the restart block to struct task_struct prevents this
exploit.
Note that there are other fields in thread_info that are also easy
targets, at least on some
On Thu, Oct 09, 2014 at 12:50:37PM +0200, Peter Zijlstra wrote:
> On Wed, Oct 01, 2014 at 10:56:35AM +0200, Andrea Arcangeli wrote:
>
> > +static inline long __get_user_pages_locked(struct task_struct *tsk,
> > + struct mm_struct *mm,
> > +
"das16" sets a timer running in `das16_cmd_exec()` and sets
`devpriv->timer_running` to indicate that it is running. The timer
expiration routine `das16_timer_interrupt()` checks
`devpriv->timer_running` to check whether it needs to reschedule the
timer, but this is not synchronized with
"das16" uses a kernel timer but never removes it from the queue
synchronously at the moment. Patch 1 makes sure this is done before it
is destroyed. Patch 2 uses the comedi device's main spin-lock to ensure
some state shared with the timer routine is updated in an SMP-safe
manner.
1) staging:
The "das16" driver optionally uses a kernel timer and a DMA channel to
support asynchronous data acquisition, but currently never calls
`del_timer_sync()`. There is some possibility the timer routine could
still be scheduled to run when the comedi "detach" handler is run to
clean up the device
pinctrl-at91.c. This
> >> allows to remove the dependency on mach/at91_pio.h to be able to move at91
> >> to
> >> multiplatform.
> >>
> >> Signed-off-by: Alexandre Belloni
> >
> > Patch applied to the pinctrl tree with Nicolas' ACK.
>
>
On Wed, Oct 29, 2014 at 06:13:45PM +0100, Peter Zijlstra wrote:
> On Wed, Oct 29, 2014 at 09:29:55AM -0700, Cong Wang wrote:
> > While you are on it, please fix rtnl_lock_unregistering_all() too?
>
> Ah, that's hidden someplace else, sure I can do that. Thanks for
> pointing it out.
Here goes..
On Wed, Oct 29, 2014 at 04:32:04PM +, Auld, Will wrote:
> I maybe repeating what Peter has just said but for elements in the
> hierarchy where the mask is the same as its parents mask there is no
> need for a separate CLOS even in the case where there are tasks in the
> group. So we can
On Fri, 24 Oct 2014, Peter Zijlstra wrote:
On Mon, Oct 20, 2014 at 05:18:55PM +0100, Matt Fleming wrote:
What is Cache Allocation Technology ( CAT )
---
Its a horrible name is what it is, please consider using the old name,
that at least was clear in
On Wed, Oct 29, 2014 at 10:13 AM, James Hogan wrote:
> On 29/10/14 16:55, Andrew Bresticker wrote:
>> Hi James,
>>
>> On Wed, Oct 29, 2014 at 2:21 AM, James Hogan wrote:
>>> Hi Andrew,
>>>
>>> On 29/10/14 00:12, Andrew Bresticker wrote:
- changed compatible string to include CPU version
On 10/29/2014 05:08 PM, Andrew Bresticker wrote:
On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote:
On 10/29/2014 12:12 AM, Andrew Bresticker wrote:
+- reg : Base address and length of the GIC registers.
Also except for sead3, the base address should be properly reported by the
hardware.
On 10/29/2014 10:17 AM, j...@joshtriplett.org wrote:
>>
>> But this is entirely a style decision, so I leave it up to the x86
>> maintainers ...
>
> I can certainly do that if the x86 maintainers prefer, but that tends to
> produce a net increase in lines of code, as well as duplicating all the
>
On Wed, Oct 29, 2014 at 09:59:25AM -0700, Kees Cook wrote:
> On Wed, Oct 29, 2014 at 9:10 AM, Josh Triplett wrote:
> > --- a/arch/x86/kernel/process-io.h
> > +++ b/arch/x86/kernel/process-io.h
> > @@ -1,9 +1,17 @@
> > #ifndef _X86_KERNEL_PROCESS_IO_H
> > #define _X86_KERNEL_PROCESS_IO_H
> >
> >
1 to
>> multiplatform.
>>
>> Signed-off-by: Alexandre Belloni
>
> Patch applied to the pinctrl tree with Nicolas' ACK.
This patch broke the build for sama5_defconfig in next-20141029[1], as
well as the other at91*defconfigs.
Kevin
[1]
http://images.armcloud.us/kern
On Wed Oct 29 2014 at 9:35:34 AM Andrea Arcangeli wrote:
>
> Use the more generic get_user_pages_unlocked which has the additional
> benefit of passing FAULT_FLAG_ALLOW_RETRY at the very first page fault
> (which allows the first page fault in an unmapped area to be always
> able to block
On Wed, Oct 29, 2014 at 09:29:55AM -0700, Cong Wang wrote:
> (Adding netdev@...)
>
> On Wed, Oct 29, 2014 at 9:16 AM, Peter Zijlstra wrote:
> >
> > Dave, this relies on bits currently in tip/sched/core, if you're ok I'll
> > merge it through that tree.
> >
> > ---
> > Subject: netdev: Fix
On 29/10/14 16:55, Andrew Bresticker wrote:
> Hi James,
>
> On Wed, Oct 29, 2014 at 2:21 AM, James Hogan wrote:
>> Hi Andrew,
>>
>> On 29/10/14 00:12, Andrew Bresticker wrote:
>>> - changed compatible string to include CPU version
>>
>>> +Required properties:
>>> +- compatible : Should be
Kever,
On Thu, Oct 9, 2014 at 10:23 PM, Kever Yang wrote:
> dclk_vop0/1 is the source of HDMI TMDS clock in rk3288, usually we
> use 594MHz for clock source of dclk_vop0/1.
>
> HDMI CTS 7-9 require TMDS Clock jitter is lower than 0.25*Tbit:
> TMDS clock(MHz) CTS require jitter (ps)
>
Geert Uytterhoeven writes:
> Hi Ulf,
>
> On Wed, Oct 29, 2014 at 2:25 PM, Ulf Hansson wrote:
>> On 23 October 2014 14:12, Geert Uytterhoeven wrote:
>>> PM domains are powered on/off from various places. Some callers do
>>> latency measurements, others don't. Consolidate using two helper
>>>
Hi,
On 27/10/14 01:41, Wanpeng Li wrote:
> This patch pushes task away if the dealine of the task is equal
> to current during wake up. The same behavior as rt class.
>
Right.
Thanks,
- Juri
> Signed-off-by: Wanpeng Li
> ---
> kernel/sched/deadline.c | 2 +-
> 1 file changed, 1
On Wed, Oct 29, 2014 at 02:02:51PM +0100, Boris Brezillon wrote:
> On Tue, 28 Oct 2014 11:13:11 -0700 Brian Norris
> wrote:
> > On Tue, Oct 21, 2014 at 03:08:41PM +0200, Boris Brezillon wrote:
> > > +static int sunxi_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,
> > > +
On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote:
> On 10/29/2014 12:12 AM, Andrew Bresticker wrote:
>>
>> +- reg : Base address and length of the GIC registers.
>>
>
> Also except for sead3, the base address should be properly reported by the
> hardware. The size is fixed (for a specific
Geert Uytterhoeven writes:
> Signed-off-by: Geert Uytterhoeven
Acked-by: Kevin Hilman
Though I tend to prefer a brief changlog that answers "why", even if it may
seem obvious.
Kevin
> ---
> drivers/base/power/domain.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff
On 10/29/2014 04:56 PM, Andrew Bresticker wrote:
On Wed, Oct 29, 2014 at 4:01 AM, Qais Yousef wrote:
On 10/29/2014 12:12 AM, Andrew Bresticker wrote:
+- mti,available-cpu-vectors : Specifies the list of CPU interrupt vectors
+ to which the GIC may route interrupts. May contain up to 6
Hi,
On 27/10/14 01:41, Wanpeng Li wrote:
> This patch add deadline rq status print.
>
Don't know if useful, but we could add this, just to be consistent.
Thanks,
- Juri
> Signed-off-by: Wanpeng Li
> ---
> kernel/sched/deadline.c | 9 +
> kernel/sched/debug.c| 7 +++
>
On 10/28/2014 9:57 PM, Gioh Kim wrote:
>
> Hello,
>
> I found that ion insert freed-page at the tail of list
> and extract at the head.
>
> I think it is good for cache to use the most recently used page
> but these pages in pool are not cached memory.
> So I'm not sure using hot page is better
On Wed, Oct 29, 2014 at 9:10 AM, Josh Triplett wrote:
> On the vast majority of modern systems, no processes will use the
> userspsace I/O syscalls, iopl and ioperm. Add a new config option,
> CONFIG_X86_IOPORT, to support configuring them out of the kernel
> entirely. Most current systems do
On Wed, Oct 29, 2014 at 4:01 AM, Qais Yousef wrote:
> On 10/29/2014 12:12 AM, Andrew Bresticker wrote:
>>
>> +- mti,available-cpu-vectors : Specifies the list of CPU interrupt vectors
>> + to which the GIC may route interrupts. May contain up to 6 entries,
>> one
>> + for each of the CPU's
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> Some chips, such as BCM6328, only require the former driver. Some
> BCM7xxx STB configurations only require the latter driver. Treat them
> as two separate entities, and update the mach-bcm dependencies to
> reflect the change.
>
> Signed-off-by:
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> This can compile for MIPS (or anything else) now.
>
> Signed-off-by: Kevin Cernekee
Acked-by: Florian Fainelli
> ---
> drivers/irqchip/Kconfig | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/irqchip/Kconfig
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> The cached value already incorporates irq_fwd_mask, and was saved the
> last time an IRQ was enabled/disabled.
>
> Signed-off-by: Kevin Cernekee
Acked-by: Florian Fainelli
> ---
> drivers/irqchip/irq-bcm7120-l2.c | 11 +++
> 1 file
Hi James,
On Wed, Oct 29, 2014 at 2:21 AM, James Hogan wrote:
> Hi Andrew,
>
> On 29/10/14 00:12, Andrew Bresticker wrote:
>> - changed compatible string to include CPU version
>
>> +Required properties:
>> +- compatible : Should be "mti,-gic". Supported variants:
>> + - "mti,interaptiv-gic"
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> This mask should have been 0x_, not 0x0fff_.
>
> The change should not have an effect on current users (STB) because bits
> 31:27 are unused.
Nice catch!
>
> Signed-off-by: Kevin Cernekee
Acked-by: Florian Fainelli
> ---
>
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> This keeps things consistent between the "core" bcm7120-l2 driver and the
> helpers in generic-chip.c.
>
> Signed-off-by: Kevin Cernekee
Acked-by: Florian Fainelli
> ---
> drivers/irqchip/irq-bcm7120-l2.c | 10 +-
> 1 file changed, 5
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> The irq-brcmstb-l2 driver has a single dependency on the ARM code, the
> do_bad_IRQ macro. Expand this macro in-place so that the driver can be
> built on non-ARM platforms.
>
> Signed-off-by: Kevin Cernekee
Acked-by: Florian Fainelli
> ---
>
Daniel Lezcano writes:
> On 10/28/2014 08:01 AM, Preeti Murthy wrote:
>> On Thu, Oct 23, 2014 at 2:31 PM, Daniel Lezcano
>> wrote:
>>> In the current code, the check to reflect or not the outcoming state is done
>>> against the idle state which has been chosen and its value.
>>>
>>> Instead of
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> This change was just made on bcm7120-l2, so let's keep things consistent
> between the two drivers.
>
> Signed-off-by: Kevin Cernekee
Acked-by: Florian Fainelli
> ---
> drivers/irqchip/irq-brcmstb-l2.c | 22 +++---
> 1 file
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> A couple of accesses to IRQEN (base+0x00) just used "base" directly, so
> they would break if IRQEN ever became nonzero. Make sure that all
> reads/writes specify the register offset constant.
>
> Signed-off-by: Kevin Cernekee
Acked-by: Florian
Add common DT bindings to support PCI controller driver for port 0 on all of
the K2 SoCs that has Synopsis Designware based pcie h/w.
Signed-off-by: Murali Karicheri
CC: Santosh Shilimkar
CC: Rob Herring
CC: Pawel Moll
CC: Mark Rutland
CC: Ian Campbell
CC: Kumar Gala
CC: Russell King
CC:
On 10/28/2014 08:58 PM, Kevin Cernekee wrote:
> This check may be prone to race conditions, e.g.
>
> 1) Some external event (e.g. GPIO level) causes an IRQ to become pending
> 2) Peripheral asserts the L2 IRQ
> 3) CPU takes an interrupt
> 4) The event from #1 goes away
> 5)
We can leverage the VM_FAULT_RETRY functionality in the page fault
paths better by using either get_user_pages_locked or
get_user_pages_unlocked.
The former allow conversion of get_user_pages invocations that will
have to pass a "" parameter to know if the mmap_sem was dropped
during the call.
On Thu, Oct 30, 2014 at 12:08:12AM +0800, Greg KH wrote:
> On Tue, Oct 28, 2014 at 11:09:10PM -0700, Tristan Lelong wrote:
> > This patch removes tabs used to align variable names in declaration and
> > assignation.
> > It replaces them with exactly one space.
>
> Why? This seems like a totally
To support dynamic addition/remove we add reference
counter.
Signed-off-by: Tomas Winkler
---
V2: code style and documentation fixes
drivers/misc/mei/amthif.c | 14 ++---
drivers/misc/mei/bus.c | 39 --
drivers/misc/mei/client.c | 126
Javier,
On Wed, Oct 29, 2014 at 9:29 AM, Javier Martinez Canillas
wrote:
>>> @@ -76,6 +80,7 @@
>>> regulator-min-microvolt = <330>;
>>> regulator-max-microvolt = <330>;
>>> regulator-name =
Hi Benoit,
> On Oct 29, 2014, at 18:34 , Benoit Parrot wrote:
>
> Pantelis,
>
> Thanks for the feedback.
>
> Pantelis Antoniou wrote on Wed [2014-Oct-29
> 10:53:44 +0200]:
>> Hi Benoit,
>>
>>> On Oct 21, 2014, at 23:09 , Benoit Parrot wrote:
>>>
>>> Based on Boris Brezillion work this is
On Wed, Oct 29, 2014 at 11:41:22AM -0500, Benoit Parrot wrote:
> Maxime Ripard wrote on Wed [2014-Oct-29
> 11:45:59 +0100]:
> > Hi,
> >
> > On Tue, Oct 21, 2014 at 03:09:58PM -0500, Benoit Parrot wrote:
> > > Based on Boris Brezillion work this is a reworked patch
> > > of his initial GPIO
Now that Keystone PCI driver is merged to v3.18, this patch series
add build options and DTS bindings to enable the driver for Keystone SoCs.
v1: resend with some minor fix up of the commit description and fixing
the email ID for Santosh.
CC: Santosh Shilimkar
CC: Greg Kroah-Hartman
CC:
K2E SoC has a second PCI port based on Synopsis Designware PCIe h/w.
Add DT bindings to support PCI controller for port 1 for this SoC.
Signed-off-by: Murali Karicheri
CC: Santosh Shilimkar
CC: Rob Herring
CC: Pawel Moll
CC: Mark Rutland
CC: Ian Campbell
CC: Kumar Gala
CC: Russell King
Now that Keystone PCI controller is merged, add pcie related options
by default for keystone architecture so that driver can be enabled in
the build.
Signed-off-by: Murali Karicheri
CC: Russell King
CC: Santosh Shilimkar
---
- v1 - No change w.r.t
arch/arm/mach-keystone/Kconfig |2 ++
Signed-off-by: Murali Karicheri
CC: Santosh Shilimkar
CC: Russell King
CC: Greg Kroah-Hartman
---
v1 - fixed email ID for Santosh
arch/arm/configs/keystone_defconfig |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/keystone_defconfig
On Thu, Oct 09, 2014 at 12:47:23PM +0200, Peter Zijlstra wrote:
> On Wed, Oct 01, 2014 at 10:56:35AM +0200, Andrea Arcangeli wrote:
> > +static inline long __get_user_pages_locked(struct task_struct *tsk,
> > + struct mm_struct *mm,
> > +
Maxime Ripard wrote on Wed [2014-Oct-29
11:45:59 +0100]:
> Hi,
>
> On Tue, Oct 21, 2014 at 03:09:58PM -0500, Benoit Parrot wrote:
> > Based on Boris Brezillion work this is a reworked patch
> > of his initial GPIO hogging mechanism.
> > This patch provides a way to initally configure specific
From: Lars Ellenberg
This was not noticed for many years. Affects operation if
md raid is used a backing device for DRBD.
Signed-off-by: Philipp Reisner
Signed-off-by: Lars Ellenberg
---
drivers/block/drbd/drbd_req.c | 1 +
1 file changed, 1 insertion(+)
diff --git
A connection timeout affects all volumes of a resource!
Under the following conditions:
A resource with multiple volumes
AND
ko-count >=1
AND
a write request triggers the timeout (ko-count * timeout)
DRBD's internal state gets confused. That in turn may
lead to very miss leading follow up
On 10/29/2014 03:07 AM, Matthias Klein wrote:
Am 29.10.2014 um 02:33 schrieb Stephen Warren:
On 10/27/2014 06:52 PM, Matthias Klein wrote:
The model B and B+ differ in the GPIO lines for ACT and PWR led.
The PWR led on the B+ model is active low.
This new file is almost identical to
Currently the _dm RX handler detects breaks but does not pass any
characters to uart_handle_sysrq_char().
The _dm optimizations combined with the port's spin lock make if
difficult to pass all characters to the sysrq logic because we cannot
safely call uart_handle_sysrq_char() when the lock is
From: Andreas Gruenbacher
Avoid generic netlink calls in other parts of the code base.
Signed-off-by: Philipp Reisner
Signed-off-by: Lars Ellenberg
---
drivers/block/drbd/drbd_int.h | 1 -
drivers/block/drbd/drbd_main.c | 17 +++--
drivers/block/drbd/drbd_nl.c | 2 +-
3
On 2014-10-29 17:05, Greg Kroah-Hartman wrote:
> Please send this as a "correct" patch, not one with a whole bunch of
> other stuff in it that I would have to hand-edit in order to apply
> properly.
>
> Remember, you want to make it as easy as possible for me to accept your
> patches, so far,
Symptoms:
If DRBD was "cleanly shut down" (all in sync, both Secondary before
disconnect, identical data generation uuids), and then one side was
promoted *during* the next connection handshake, the role change
could confuse the handshake.
The Primary would get stuck in WFBitmapS, the Secondary
Old backward-compat cruft
Signed-off-by: Philipp Reisner
Signed-off-by: Lars Ellenberg
---
drivers/block/drbd/drbd_int.h | 29 -
1 file changed, 4 insertions(+), 25 deletions(-)
diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h
index
Hi,
these are the proposed DRBD changes for 3.19. All minor stuff
and fixes.
I will repost it in one week with the appropriate CC: stable
header set, and eventual feedback integrated.
Thanks!
Andreas Gruenbacher (2):
drbd: Minor cleanups
drbd: Only use drbd_msg_put_info() in drbd_nl.c
From: Lars Ellenberg
If for some reason DRBD resync was the only activity on a backend
device, drbd_rs_c_min_rate_throttle() would mistakenly decide that it is
still initialization time, and keep throttling the resync.
This patch explicitly initializes ->rs_last_events to the current
backend
From: Andreas Gruenbacher
. Update comments
. drbd_set_{in,out_of}_sync(): Remove unused parameters
. Move common code into adm_del_resource()
. Redefine ERR_MINOR_EXISTS -> ERR_MINOR_OR_VOLUME_EXISTS
Signed-off-by: Philipp Reisner
Signed-off-by: Lars Ellenberg
---
Use the more generic get_user_pages_unlocked which has the additional
benefit of passing FAULT_FLAG_ALLOW_RETRY at the very first page fault
(which allows the first page fault in an unmapped area to be always
able to block indefinitely by being allowed to release the mmap_sem).
Signed-off-by:
On Fri 24-10-14 15:38:21, Tejun Heo wrote:
> After invoking ->dirty_inode(), __mark_inode_dirty() does smp_mb() and
> tests inode->i_state locklessly to see whether it already has all the
> necessary I_DIRTY bits set. The comment above the barrier doesn't
> contain any useful information - memory
On Wed, Oct 29, 2014 at 2:43 AM, Thierry Reding
wrote:
> On Tue, Oct 28, 2014 at 03:27:50PM -0700, Andrew Bresticker wrote:
> [...]
>> diff --git
>> a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
>>
This allows the get_user_pages_fast slow path to release the mmap_sem
before blocking.
Signed-off-by: Andrea Arcangeli
---
arch/mips/mm/gup.c| 8 +++-
arch/powerpc/mm/gup.c | 6 ++
arch/s390/mm/gup.c| 6 ++
arch/sh/mm/gup.c | 6 ++
arch/sparc/mm/gup.c | 6
This allows those get_user_pages calls to pass FAULT_FLAG_ALLOW_RETRY
to the page fault in order to release the mmap_sem during the I/O.
Signed-off-by: Andrea Arcangeli
---
drivers/iommu/amd_iommu_v2.c | 6 ++
drivers/media/pci/ivtv/ivtv-udma.c | 6 ++
drivers/scsi/st.c
Some caller (like KVM) may want to set the gup_flags like
FOLL_HWPOSION to get a proper -EHWPOSION retval instead of -EFAULT to
take a more appropriate action if get_user_pages runs into a memory
failure.
Signed-off-by: Andrea Arcangeli
---
include/linux/mm.h | 4
mm/gup.c | 44
This patchset standalone is an optimization leveraging the page fault
FAULT_FLAG_ALLOW_RETRY flag which allows the page fault paths to drop
the mmap_sem before I/O.
For the userfaultfd patchset this patch is instead a dependency as we
need that flag always set the first time any thread attempts a
Pantelis,
Thanks for the feedback.
Pantelis Antoniou wrote on Wed [2014-Oct-29
10:53:44 +0200]:
> Hi Benoit,
>
> > On Oct 21, 2014, at 23:09 , Benoit Parrot wrote:
> >
> > Based on Boris Brezillion work this is a reworked patch
> > of his initial GPIO hogging mechanism.
> > This patch
Hi,
On 27/10/14 01:41, Wanpeng Li wrote:
> The yield semantic of deadline class is to reduce remaining runtime to
> zero, and then update_curr_dl() will stop it. However, comsumed bandwidth
> is reduced from the budget of yield task again even if it has already been
> set to zero which leads
I maybe repeating what Peter has just said but for elements in the hierarchy
where the mask is the same as its parents mask there is no need for a separate
CLOS even in the case where there are tasks in the group. So we can inherit the
CLOS of the parent until which time both the mask is
(Adding netdev@...)
On Wed, Oct 29, 2014 at 9:16 AM, Peter Zijlstra wrote:
>
> Dave, this relies on bits currently in tip/sched/core, if you're ok I'll
> merge it through that tree.
>
> ---
> Subject: netdev: Fix sleeping inside wait event
> From: Peter Zijlstra
> Date: Wed Oct 29 17:04:56 CET
On 14/10/29, Greg KH wrote:
> On Wed, Oct 29, 2014 at 09:35:06AM -0400, Richard Guy Briggs wrote:
> > When an AUDIT_GET_FEATURE message is sent from userspace to the kernel, it
> > should reply with a message tagged as an AUDIT_GET_FEATURE type with a
> > struct
> > audit_feature. The current
From: Mikko Perttunen
This clock has never been able to do anything.
Signed-off-by: Mikko Perttunen
Signed-off-by: Tomeu Vizoso
---
v2: * Don't remove emc_mux as it's being used by the MC clock now
---
drivers/clk/tegra/clk-tegra124.c | 1 -
1 file changed, 1 deletion(-)
diff --git
Needed to properly decode the ram code register.
Signed-off-by: Tomeu Vizoso
---
v3: * Clarify wording as suggested by Mikko
---
Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
Hello Chris,
On 10/29/2014 04:40 PM, Doug Anderson wrote:
>> regulator-min-microvolt = <75>;
>> regulator-max-microvolt = <130>;
>> regulator-name = "vdd_arm";
>> +
On Mon, 2014-10-27 at 12:28 -0700, Feng Kan wrote:
> This parch adds the device tree nodes for APM X-Gnene USB host controller.
> Since X-Gene SOC supports maximum 2 USB ports, 2 dts node are added.
>
> Signed-off-by: Bao Truong
> Signed-off-by: Feng Kan
> ---
>
From: Mikko Perttunen
This adds a new file, tegra124-jetson-tk1-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main Jetson TK1 device tree.
Signed-off-by: Mikko Perttunen
Signed-off-by: Tomeu Vizoso
---
v2: * Fix the unit addresses of the
On Mon, 27 Oct 2014, Steven Rostedt wrote:
> This adds the allocation of dynamic trampolines. It still does not
> allow for dynamic ftrace_ops to use them on CONFIG_PREEMPT systems.
> That will come in 3.20, as I want to test out call_rcu_tasks() for
> a bit first on my own boxes.
>
>
On Tegra124, as we now have a proper driver for the EMC.
Signed-off-by: Tomeu Vizoso
---
drivers/clk/tegra/clk-divider.c | 2 +-
drivers/clk/tegra/clk-tegra124.c | 13 +
2 files changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/tegra/clk-divider.c
From: Mikko Perttunen
The driver is currently only tested on Tegra124 Jetson TK1, but should
work with other Tegra124 boards, provided that correct EMC tables are
provided through the device tree. Older chip models have differing
timing change sequences, so they are not currently supported.
From: Mikko Perttunen
Will be very useful when tuning memory scaling.
Signed-off-by: Mikko Perttunen
Signed-off-by: Tomeu Vizoso
---
drivers/memory/tegra/tegra124-emc.c | 36
1 file changed, 36 insertions(+)
diff --git
From: Mikko Perttunen
Implements functionality needed to change the rate of the memory bus clock.
Signed-off-by: Mikko Perttunen
Signed-off-by: Tomeu Vizoso
---
v2: * Use subsys_initcall(), so it gets probed after the MC driver and
before the CAR driver
---
From: Mikko Perttunen
Add binding documentation for the nvidia,tegra124-emc device tree node.
Signed-off-by: Mikko Perttunen
Signed-off-by: Tomeu Vizoso
---
v2: * Specify the unit addresses for the timings and timing nodes
---
.../bindings/memory-controllers/tegra-emc.txt | 118
From: Mikko Perttunen
Needed for the EMC and MC drivers to know what timings from the DT to use.
Signed-off-by: Mikko Perttunen
Signed-off-by: Tomeu Vizoso
---
drivers/soc/tegra/fuse/tegra-apbmisc.c | 19 +++
include/soc/tegra/fuse.h | 1 +
2 files changed, 20
From: Mikko Perttunen
The EMC driver needs to know the number of external memory devices and also
needs to update the EMEM configuration based on the new rate of the memory bus.
To know how to update the EMEM config, looks up the values of the burst regs in
the DT, for a given timing.
The EMC clock needs some extra information for changing its rate.
Signed-off-by: Tomeu Vizoso
---
.../bindings/clock/nvidia,tegra124-car.txt | 46 +-
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git
The MC driver needs some timing-specific information to program the EMEM during
a rate change of the EMC clock.
Signed-off-by: Tomeu Vizoso
---
.../memory-controllers/nvidia,tegra-mc.txt | 46 +-
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git
From: Mikko Perttunen
This adds a node for the EMC memory controller. It is always enabled, but only
provides read-only functionality without board-specific timing tables.
Signed-off-by: Mikko Perttunen
Signed-off-by: Tomeu Vizoso
---
arch/arm/boot/dts/tegra124.dtsi | 7 +++
1 file
Hello,
in this v3 you can find these changes:
* Have the EMC clock use the emc_lock when writing to the register it shares
with the MC clock
* Clarify the wording of the new property added to nvidia,tegra20-apbmisc, as
suggested by Mikko
* On Tegra124, have the EMC clock be the parent of the
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