> On Thu, 27 Nov 2014, David Hildenbrand wrote:
> > > OTOH, there is no reason why we need to disable preemption over that
> > > page_fault_disabled() region. There are code pathes which really do
> > > not require to disable preemption for that.
> > >
> > > We have that seperated in preempt-rt fo
On Thu, Nov 27, 2014 at 01:35:39PM +0100, Paul Bolle wrote:
> Joonsoo,
>
> On Mon, 2014-11-24 at 17:15 +0900, Joonsoo Kim wrote:
> > Until now, debug-pagealloc needs extra flags in struct page, so we need
> > to recompile whole source code when we decide to use it. This is really
> > painful, beca
On Fri, Nov 21, 2014 at 8:54 AM, Benoit Parrot wrote:
> Add GPIO hogging documentation to gpio.txt
>
> Signed-off-by: Benoit Parrot
> ---
> Changes since v1:
> * Split the devicetree bindings documentation in its own patch.
>
> Documentation/devicetree/bindings/gpio/gpio.txt | 25
> +++
On Fri, Nov 21, 2014 at 8:54 AM, Benoit Parrot wrote:
> Based on Boris Brezillion's work this is a reworked patch
> of his initial GPIO hogging mechanism.
> This patch provides a way to initally configure specific GPIO
> when the gpio controller is probed.
>
> The actual DT scanning to collect the
On Thu, Nov 27, 2014 at 08:13:03PM +0530, Anjana Sasindran wrote:
> This patch fixes the five checkpatch.pl warnings:
>
> WARNING:Missing a blank line after declaration
>
> Signed-off-by: Anjana Sasindran
> ---
> drivers/staging/rtl8188eu/hal/usb_halinit.c | 6 ++
> 1 file changed,
On Fri, 28 Nov 2014, Masahiro Yamada wrote:
> This line converts PHYS_OFFSET into PHYS_PFN_OFFSET.
> It is better to use PAGE_SHIFT rather than the magic number 12.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Nicolas Pitre
> ---
>
> arch/arm/kernel/head.S | 2 +-
> 1 file changed, 1 inser
On 11/27/2014 11:52 PM, Arnd Bergmann wrote:
> On Thursday 27 November 2014 20:46:12 Peter Ujfalusi wrote:
>>
>> I see. With this series I did not planed to fix all edma related issues, just
>> as a start clean up the related header files. I would rather not add fixes to
>> mmc, spi, etc drivers si
On Fri, 28 Nov 2014, Masahiro Yamada wrote:
> This comment does not correspond to the actual code.
>
> When zImage is loaded at a lower *OR* higher address of
> the destination of Image, it won't overwrite itself.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Nicolas Pitre
> ---
>
> arch/a
After perf record finishes, it prints file size and number of samples
in the file but this info is wrong since it assumes typical sample
size of 24 bytes and divides file size by the value.
However as we post-process recorded samples for build-id, it can show
correct number like below. If build-i
After perf record finishes, it prints file size and number of samples
in the file but this info is wrong since it assumes typical sample
size of 24 bytes and divides file size by the value.
However as we post-process recorded samples for build-id, it can show
correct number like below. If build-i
It's only used for perf record to process build-id because its file
size it's not fixed at this time due to remaining header features.
However data offset and size is available so that we can use the
perf_session__process_events() once we set the file size as the
current offset like for now.
Signe
On Thu, Nov 27, 2014 at 02:05:56PM +0100, Ingo Molnar wrote:
>
> Any replies to this regression after 10 days, or should I send a
> revert patch?
Hello, Ingo.
I can reproduce your problem and find root cause.
If CONFIG_DEBUG_VIRTUAL is enabled, __pa() checks whether virtual
address is valid or
On Thu, Nov 27, 2014 at 9:09 PM, Dexuan Cui wrote:
In the case the user-space daemon crashes, hangs or is killed, we
need to down the semaphore, otherwise, after the daemon starts next
time, the obsolete data in fcopy_transaction.message or
fcopy_transaction.fcopy_msg will be used immediately.
From: Micky Ching
Add support for sdio card by SD interface. The main change is data
transfer mode, When read data, host wait data transfer while command
start. When write data, host will start data transfer after command get
response. The transfer mode modify can be applied both for SD/MMC card
From: Micky Ching
v2:
rtsx_pci.h:
- remove unused rtsx_pci_write_le32
- add SD_CMD_START
rtsx_pci_sdmmc.c:
- dump_reg_range
- alloc data on stack
- remove forward declaration
- use SD_CMD_START replace magic number 0x40
- move initialize assignment to error handl
From: Micky Ching
Add helper function to write u32 to registers, if we want to put u32
value to 4 continuous register, this can help us reduce tedious work.
Signed-off-by: Micky Ching
---
include/linux/mfd/rtsx_pci.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/linux/mf
Hi Greg,
Today's linux-next merge of the usb tree got a conflict in
drivers/usb/chipidea/core.c between commit 5bc879a6a271 ("usb:
chipidea: drop owner assignment from platform_drivers") from the
driver-core tree and commit 8076932ff2fc ("usb: chipidea: add system
power management support") from t
It incorrectly identifies itself as "IPv4" packet logging.
Signed-off-by: Steven Noonan
---
net/ipv6/netfilter/nf_log_ipv6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/ipv6/netfilter/nf_log_ipv6.c b/net/ipv6/netfilter/nf_log_ipv6.c
index 7b17a0b..41b9ade 100644
--- a
Hi Greg,
Today's linux-next merge of the tty tree got a conflict in
Documentation/devicetree/bindings/serial/pl011.txt between commit
a81a6c654bbe ("ARM: dt: fix up PL011 device tree bindings") from the
devicetree tree and commit 98267d33e2da ("serial: pl011: Add device
tree support for RX DMA pol
This comment does not correspond to the actual code.
When zImage is loaded at a lower *OR* higher address of
the destination of Image, it won't overwrite itself.
Signed-off-by: Masahiro Yamada
---
arch/arm/boot/compressed/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This line converts PHYS_OFFSET into PHYS_PFN_OFFSET.
It is better to use PAGE_SHIFT rather than the magic number 12.
Signed-off-by: Masahiro Yamada
---
arch/arm/kernel/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
inde
On Thu, Nov 27, 2014 at 1:52 AM, Daniel Borkmann wrote:
> On 11/27/2014 06:02 AM, Alexei Starovoitov wrote:
>>
>> classic BPF has a restriction that last insn is always BPF_RET.
>> eBPF doesn't have BPF_RET instruction and this restriction.
>> It has BPF_EXIT insn which can appear anywhere in the
secure_computing() is called first in syscall_trace_enter() so that
a system call will be aborted quickly without doing succeeding syscall
tracing if seccomp rules want to deny that system call.
On compat task, syscall numbers for system calls allowed in seccomp mode 1
are different from those on
SIGSYS is primarily used in secure computing to notify tracer of syscall
events. This patch allows signal handler on compat task to get correct
information with SA_SIGINFO specified when this signal is delivered.
Reviewed-by: Kees Cook
Signed-off-by: AKASHI Takahiro
---
arch/arm64/include/asm/c
This patch allows compat task to issue seccomp() system call.
Reviewed-by: Kees Cook
Signed-off-by: AKASHI Takahiro
---
arch/arm64/include/asm/unistd32.h |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/unistd32.h
b/arch/arm64/include/asm/unistd32
This regeset is intended to be used to get and set a system call number
while tracing.
There was some discussion about possible approaches to do so:
(1) modify x8 register with ptrace(PTRACE_SETREGSET) indirectly,
and update regs->syscallno later on in syscall_trace_enter(), or
(2) define a de
Those values (__NR_seccomp_*) are used solely in secure_computing()
to identify mode 1 system calls. If compat system calls have different
syscall numbers, asm/seccomp.h may override them.
Acked-by: Arnd Bergmann
Reviewed-by: Kees Cook
Signed-off-by: AKASHI Takahiro
---
include/asm-generic/sec
This patch series enables secure computing (system call filtering) on arm64,
and contains related enhancements and bug fixes.
NOTE: This versions contain a workaround against possible BUG_ON() failure
at audit_syscall_exit(), but doesn't contain an extra optimization, as I
submitted for arm,
If tracer modifies a syscall number to -1, this traced system call should
be skipped with a return value specified in x0.
This patch implements this semantics.
Please note:
* syscall entry tracing and syscall exit tracing (ftrace tracepoint and
audit) are always executed, if enabled, even when s
On 11/27/2014 11:10 PM, Will Deacon wrote:
On Thu, Nov 27, 2014 at 05:53:36AM +, AKASHI Takahiro wrote:
On 11/26/2014 09:41 PM, Will Deacon wrote:
On Wed, Nov 26, 2014 at 04:49:46AM +, AKASHI Takahiro wrote:
This regeset is intended to be used to get and set a system call number
while
Classic unix permission checks have an interesting feature. The group
permissions for a file can be set to less than the other permissions
on a file. Occassionally this is used deliberately to give a certain
group of users fewer permissions than the default.
Overlooking negative groups has resu
(2014/11/28 12:36), Ethan Zhao wrote:
> Oracle Sun X86 servers have dynamic power capping capability that works via
> ACPI _PPC method etc, so skip loading this driver if Sun server has ACPI _PPC
> enabled.
>
> Signed-off-by: Ethan Zhao
> Signed-off-by: Dirk Brandewie
> Tested-by: Linda Knippers
Andy Lutomirski writes:
>> This change should break userspace by the minimal amount needed
>> to fix this issue.
>>
>> This should fix CVE-2014-8989.
>
> I think this is both unnecessarily restrictive and that it doesn't fix
> the bug.
You are going to have to work very hard to convince me thi
On Thu, Nov 06, 2014 at 10:16:08PM +, Al Viro wrote:
> On Thu, Nov 06, 2014 at 09:55:31AM +, Jon Maloy wrote:
> > > Point, but that might very well be a pattern to watch for - there's at
> > > least one
> > > more instance in TIPC (also not exploitable, according to TIPC folks) and
> > >
On 11/27/2014 07:50 PM, Andrew Cooper wrote:
On 27/11/14 18:36, Luis R. Rodriguez wrote:
On Thu, Nov 27, 2014 at 07:36:31AM +0100, Juergen Gross wrote:
On 11/26/2014 11:26 PM, Luis R. Rodriguez wrote:
From: "Luis R. Rodriguez"
Some folks had reported that some xen hypercalls take a long time
Commit
853a33ce6932 irqchip: gic-v2m: Add support for ARM GICv2m MSI(-X) doorbell
Introduced a series of warnings when building ARM multi_v7_defconfig:
include/linux/irqchip/arm-gic.h:109:53: warning: its scope is only this
definition or declaration, which is probably not what you want
In
Several drivers now use this API, including the ARM GIC driver, so remove
the outdated comment.
Signed-off-by: Kevin Cernekee
---
Documentation/IRQ-domain.txt | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ-domain.txt
index 8
These controllers support multiple enable/status pairs (64+ IRQs),
can put the enable/status words at different offsets, and do not
support multiple parent IRQs.
Signed-off-by: Kevin Cernekee
---
.../interrupt-controller/brcm,bcm3380-l2-intc.txt | 41
drivers/irqchip/irq-bcm712
From: Dmitry Torokhov
Return value of irq_of_parse_and_map() is unsigned int, with 0
indicating failure, so testing for negative result never works.
Signed-off-by: Dmitry Torokhov
Acked-by: Florian Fainelli
Tested-by: Kevin Cernekee
---
drivers/irqchip/irq-bcm7120-l2.c | 4 ++--
1 file chang
From: Dmitry Torokhov
Return value of irq_of_parse_and_map() is unsigned int, with 0
indicating failure, so testing for negative result never works.
Signed-off-by: Dmitry Torokhov
Acked-by: Florian Fainelli
Tested-by: Kevin Cernekee
---
drivers/irqchip/irq-brcmstb-l2.c | 4 ++--
1 file chang
The BCM7xxx instances of this block (listed in the register manual as
simply "IRQ0") all have the following items in common:
- brcm,int-map-mask: for routing different bits in the L2 to different
parent IRQs
- brcm,int-fwd-mask: for hardwiring certain IRQs to bypass the L2 and
use dedicat
This is the main peripheral IRQ controller on the BCM7xxx MIPS chips;
it has the following characteristics:
- 64 to 160+ level IRQs
- Atomic set/clear registers
- Reasonably predictable register layout (N status words, then N
mask status words, then N mask set words, then N mask clear words)
Some machines only have one bus type to register (e.g. "simple-bus").
Signed-off-by: Kevin Cernekee
---
arch/mips/kernel/prom.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index 452d4350ce42..e303cb1ef2f4 100644
--- a/
If the machine doesn't set its own _machine_restart callback, call the
common do_kernel_restart() instead. This allows arch-independent reset
drivers from drivers/power/reset/ to be used to reboot the machine.
Signed-off-by: Kevin Cernekee
---
arch/mips/kernel/reset.c | 2 ++
1 file changed, 2
Enabling support for more than one BMIPS CPU in the same build may
result in different L1_CACHE_SHIFT values, e.g.
CPU_BMIPS5000 selects MIPS_L1_CACHE_SHIFT_7
CPU_BMIPS4380 selects MIPS_L1_CACHE_SHIFT_6
anything else defaults to MIPS_L1_CACHE_SHIFT_5
Ensure that if more than one MIPS_
BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from
the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer
may cause parts of the DMA buffer to be prefetched into the RAC. To
avoid possible coherency problems, flush the RAC upon DMA completion.
Signed-off-by: Kev
11 platforms require at least one of these workarounds to be enabled; 22
platforms do not. In the latter case we can fall back to a generic version.
Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR.
Suggested-by: Arnd Bergmann
Signed-off-by: Kevin Cernekee
---
arch/mip
bmips_be_defconfig supports Linux running on the following CM and DSL
SoCs:
- BCM3384 (BMIPS5000) cable modem application processor, BE, SMP
- BCM3384 (BMIPS4355) cable modem "spare CPU"*, BE
- BCM6328 (BMIPS4355) ADSL chip, BE
- BCM6368 (BMIPS4350) ADSL chip, BE, SMP
*experimental; most conf
Add a new section covering the Generic BMIPS machine type.
Signed-off-by: Kevin Cernekee
---
Documentation/devicetree/booting-without-of.txt | 28 +
1 file changed, 28 insertions(+)
diff --git a/Documentation/devicetree/booting-without-of.txt
b/Documentation/devicetree/
Most of the supported chips use legacy (non-DT) bootloaders, so they will
need to select an appropriate builtin DTB at compile time until the
bootloader is updated. Provide suitable DTS files, and a means to compile
one of them into the kernel image.
Signed-off-by: Kevin Cernekee
---
arch/mips/
Currently the driver assumes that REG_BASE+0x00 is the IRQ enable mask,
and REG_BASE+0x04 is the IRQ status mask. This is true on BCM3384 and
BCM7xxx, but it is not true for some of the controllers found on BCM63xx
chips. So we will change a couple of key assumptions:
- Don't assume that both t
This patch series REPLACES the following commits in Ralf's
mips-for-linux-next branch:
846deacebfe1 Documentation: DT: Add entries for BCM3384 and its peripherals
d666cd0246f7 MIPS: bcm3384: Initial commit of bcm3384 platform support
a2f6734c5f68 MAINTAINERS: Add entry for BCM33xx cable chips
(if
From: Brian Norris
Wakeable interrupts might be pending at boot/init time, because wakeup
interrupts might have triggered a resume from S5. So don't clear such
wakeups.
This means that any driver which requests a wakeable interrupt bit
should be prepared to handle an interrupt as soon as they ca
On Wednesday 19 November 2014 10:19 AM, Sanchayan Maity wrote:
> On Wednesday 19 November 2014 06:47 AM, Shawn Guo wrote:
>> On Thu, Nov 13, 2014 at 11:03:09AM +0530, Sanchayan Maity wrote:
>>> On Wednesday 12 November 2014 04:17 PM, Shawn Guo wrote:
On Wed, Nov 12, 2014 at 02:26:51PM +0530, S
From: Ching Huang
This patch is relative to
http://git.infradead.org/users/hch/scsi-queue.git/tree/refs/heads/drivers-for-3.18:/drivers/scsi/arcmsr
Setting command status with 'DRIVER_SENSE' except 'CHECK_CONDITION' if we have
sense data.
Signed-off-by: Ching Huang
---
diff -uprN a/drivers/
security_ops is not used in this file.
Signed-off-by: Yao Dongdong
---
security/selinux/hooks.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index c603b20..6da7532 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@
On Fri, Oct 24, 2014 at 1:28 PM, Joonsoo Kim wrote:
> On Thu, Oct 16, 2014 at 11:35:51AM +0800, Hui Zhu wrote:
>> If page alloc function __rmqueue try to get pages from MIGRATE_MOVABLE and
>> conditions (cma_alloc_counter, cma_aggressive_free_min, cma_alloc_counter)
>> allow, MIGRATE_CMA will be a
Hi Kukjin,
On Wed, Nov 26, 2014 at 6:59 PM, Alim Akhtar wrote:
> Hi Vivek,
>
> On Mon, Nov 24, 2014 at 6:36 PM, Vivek Gautam
> wrote:
>> BUS1 pinctrl provides gpios for usb and power regulator
>> available on exynos7-espresso board. So add relevant device
>> node for pinctrl-bus1.
>>
>> Signed
Hi Linus,
On Fri, Nov 28, 2014 at 9:05 AM, Vivek Gautam wrote:
> Hi Alim,
>
>
> On Wed, Nov 26, 2014 at 7:03 PM, Alim Akhtar wrote:
>> Hi Vivek,
>>
>> On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam
>> wrote:
>>> USB and Power regulator on Exynos7 require gpios available
>>> in BUS1 pin control
To force loading on Oracle Sun X86 servers, provide one kernel command line
parameter
intel_pstate = ora_force
For those who be aware of the risk of no power capping capabily working and
try to get better performance with this driver.
Signed-off-by: Ethan Zhao
---
v2: change to hardware vend
To force loading on Oracle Sun X86 servers, provide one kernel command line
parameter
intel_pstate = ora_force
For those who be aware of the risk of no power capping capabily working and
try to get better performance with this driver.
Signed-off-by: Ethan Zhao
---
v2: change to hardware vend
Oracle Sun X86 servers have dynamic power capping capability that works via
ACPI _PPC method etc, so skip loading this driver if Sun server has ACPI _PPC
enabled.
Signed-off-by: Ethan Zhao
Signed-off-by: Dirk Brandewie
Tested-by: Linda Knippers
---
v2: fix break HP Proliant issue.
v3: expan
Oracle Sun servers(X86) have power capping features that work via ACPI _PPC
method,
patch No.1 is used to skip this driver if Oracle Sun server and _PPC detected.
Patch No.2 introduces a kernel command line parameter for those who would like
to enable intel_pstate on Sun X86 servers and be aware o
Hi Alim,
On Wed, Nov 26, 2014 at 7:03 PM, Alim Akhtar wrote:
> Hi Vivek,
>
> On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam
> wrote:
>> USB and Power regulator on Exynos7 require gpios available
>> in BUS1 pin controller block.
>> So adding the BUS1 pinctrl support.
>>
>> Signed-off-by: Naveen
To force loading on Oracle Sun X86 servers, provide one kernel command line
parameter
intel_pstate = ora_force
For those who be aware of the risk of no power capping capabily working and
try to get better performance with this driver.
Signed-off-by: Ethan Zhao
---
v2: change to hardware vend
Oracle Sun X86 servers have dynamic power capping capability that works via
ACPI _PPC method etc, so skip loading this driver if Sun server has ACPI _PPC
enabled.
Signed-off-by: Ethan Zhao
Signed-off-by: Dirk Brandewie
Tested-by: Linda Knippers
---
v2: fix break HP Proliant issue.
v3: expan
Oracle Sun servers(X86) have power capping features that work via ACPI _PPC
method,
patch No.1 is used to skip this driver if Oracle Sun server and _PPC detected.
Patch No.2 introduces a kernel command line parameter for those who would like
to enable intel_pstate on Sun X86 servers and be aware o
To force loading on Oracle Sun X86 servers, provide one kernel command line
parameter
intel_pstate = ora_force
For those who be aware of the risk of no power capping capabily working and
try to get better performance with this driver.
Signed-off-by: Ethan Zhao
---
v2: change to hardware vend
Dear Marc and Liviu,
On Thu, 27 Nov 2014 10:39:28 -0800
Marc Zyngier wrote:
> On 27/11/14 16:21, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide a level not edge interrupt
> > output. Fix the device trees to
(2014/11/27 23:36), Jon Medhurst (Tixy) wrote:
> On Fri, 2014-11-21 at 14:35 +0800, Wang Nan wrote:
>> This patch introduce kprobeopt for ARM 32.
>
> If I've understood things correctly, this is a feature which inserts
> probes by using a branch instruction to some trampoline code rather than
> us
Some time, the policy's max_freq and min_freq will change, so
the avail freqs is not from the cpuinfo_min to cpuinfo_max.
Just add the check for the freq_table.
Signed-off-by: Wang Weidong
---
drivers/cpufreq/freq_table.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/dri
Hi Rafael and Viresh
Sorry to trouble you again. As for:
"acpi-cpufreq: get the cur_freq from acpi_processor_performance states"
I do it again, and add the other patch.
patch #1: acpi-cpufreq: make the freq_table store the same freq value
I think it can work. The set of available states which co
As the initialized freq_tables maybe different from the p-states
values, so the array index is different as well.
Although in this case:
p-states value: [2400 2400 2000 ...], while the freq_tables:
[2400 2000 ... CPUFREQ_TABLE_END]. After setted the freqs 2000,
the perf->state is 3 while the freqs
On 2014/11/28 3:32, Borislav Petkov wrote:
> On Wed, Nov 26, 2014 at 03:20:08PM -0800, tip-bot for Jiang Liu wrote:
>> Commit-ID: fda7c08b1349cc4c65f8a5240b10f7e9938604b8
>> Gitweb:
>> http://git.kernel.org/tip/fda7c08b1349cc4c65f8a5240b10f7e9938604b8
>> Author: Jiang Liu
>> AuthorDate:
On 27 November 2014 at 19:38, Eduardo Valentin wrote:
>> Acked-by: Viresh Kumar
>
> Ok.
>
> though.. "normal practice" says ack's are oftern used by the maintainer
> of the affected code (quoting Documentation/SubmittingPatches) :-)
Hehe :)
Another paragraph from the same file:
Acked-by: does
As hix5hd2 and hip01 has the same .smp_prepare_cpus
in struct smp_operations, so rename hix5hd2_smp_prepare_cpus
to hisi_common_smp_prepare_cpus.
the hip01 will use hisi_common_smp_prepare_cpus in its
struct smp_operations.
Signed-off-by: Wang Long
---
arch/arm/mach-hisi/platsmp.c | 4 ++--
1 f
Make hip01 share the hisi_defconfig.
And add it into multi_v7_defconfig too.
Signed-off-by: Wang Long
---
arch/arm/configs/hisi_defconfig | 1 +
arch/arm/configs/multi_v7_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/configs/hisi_defconfig b/arch/arm/configs/hisi_d
This series patch enable Hisilicon HiP01 SoC. The HiP01 SoC series
chip is designed for networking product, it integrates a rich peripheral
interfaces to support network applications and supports both one
core or dual cores and quad cores. The core is Cortex A9.
Wang Long (7):
ARM: debug: add
(2014/11/27 19:52), Petr Mladek wrote:
> On Thu 2014-11-27 19:06:37, Masami Hiramatsu wrote:
>> (2014/11/27 0:27), Josh Poimboeuf wrote:
>>> On Wed, Nov 26, 2014 at 10:18:24AM +0100, Jiri Kosina wrote:
On Wed, 26 Nov 2014, Masami Hiramatsu wrote:
>> Note to Steve:
>> Masami's IPMO
As hix5hd2 and hip01 has the same secondary_startup
so rename hix5hd2_secondary_startup to
to hisi_secondary_startup.
the hip01 will use hisi_secondary_startup for the
secondary core boot.
Signed-off-by: Wang Long
---
arch/arm/mach-hisi/core.h| 2 +-
arch/arm/mach-hisi/headsmp.S | 2 +-
arc
enable smp for HiP01 board.
Signed-off-by: Wang Long
---
arch/arm/boot/dts/hip01-ca9x2.dts | 1 +
arch/arm/mach-hisi/core.h | 3 +++
arch/arm/mach-hisi/hotplug.c | 31
arch/arm/mach-hisi/platsmp.c | 50 +++
4 files
Add dts file for Hisilicon hip01 ca9x2 board
Signed-off-by: Wang Long
---
.../bindings/arm/hisilicon/hisilicon.txt | 25 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/hip01-ca9x2.dts | 51 ++
arch/arm/boot/dts/hip01.dtsi
Enable Hisilicon HiP01 SoC. This HiP01 SoC series support both
one core or dual cores and quad cores. The core is Cortex A9.
Signed-off-by: Wang Long
---
arch/arm/mach-hisi/Kconfig | 8
arch/arm/mach-hisi/hisilicon.c | 10 ++
2 files changed, 18 insertions(+)
diff --git a/
Add the support of Hisilicon HiP01 debug uart.
The uart of hip01 is 8250 compatible.
Signed-off-by: Wang Long
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index d8f6a2e..ab65e58 100644
--- a/arch/arm/Kc
On Thu, 2014-10-23 at 16:07 +1100, Michael Ellerman wrote:
> kcmp.h appears to be part of the API, it's documented in kcmp(2), and
> the selftests/kcmp code uses it. So move it to uapi so it's actually
> exported.
Looks like this series fell through the cracks?
It still applies on rc6. Should I r
The driver calls spin_lock_irqsave during DTS interrupt. The interrupt
handle then calls thermal_zone_device_update which implicitly calls
a sleep function and produce the following bug:
BUG: sleeping function called from invalid context at kernel/locking/mutex.c:97
in_atomic(): 1, irqs_disabled()
On 11/27/2014 11:23 PM, Dan Carpenter wrote:
>> +static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32
>> val)
>> >+{
>> >+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24);
>> >+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);
>> >+ rtsx_pc
Hi,
Ok. I will update the title.
Thanks for the feedbacks and Ack.
Regards,
-Maurice
-Original Message-
From: Srinivas Pandruvada [mailto:srinivas.pandruv...@linux.intel.com]
Sent: Wednesday, November 26, 2014 1:57 AM
To: Eduardo Valentin
Cc: Petallo, MauriceX R; Zhang, Rui; linux...@vge
Hi Michal,
Today's linux-next merge of the kbuild tree got a conflict in
scripts/Kbuild.include between commit 9fb5e5372208 ("dts, kbuild:
Factor out dtbs install rules to Makefile.dtbinst") from the arm-soc
tree and commit 371fdc77af44 ("kbuild: collect shorthands into
scripts/Kbuild.include") fr
On 11/27/2014 11:43 PM, Dan Carpenter wrote:
>> +int stat_idx = sd_status_index(rsp_type);
> I have always hated this terrible pointer math. 5 is relative to
> pcr->host_cmds_ptr + 1. It's a mess...
5 mean CRC7 offset of Response R1, see SD spec V3.01 Page 82.
4.9.1 R1 (normal response comma
On Thu, 2014-11-27 at 13:46 +0200, Mika Westerberg wrote:
> On Wed, Nov 26, 2014 at 06:31:38PM +0800, Ken Xue wrote:
> > On Monday, 2014-11-24 at 02:47 +0100, Rafael J. Wysocki wrote:
> > > On Monday, November 24, 2014 01:02:30 AM Xue, Ken wrote:
> > > >
> > > > On Tuesday, November 18, 2014 01:58
Hi Pankaj,
On 11/27/2014 08:48 PM, Pankaj Dubey wrote:
> Hi Chanwoo,
>
> On Thursday 27 November 2014 01:05 PM, Chanwoo Choi wrote:
>> This patch adds the support for CMU (Clock Management Units) of Exynos5433
>> which is 64bit SoC and has Octa-cores. This patch supports necessary clocks
>> for k
Hi Soren,
-Original Message-
From: Sören Brinkmann [mailto:soren.brinkm...@xilinx.com]
Sent: Thursday, November 27, 2014 11:54 PM
To: Appana Durga Kedareswara Rao
Cc: w...@grandegger.com; m...@pengutronix.de; Michal Simek;
grant.lik...@linaro.org; robh...@kernel.org; devicet...@vger.kerne
Hi Michal,
-Original Message-
From: Michal Simek [mailto:michal.si...@xilinx.com]
Sent: Thursday, November 27, 2014 8:17 PM
To: Appana Durga Kedareswara Rao; w...@grandegger.com; m...@pengutronix.de;
Michal Simek; Soren Brinkmann; grant.lik...@linaro.org; robh...@kernel.org
Cc: linux-...@
Add documentation for the devicetree binding for the Zynq pincontroller.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since v1:
- fix typo
- add USB related documentation
- remove 'pinctrl-' prefix for pinctrl sub-nodes
- update documentation to enforce strict separat
This adds a pin-control driver for Zynq.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since v1:
- fix EMIO_SD1_CD pin name
- add USB to pinmux options
changes since RFCv2:
- let Zynq select PINCTRL_ZYNQ. Boot hangs when pinctrl information is
present in DT but no d
lsscsi is a command line utility that probes sysfs in Linux
2.6 and 3 series kernels in order to list information about
SCSI devices and SCSI hosts. The default format is one device
(e.g. disk) per line. Other storage devices that use the SCSI
subsystem such as SATA and USB keys are also listed.
Select pinctrl and the Zynq pinctrl driver.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since RFC v2:
- separate mach-zynq changes in their own patch
---
arch/arm/mach-zynq/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/
Add pinctrl descriptions to the zc702 and zc706 device trees.
Signed-off-by: Soren Brinkmann
Tested-by: Andreas Färber
---
Changes since v1:
- remove 'pinctrl-' prefix for pinctrl sub-nodes
- separate config and mux nodes
Changes since RFC v2:
- add pinconf properties to zc702 mdio node
- r
Additionally to the generic DT parameters, allow drivers to provide
driver-specific DT parameters to be used with the generic parser
infrastructure.
To achieve this 'struct pinctrl_desc' is extended to pass custom pinconf
option to the core. In order to pass this kind of information, the
related d
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