be ok
not sure if -ERESTARTSYS also should be returned as -EBUSY ?
Patch was only compild tested with x86_64_defcofnig +
CONFIG_P54_COMMON=m, CONFIG_P54_PCI=m
Patch is against 3.19.0-rc5 -next-20150119
drivers/net/wireless/p54/fwio.c |9 ++---
1 file changed, 6 insertions(+), 3 deletions
Dear Myungjoo,
On 01/20/2015 01:34 PM, MyungJoo Ham wrote:
>>
>> This patch add new devfreq_event class for devfreq_event device which
>> provide
>> raw data (e.g., memory bus utilization/GPU utilization). This raw data from
>> devfreq_event data would be used for the governor of devfreq
Hi ,
I have converted the perf.data file into CTF format .
I have imported the CTF traces into eclipse as generic CTF traces and
I am seeing the control flow, resource flow etc. in LTTng kernel
perspective . I am not seeing anything in perf profile view ( Show
view -> profiling -> perf profile
On 01/20/2015 01:46 PM, MyungJoo Ham wrote:
>>
>> This patch add the resource-managed function for devfreq-event device as
>> following functions. The devm_devfreq_event_add_edev() manages automatically
>> the memory of devfreq-event device using resource management.
>> -
>
> This patch add the resource-managed function for devfreq-event device as
> following functions. The devm_devfreq_event_add_edev() manages automatically
> the memory of devfreq-event device using resource management.
> - devm_devfreq_event_add_edev()
> - devm_devfreq_event_remove_edev()
>
>
> This patch add new devfreq_event class for devfreq_event device which provide
> raw data (e.g., memory bus utilization/GPU utilization). This raw data from
> devfreq_event data would be used for the governor of devfreq subsystem.
> - devfreq_event device : Provide raw data for governor of
Dear RT Folks,
I'm pleased to announce the 3.4.105-rt129 stable release.
This release is just an update to the new stable 3.4.105 version
and no RT specific changes have been made.
You can get this release via the git tree at:
Dear RT Folks,
I'm pleased to announce the 3.12.36-rt50 stable release.
This release is just an update to the new stable 3.12.36 version
and no RT specific changes have been made.
You can get this release via the git tree at:
Dear RT Folks,
I'm pleased to announce the 3.10.65-rt69 stable release.
This release is just an update to the new stable 3.10.65 version
and no RT specific changes have been made.
You can get this release via the git tree at:
Dear RT Folks,
I'm pleased to announce the 3.14.29-rt26 stable release.
This release is just an update to the new stable 3.14.29 version
and no RT specific changes have been made.
You can get this release via the git tree at:
On Mon, 19 Jan 2015, Paul Gortmaker wrote:
> The Kconfig text says it all, with "The EISA bus saw limited use
> between 1988 and 1995 when it was made obsolete by the PCI bus."
>
> That means typically 486/586 CPUs in the 33-166MHz range, and
> 8-64MB of installed RAM in typical EISA machines of
On Tue, Jan 20, 2015 at 04:54:44AM +0100, Stephan Mueller wrote:
>
> How would the fail manifest itself? If algif_aead would be present, user
> space could use the __driver implementation regardless of a setkey or
> authsize callback by simply calling encrypt/decrypt. Would the error be
>
Hi Paul,
Today's linux-next merge of the audit tree got a conflict in
include/linux/audit.h between commit 041d7b98ffe5 ("audit: restore
AUDIT_LOGINUID unset ABI") from Linus' tree and commit e80da768eae4
("audit: remove vestiges of vers_ops") from the audit tree.
I fixed it up (see below) and
Hi Paul,
Today's linux-next merge of the audit tree got a conflict in fs/exec.c
between commit 51f39a1f0cea ("syscalls: implement execveat() system
call") from Linus' tree and commit 5dc5218840e1 ("fs: create proper
filename objects using getname_kernel()") from the audit tree.
I fixed it up
Hi Paul,
Today's linux-next merge of the audit tree got a conflict in
kernel/auditsc.c between commit 4a92843601ad ("audit: correctly record
file names with different path name types") and fcf22d8267ad ("audit:
create private file name copies when auditing inodes") from Linus' tree
and commits
Wincy Van wrote on 2015-01-20:
> Hi, Yang,
>
> Could you please have a look at this patch set?
> Your comment is very appreciated!
Sure. I will take a look.
>
>
> Thanks,
>
> Wincy
Best regards,
Yang
On Mon, Jan 19, 2015 at 6:58 PM, Masami Hiramatsu
wrote:
>>
>> it's done already... one can do the same skb->dev->name logic
>> in kprobe attached program... so from bpf program point of view,
>> tracepoints and kprobes feature-wise are exactly the same.
>> Only input is different.
>
> No, I
Am Dienstag, 20. Januar 2015, 14:37:05 schrieb Herbert Xu:
Hi Herbert,
>On Tue, Jan 20, 2015 at 04:35:41AM +0100, Stephan Mueller wrote:
>> This in turn would then turn the __driver implementation into a full
>> GCM implementation. That would mean that we should rename it from
>> __driver into
Hi, Yang,
Could you please have a look at this patch set?
Your comment is very appreciated!
Thanks,
Wincy
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On Mon, Jan 19, 2015 at 12:13:39AM +0100, Stephan Mueller wrote:
> As documented in Documentation/kernel-doc-nano-HOWTO.txt lines
> terminated with a colon are treated as headings.
>
> The current layout of the documentation when compiling the kernel
> crypto API DocBook documentation is messed
On Fri, Jan 16, 2015 at 09:16:00AM +0200, Michael S. Tsirkin wrote:
> On Fri, Jan 16, 2015 at 10:21:09AM +1100, Herbert Xu wrote:
> > On Thu, Jan 15, 2015 at 01:50:42PM +0200, Michael S. Tsirkin wrote:
> > > makes code look a bit prettier.
> > >
> > > Signed-off-by: Michael S. Tsirkin
> >
> >
On Wed, Jan 14, 2015 at 11:31:47AM +, Will Deacon wrote:
> Hi Oleg,
>
> On Tue, Jan 13, 2015 at 06:45:10PM +, Oleg Nesterov wrote:
> > On 01/13, Will Deacon wrote:
> > >
> > > 1. Does smp_mb__before_spinlock actually have to order prior loads
> > > against later loads and stores?
On Tue, Jan 20, 2015 at 04:35:41AM +0100, Stephan Mueller wrote:
>
> This in turn would then turn the __driver implementation into a full GCM
> implementation. That would mean that we should rename it from __driver
> into gcm(aes) / gcm-aesni.
No you shouldn't because it'll fail in interrupt
Am Dienstag, 20. Januar 2015, 14:17:04 schrieb Herbert Xu:
Hi Herbert,
>On Sun, Jan 18, 2015 at 11:56:03PM +0100, Stephan Mueller wrote:
>> The cipher registered as __driver-gcm-aes-aesni is never intended
>> to be used directly by any caller. Instead it is a service mechanism
>> to
On 2015/1/15 20:52, Kalle Valo wrote:
> Arend van Spriel writes:
>
>> On 01/12/15 07:41, Fu, Zhonghui wrote:
>>> From 8685c3c2746b4275fc808d9db23c364b2f54b52a Mon Sep 17 00:00:00 2001
>>> From: Zhonghui Fu
>>> Date: Mon, 12 Jan 2015 14:25:46 +0800
>>> Subject: [PATCH] brcmfmac: avoid duplicated
On Tue, Jan 20, 2015 at 11:17:01AM +0800, Zhang Zhen wrote:
> On 2015/1/19 19:09, Paul E. McKenney wrote:
> > On Mon, Jan 19, 2015 at 05:04:29PM +0800, Zhang Zhen wrote:
> >> On 2015/1/19 16:42, Paul E. McKenney wrote:
> >>> On Mon, Jan 19, 2015 at 04:07:15PM +0800, Zhang Zhen wrote:
> Hi,
>
>From 04d3fa673897ca4ccbea6c76836d0092dba2484a Mon Sep 17 00:00:00 2001
From: Zhonghui Fu
Date: Tue, 20 Jan 2015 11:14:13 +0800
Subject: [PATCH] brcmfmac: avoid duplicated suspend/resume operation
WiFi chip has 2 SDIO functions, and PM core will trigger
twice suspend/resume operations for one
David Miller [mailto:da...@davemloft.net]
> Sent: Tuesday, January 20, 2015 10:52 AM
[...]
> agg->list is not local, you have to use a spinlock to protect
> modifications to it, some other sites which modify agg->list do take
> the lock properly.
>
> You cannot modify a list like agg->list
On 2015/1/19 19:01, Michal Hocko wrote:
> On Mon 19-01-15 10:46:56, Michal Hocko wrote:
> [...]
>>> testcase 2: mmap without MAP_LOCKED flag and the call mlock (memsize = 8192)
>>>
>>> 185 p = mmap(NULL, memsize, PROT_WRITE | PROT_READ,
>>> 186 MAP_PRIVATE
Prepare for support hierarchy irqdomain by changing function prototypes,
should be no function changes.
Signed-off-by: Jiang Liu
Acked-by: Joerg Roedel
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Greg Kroah-Hartman
Cc: io...@lists.linux-foundation.org
Cc: Bjorn Helgaas
Cc: Benjamin
Enhance HPET code to support hierarchy irqdomain, it helps to make
the architecture more clear.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Cc:
Am Dienstag, 20. Januar 2015, 14:00:17 schrieb Herbert Xu:
Hi Herbert,
>On Fri, Jan 09, 2015 at 04:30:45AM +0100, Stephan Mueller wrote:
>> Am Donnerstag, 8. Januar 2015, 22:09:31 schrieb Herbert Xu:
>>
>> Hi Herbert,
>>
>> > On Wed, Jan 07, 2015 at 04:51:38PM +0100, Stephan Mueller wrote:
>>
The Kconfig text says it all, with "The EISA bus saw limited use
between 1988 and 1995 when it was made obsolete by the PCI bus."
That means typically 486/586 CPUs in the 33-166MHz range, and
8-64MB of installed RAM in typical EISA machines of that era.
With the additional cost, they were also
When we deleted MCA bus support close to three years ago, Linus ack'd
it and said "Maybe we could some day remove EISA support too.." [1]
For the older arch who are frozen in time (from a hardware perspective)
they might not be ready/willing to drop EISA support yet. However that
does not mean
There was one instance of a VLB card which would emulate
an EISA ID response ID when primed with a certain I/O
handshake.
Since (a) VLB was largely confined to 486 vintage motherboards
from the early/mid 1990s and (b) there was only one card that
needed this and (c) we are dropping EISA support
On 2015/1/19 19:09, Paul E. McKenney wrote:
> On Mon, Jan 19, 2015 at 05:04:29PM +0800, Zhang Zhen wrote:
>> On 2015/1/19 16:42, Paul E. McKenney wrote:
>>> On Mon, Jan 19, 2015 at 04:07:15PM +0800, Zhang Zhen wrote:
Hi,
On my x86_64 qemu virtual machine, RCU CPU stall console spews
This routine has been around for over a decade, but with EISA
being dead and abandoned for about twice that long, the name can
be kind of confusing. The function is going at the PIC Edge/Level
Configuration Registers (ELCR), so rename it as such and mentally
decouple it from the long since dead
Hi Ulf,
Today's linux-next merge of the mmc-uh tree got a conflict in
drivers/mmc/host/sunxi-mmc.c between commit 6c09bb851e57 ("mmc: sunxi:
Convert MMC driver to the standard clock phase API") from the sunxi
tree and commit 776e24c502da ("mmc: sunxi: Removing unused code") from
the mmc-uh tree.
Use hierarchy irqdomain to manage Hypertransport interrupts.
We have slightly changed the architecture interfaces to support htirq
PCI driver, it should be safe because currently Hypertransport interrupt
is only enabled on x86 platforms.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc:
Now MSI interrupt has been converted to new hierarchy irqdomain
interfaces, so kill legacy MSI related code.
Signed-off-by: Jiang Liu
Acked-by: Joerg Roedel
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Greg Kroah-Hartman
Cc: io...@lists.linux-foundation.org
Cc: Bjorn Helgaas
Cc: Benjamin
On Sun, Jan 18, 2015 at 11:56:03PM +0100, Stephan Mueller wrote:
> The cipher registered as __driver-gcm-aes-aesni is never intended
> to be used directly by any caller. Instead it is a service mechanism to
> rfc4106-gcm-aesni.
>
> The kernel crypto API unconditionally calls the registered setkey
To support legacy ISA IRQs, we need to preallocate irq_cfg structures
for legacy ISA IRQs. Refine the way to allocate irq_cfg for legacy ISA
IRQs, so it's more friend to hierarchy irqdomain implementation.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc:
Convert IOAPIC driver to support and use hierarchy irqdomain interfaces.
It's a little big, but it always break bisectings if we split it into
multiple patches.
Fold in a patch from Andy Shevchenko
to make it bisectable.
http://lkml.org/lkml/2014/12/10/622
Signed-off-by: Jiang Liu
Cc: Andy
On Mon, 2015-01-19 at 09:35 -0700, Shuah Khan wrote:
> On 01/18/2015 05:35 PM, Michael Ellerman wrote:
> > On Fri, 2015-01-16 at 10:46 -0700, Shuah Khan wrote:
> >> On 01/09/2015 02:06 AM, Michael Ellerman wrote:
> >>> This adds make install support to selftests. The basic usage is:
> >>>
> >>> $
Introduce several helper functions, which will be used to enable
hierarchy irqdomain for IOAPIC.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Implement required callbacks to prepare for enabling hierarchy irqdomain
on IOAPICs. Later we will clean up IOAPIC code a lot by using hierarchy
irqdomain framework.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Simplify the way to print IOAPIC entry content, so we could kill
native_io_apic_print_entries(), intel_ir_io_apic_print_entries()
and x86_io_apic_ops.print_entries() later.
Folded a patch from Thomas to fix errors in printed pin attributes,
From: Rickard Strandqvist
Remove the function is_apbt_capable() that is not used anywhere.
This was partially found by using a static code analysis program called
cppcheck.
Signed-off-by: Rickard Strandqvist
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apb_timer.c |8
1 file
Now there's no user of pre_init_apic_IRQ0(), so kill it.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Cc: Yinghai Lu
Cc: Borislav Petkov
Cc:
Introduce helper functions to manipulate struct irq_alloc_info for IOAPIC.
Also add extra parameter to IOAPIC interfaces to prepare for hierarchy
irqdomain. Function mp_set_gsi_attr() will be killed once we have
switched to hierarchy irqdomain.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Use common MSI interfaces to simplify DMAR/HPET driver implementation.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Cc: Yinghai Lu
Cc: Borislav
Now there's no user of irq_remapping_print_chip(), so kill it.
Signed-off-by: Jiang Liu
---
arch/x86/include/asm/irq_remapping.h |2 --
drivers/iommu/irq_remapping.c| 13 -
2 files changed, 15 deletions(-)
diff --git a/arch/x86/include/asm/irq_remapping.h
From: Thomas Gleixner
MID has no PIC, but depending on the platform it requires the
abt_timer, which is connected to irq0. The timer is set up at
late_time_init().
But, looking at the MID code it seems, that there is no reason to do
so. The only code which might need the timer working is the
Correctly indent code in function sfi_parse_mtmr().
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: H. Peter Anvin
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Cc: Yinghai Lu
Cc:
Some irq_chip names use underscore, others use hyphen. So normalize them
to use hythen as separator.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Simplify the way to deal with remapped MSI interrupts, so we could
kill irq_chip.irq_print_chip later.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy
Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips, they
will be used to share common code later.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc:
Function irq_chip_compose_msi_msg() can achieve the same goal as
msi_update_msg(), so kill msi_update_msg().
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc:
On 2015/1/19 22:06, Don Zickus wrote:
> On Mon, Jan 19, 2015 at 05:04:29PM +0800, Zhang Zhen wrote:
>>>
>>> Did you really intend to acquire the same spinlock twice in a row,
>>> forcing a self-deadlock? If not, I of course suggest changing the second
>>> "spin_lock()" to "spin_unlock()".
>>>
>>
Enhance UV code to support hierarchy irqdomain, it helps to make
the architecture more clear.
We should construct hwirq based on mmr_blade and mmr_offset, but
mmr_offset is type of unsigned long, it may exceed the range of
irq_hw_number_t. So help about the way to construct hwirq based
on
Refine the interfaces to create IRQ for DMAR unit. It's a preparation
for converting DMAR IRQ to hierarchy irqdomain on x86.
It also moves dmar_alloc_hwirq()/dmar_free_hwirq() from irq_remapping.h
to dmar.h. They are not irq_remapping specific.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Enhance DMAR code to support hierarchy irqdomain, it helps to make
the architecture more clear.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy Dunlap
Cc:
Now MSI interrupt has been converted to new hierarchy irqdomain
interfaces, so kill legacy MSI related code and interfaces.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Greg Kroah-Hartman
Cc: io...@lists.linux-foundation.org
Cc: Bjorn Helgaas
Cc: Benjamin
Now MSI interrupt has been converted to new hierarchy irqdomain
interfaces, so kill legacy MSI related code and interfaces.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J.
Now MSI interrupt has been converted to new hierarchy irqdomain
interfaces, so kill legacy MSI related code.
Signed-off-by: Jiang Liu
Acked-by: Joerg Roedel
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Greg Kroah-Hartman
Cc: io...@lists.linux-foundation.org
Cc: Bjorn Helgaas
Cc: Benjamin
DMAR interrupt won't be remapped by interrupt remapping hardware,
so directly call native_compose_msi_msg() for DMAR IRQ to compose MSI
message data. This will help to simplify MSI code later.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg
Enhance MSI code to support hierarchy irqdomain, it helps to make
the architecture more clear.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Greg Kroah-Hartman
Cc: io...@lists.linux-foundation.org
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc:
Enhance Intel interrupt remapping driver to support hierarchy irqdomain,
it will simplify the code eventually. It also implements intel_ir_chip
to support stacked irq_chip.
Signed-off-by: Jiang Liu
Acked-by: Joerg Roedel
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Greg Kroah-Hartman
Cc:
Enhance AMD interrupt remapping driver to support hierarchy irqdomain,
it will simplify the code eventually.
Signed-off-by: Jiang Liu
Acked-by: Joerg Roedel
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Greg Kroah-Hartman
Cc: io...@lists.linux-foundation.org
Cc: Bjorn Helgaas
Cc: Benjamin
On Mon, 2015-01-19 at 09:39 -0700, Shuah Khan wrote:
> On 01/18/2015 05:35 PM, Michael Ellerman wrote:
> > On Fri, 2015-01-16 at 10:53 -0700, Shuah Khan wrote:
> >> On 01/09/2015 02:06 AM, Michael Ellerman wrote:
> >>> This adds a Make include file which most selftests can then include to
> >>>
Use new irqdomain interfaces to allocate/free IRQ for HTIRQ, so we could
kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.
This patch changes the interfaces between arch independent PCI driver
and arch specific code. Currently HT_IRQ is only enabled on x86, so it
shouldn't break other architectures.
Use new irqdomain interfaces to allocate/free IRQ for DMAR and interrupt
remapping, so we could kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.
The private definition of irq_alloc_hwirqs()/irq_free_hwirqs() are
temporary solution, it will be removed once we have converted interrupt
remapping driver to
Introduce new interfaces for interrupt remapping drivers to support
hierarchy irqdomain:
1) irq_remapping_get_ir_irq_domain(): get irqdomain associated with an
interrupt remapping unit. IOAPIC/HPET drivers use this interface to
get parent interrupt remapping irqdomain.
2)
Use new irqdomain interfaces to allocate/free IRQ, so we could
kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cc: Randy
Use new irqdomain interfaces to allocate/free IRQ for PCI MSI, so we
could kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Cache destination CPU APIC ID into struct irq_cfg when assigning vector
for interrupt. Upper layer just needs to read the cached APIC ID instead
of calling apic->cpu_mask_to_apicid_and(), it helps to hide APIC driver
details from IOAPIC/HPET/MSI drivers..
Signed-off-by: Jiang Liu
Cc: Konrad
On 2015年01月19日 19:50, Catalin Marinas wrote:
On Wed, Jan 14, 2015 at 03:04:55PM +, Hanjun Guo wrote:
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
[...]
@@ -64,8 +88,13 @@ void __init acpi_boot_table_init(void)
return;
/* Initialize the ACPI
Abstract CPU local APIC as an interrupt controller and create an
irqdomain for it to manage CPU interrupt vectors. It's the base to
enable hierarchy irqdomain on x86 systems. Eventually we will build
a irqdomain hierarchy as below:
IOAPIC domain---|
MSI/MSI-x domain--> [Inerrupt Remapping
Use new irqdomain interfaces to allocate/free IRQ for HPET, so we could
kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.
Signed-off-by: Jiang Liu
Cc: Konrad Rzeszutek Wilk
Cc: Tony Luck
Cc: Joerg Roedel
Cc: Greg Kroah-Hartman
Cc: Bjorn Helgaas
Cc: Benjamin Herrenschmidt
Cc: Rafael J. Wysocki
Hi all,
The generic hierarchy irqdomain and stacked irqchip implementation
has been merged into v3.19, so this patch set converts x86 interupt
management to hierarchy irqdomain and stacked irqchip. I will send out
another following-on patch set to clean up code and interfaces obseleted
by
On 2015/1/12 19:24, Masami Hiramatsu wrote:
> (2015/01/05 21:31), Wang Nan wrote:
>> In original code, the probed instruction doesn't get optimized after
>>
>> echo 0 > /sys/kernel/debug/kprobes/enabled
>> echo 1 > /sys/kernel/debug/kprobes/enabled
>>
>> This is because original code checks
The kobject memory shouldn't have been freed before the kobject
is released because driver core can access it freely before its
release.
This patch frees hctx in its release callback. For ctx, they
share one single per-cpu variable which is associated with
the request queue, so free ctx in
On Fri, Jan 09, 2015 at 04:30:45AM +0100, Stephan Mueller wrote:
> Am Donnerstag, 8. Januar 2015, 22:09:31 schrieb Herbert Xu:
>
> Hi Herbert,
>
> > On Wed, Jan 07, 2015 at 04:51:38PM +0100, Stephan Mueller wrote:
> > > + if (!aead_writable(sk)) {
> > > + /*
> > > +
(2015/01/20 5:48), Alexei Starovoitov wrote:
> On Mon, Jan 19, 2015 at 1:52 AM, Masami Hiramatsu
> wrote:
>> If we can write the script as
>>
>> int bpf_prog4(s64 write_size)
>> {
>>...
>> }
>>
>> This will be much easier to play with.
>
> yes. that's the intent for user space to do.
>
>>>
debugfs/kprobes/enabled doesn't work correctly on optimized kprobes.
Masami Hiramatsu has a test report on x86_64 platform:
https://lkml.org/lkml/2015/1/19/274
This patch forces it to unoptimize kprobe if kprobes_all_disarmed
is set. It also checks the flag in unregistering path for skipping
From: Hayes Wang
Date: Tue, 20 Jan 2015 02:48:50 +
>> >> + urb->actual_length = 0;
>> >> + list_add_tail(>list, next);
>> >
>> > Do you need a spin_lock_irqsave(>rx_lock, flags) around this?
>>
>> Indeed, and rtl_start_rx() seems to also access
On Mon, Jan 19, 2015 at 11:04:27PM +, Russell King - ARM Linux wrote:
> On Tue, Jan 20, 2015 at 03:01:42AM +0800, Greg Kroah-Hartman wrote:
> > On Mon, Jan 19, 2015 at 07:55:56PM +0100, Wolfram Sang wrote:
> > > diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
> > > index
David Miller [mailto:da...@davemloft.net]
> Sent: Tuesday, January 20, 2015 5:14 AM
[...]
> >> - r8152_submit_rx(tp, agg, GFP_ATOMIC);
> >> + if (!ret) {
> >> + ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
> >> + } else {
> >> +
Checkpatch doesn't like kmalloc with multiply very much:
drivers/staging/comedi/drivers/das1800.c:1377: WARNING: Prefer kmalloc_array
over kmalloc with multiply
So this patch swaps that use out for kmalloc_array instead.
Signed-off-by: Chase Southwood
---
On 01/19/2015 04:07 PM, Vivien Didelot wrote:
Hi Guenter,
For sysfs file attributes, only read and write permisssions make sense.
Minor typo, there's an extra 's' to permissions.
Mask provided attribute permissions accordingly and send a warning
to the console if invalid permission bits
On 2015年01月19日 18:42, Catalin Marinas wrote:
On Sun, Jan 18, 2015 at 06:25:53AM +, Hanjun Guo wrote:
On 2015年01月16日 17:49, Catalin Marinas wrote:
On Wed, Jan 14, 2015 at 03:04:54PM +, Hanjun Guo wrote:
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -10,6 +10,7 @@
*
Xen overrides __acpi_register_gsi and leaves __acpi_unregister_gsi as is.
That means, an IRQ allocated by acpi_register_gsi_xen_hvm() or
acpi_register_gsi_xen() will be freed by acpi_unregister_gsi_ioapic(),
which may cause undesired effects. So override __acpi_unregister_gsi to
NULL for safety.
(2015/01/07 22:40), Jon Medhurst (Tixy) wrote:
> I think that the patches up to 09/11 inclusive have been though more
> that enough review and revisions to think about getting them merged,
> there doesn't seem much point in continuously resending them whilst new
> features are built on top of
Currently Xen Domain0 has special treatment for ACPI SCI interrupt,
that is initialize irq for ACPI SCI at early stage in a special way as:
xen_init_IRQ()
->pci_xen_initial_domain()
->xen_setup_acpi_sci()
Allocate and initialize irq for ACPI SCI
Hi Thomas,
This patch set includes three hotfixes related Xen IRQ for v3.19.
Sorry for the long delay to get these two regressions fixed, it really
cost me some time to read and understand Xen IRQ code.
Patch 1 fixes the failure to register ACPI SCI interrupt on Xen
domain0 by reworking
Xen pciback driver assumes that pci_dev->irq won't change after calling
pci_disable_device(). But commit cffe0a2b5a34c95a4dadc9ec7132690a5b0f6687
("x86, irq: Keep balance of IOAPIC pin reference count") frees irq
resources and resets pci_dev->irq to zero when pci_disable_device() is
called.
So
(2015/01/20 9:45), Rusty Russell wrote:
> James Bottomley writes:
>> On Mon, 2015-01-19 at 16:21 +1030, Rusty Russell wrote:
>>> Masami Hiramatsu writes:
(2015/01/19 1:55), James Bottomley wrote:
> From: James Bottomley
>
> After e513cc1 module: Remove stop_machine from module
From: Rajendra Nayak
Document the LPASS (low power audio subsystem) clock controller
found on Qualcomm devices.
Cc:
Signed-off-by: Rajendra Nayak
Signed-off-by: Kumar Gala
Signed-off-by: Stephen Boyd
---
.../devicetree/bindings/clock/qcom,lcc.txt | 21 +
1 file
From: Rajendra Nayak
Add an LCC driver for IPQ806x that supports the i2s, S/PDIF, and
pcm clocks.
Signed-off-by: Rajendra Nayak
Signed-off-by: Kumar Gala
Signed-off-by: Josh Cartwright
[sb...@codeaurora.org: Reworded commit text, added Kconfig
select, fleshed out Kconfig description a bit
On 01/19/2015 03:47 PM, Lee Jones wrote:
> On Mon, 19 Jan 2015, 敬锐 wrote:
>> >On 01/18/2015 08:29 PM, Lee Jones wrote:
>>> > >On Thu, 15 Jan 2015,micky_ch...@realsil.com.cn wrote:
>>> > >
> >>From: Micky Ching
> >>
> >>update phy register value and using direct value instead of
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