In ACPI bases systems, in order to be able to create platform
devices and initialize them for arm-smmu-v3 components, the IORT
infrastructure requires ARM SMMU drivers to initialize a set of
operations that are used by the IORT kernel layer to configure platform
devices for ARM SMMU components in t
DT based systems have a generic kernel API to configure IOMMUs
for devices (ie of_iommu_configure()).
On ARM based ACPI systems, the of_iommu_configure() equivalent can
be implemented atop ACPI IORT kernel API, with the corresponding
functions to map device identifiers to IOMMUs and retrieve the
c
Current bus notifier in ARM64 (__iommu_attach_notifier)
attempts to attach dma_ops to a device on BUS_NOTIFY_ADD_DEVICE
action notification.
This causes issues on ACPI based systems, where PCI devices
can be added before the IOMMUs the devices are attached to
had a chance to be probed, causing fai
On systems booting with ACPI that enable the ARM SMMU components
in the kernel config options, the ARM SMMU v3 init function
(ie arm_smmu_init(), that registers the driver and sets-up bus
iommu operations) does not run only because the device tree interface
(of_find_matching_node()) fails to find t
Implement extended BPF JIT for ppc64. We retain the classic BPF JIT for
ppc32 and move ppc64 BE/LE to use the new JIT. Classic BPF filters will
be converted to extended BPF (see convert_filter()) and JIT'ed with the
new compiler.
Most of the existing macros are retained and fixed/enhanced where
ap
When the kernel is configured with no IORT support the compilation
issues the following warnings:
In file included from drivers/irqchip/irq-gic-v3-its-pci-msi.c:19:0:
include/linux/iort.h:28:33: warning: 'struct pci_dev' declared inside
parameter list
u32 iort_pci_get_msi_rid(struct pci_dev *pdev
Some kernel components (ie ARM SMMU drivers) require to look-up
the platform device corresponding to a specific IORT node to
carry out streamid translation.
Platform devices created for ARM SMMU components out of IORT tables
have no fwnode token initialized, in that they do not have any device
tre
On DT based systems, the of_dma_configure() API implements DMA configuration
for a given device. On ACPI systems an API equivalent to of_dma_configure()
is missing which implies that it is currently not possible to set-up DMA
operations for devices through the ACPI generic kernel layer.
This patch
The ACPI IORT table provides data to ARM SMMU drivers to carry out
streamid mappings and the kernel has the infrastructure to implement
it through the iommu_xlate() IORT SMMU operation hook.
By reusing the infrastructure implemented for of_xlate(), this patch
adds the ARM SMMU v3 iommu_xlate() hoo
Device drivers (eg ARM SMMU) need to know if a specific component
is part of the IORT table, so that kernel data structures are not
initialized at initcalls time if the respective component is not
part of the IORT table.
To this end, this patch adds a trivial function that allows detecting
if a gi
The ACPI IORT table provide entries for IOMMU (aka SMMU in ARM world)
components that allow creating the kernel data structures required to
probe and initialize the IOMMU devices.
This patch provides support in the IORT kernel code to register IOMMU
components and their respective IOMMU operations
On 07/06/16 09:39, Daniel Bristot de Oliveira wrote:
> Ciao Juri,
>
Ciao, :-)
> On 06/07/2016 07:14 AM, Juri Lelli wrote:
> > Interesting. And your test is using cpuset controller to partion
> > DEADLINE tasks and then modify groups concurrently?
>
> Yes. I was studying the partitioning/admissi
On 07/06/16 14:18, Jon Medhurst (Tixy) wrote:
On Mon, 2016-06-06 at 16:53 +0100, Sudeep Holla wrote:
This patch hooks up the support for device power domain provided by
SCPI using the Linux generic power domain infrastructure.
Cc: "Rafael J. Wysocki"
Cc: Kevin Hilman
Cc: Ulf Hansson
Cc: li
On Tue, Jun 7, 2016 at 2:54 AM, Heiko Stübner wrote:
> Hi Frank,
>
> Am Montag, 6. Juni 2016, 17:20:04 schrieb Frank Wang:
>> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
>> than rk3288 and before, and most of phy-related registers are also
>> different from the past, so a new
On Tuesday, June 7, 2016 8:11:05 AM CEST Bjorn Helgaas wrote:
> >
> > What do you think is the correct behavior here, should the driver only
> > request the PIO range with parent=ioport_resource, or should it also
> > request the MMIO window for the I/O ports with parent=iomem_resource?
> > In the
On Sat, Jun 04, 2016 at 01:27:04PM -0400, David Kershner wrote:
> From: David Binder
>
> Removes unused module parameters from visorbus_main.c, in response to
> findings by SonarQube.
>
> Signed-off-by: David Binder
> Signed-off-by: David Kershner
> Reviewed-by: Tim Sell
> ---
> drivers/stag
On Mon, Jun 06, 2016 at 04:53:58PM +0100, Sudeep Holla wrote:
> The System Control Processor (SCP) provides peripheral devices with
> power domains that can be enabled and disabled viathe System Control
> and Power Interface (SCPI) Message Protocol. Add bindings to allow
> probing of these device p
On Mon, 2016-06-06 at 16:53 +0100, Sudeep Holla wrote:
> This patch hooks up the support for device power domain provided by
> SCPI using the Linux generic power domain infrastructure.
>
> Cc: "Rafael J. Wysocki"
> Cc: Kevin Hilman
> Cc: Ulf Hansson
> Cc: linux...@vger.kernel.org
> Signed-off-b
Hi,
Thanks for the review.
On Mon, 2016-06-06 at 20:10 +0100, Andy Whitcroft wrote:
> On Mon, Jun 06, 2016 at 09:43:15AM -0700, Joe Perches wrote:
> > On Sat, 2016-06-04 at 13:10 +0800, Yingjoe Chen wrote:
> > > If a Kconfig config option doesn't specify 'default', the default
> > > will be n.
ping. Any comment is appreciate.
Thanks
Minfei
On 05/28/16 at 08:27P, Minfei Huang wrote:
> There is a generic function __pvclock_read_cycles to be used to get both
> flags and cycles. For function pvclock_read_flags, it's useless to get
> cycles value. To make this function be more effective, ge
The commit 25841ee0e9d2a ("Validate lockless_dereference() is used on a
pointer type") added a second use of the parameter to the macro.
This leads to trouble with consumers which use arguments with side
effects.
Instead, reuse the value which was read the first time.
Signed-off-by: Mateusz Guzi
From: Michal Hocko
Tetsuo is worried that mmput_async might still lead to a premature
new oom victim selection due to the following race:
__oom_reap_task exit_mm
find_lock_task_mm
atomic_inc(mm->mm_users) # = 2
task_unlock
t
Actually it looks like the data-integrity insert/strip operation
(where protection sg list does not exist) is broken.
It looks that the protection scatterlist should be done only if
prot_sg_count was provided...
I don't have access to mlx5 devices at the moment (still waiting
to get some...)
On Tue, Jun 07, 2016 at 10:21:36AM +0200, Arnd Bergmann wrote:
> On Monday, June 6, 2016 6:04:44 PM CEST Bjorn Helgaas wrote:
> > Several host bridge drivers (designware and all derivatives, iproc,
> > xgene, xilinx, and xilinx-nwl) don't request the MMIO and I/O port
> > windows they forward downs
Hi,
(guys, please make sure to break lines at 80-columns)
Roger Quadros writes:
> @@ -2853,6 +2852,23 @@ static irqreturn_t dwc3_interrupt(int irq, void
> *_evt)
>int dwc3_gadget_init(struct dwc3 *dwc)
>{
>intret;
> +struct resour
On Tue, Jun 07, 2016 at 02:41:44PM +0200, Hannes Frederic Sowa wrote:
> On 07.06.2016 09:15, Peter Zijlstra wrote:
> >>
> >> diff --git a/Documentation/memory-barriers.txt
> >> b/Documentation/memory-barriers.txt
> >> index 147ae8ec836f..a4d0a99de04d 100644
> >> --- a/Documentation/memory-barriers
Hi,
Roger Quadros writes:
>> But you said I must run an unnecessary OTG state machine, even thought it
>> has nothing to do with my system, only because the two sides of my port
>> mux device is a host and peripheral controller.
>
> We have a minimal dual-role state machine that just looks at ID
mmc_select_bus_width() returns bus width (4 or 8) on success or
zero if unsupported. If bus width is set successfully we then wish
to switch to HS200 mode.
This avoids the following error message in v4.70-rc2
[2.523674] mmc0: mmc_select_hs200 failed, error 3
[2.528516] mmc0: error 3 whils
On 07/06/16 13:58, Jon Medhurst (Tixy) wrote:
On Mon, 2016-06-06 at 16:53 +0100, Sudeep Holla wrote:
SCPI protocol supports device power state management. This deals with
power states of various peripheral devices in the system other than the
core compute subsystem.
This patch adds support fo
Hi,
I'm using a separate CMA region than the system default one for
a particular device to avoid fragmentation. It does help. But under
certain circumstance (memory shortage), it seems some of the pages in
the region will be used by system. The really bad thing is that when
a CMA allocation tri
On 2016/6/7 16:31, Ganapatrao Kulkarni wrote:
> On Tue, Jun 7, 2016 at 1:38 PM, Zhen Lei wrote:
>> Some numa nodes may have no memory. For example:
>> 1. cpu0 on node0
>> 2. cpu1 on node1
>> 3. device0 access the momory from node0 and node1 take the same time.
>
> i am wondering, if access to b
On Mon, 2016-06-06 at 16:53 +0100, Sudeep Holla wrote:
> SCPI protocol supports device power state management. This deals with
> power states of various peripheral devices in the system other than the
> core compute subsystem.
>
> This patch adds support for the power state management of those
> p
On 07/06/16 12:53, Lu Baolu wrote:
> Hi,
>
> On 06/07/2016 11:03 AM, Jun Li wrote:
>> Hi Roger
>>
>>>
>>> For Mux devices implementing dual-role, the mux device driver _must_ use
>>> OTG/dual-role core API so that a common ABI is presented to user space for
>>> OTG/dual-role.
>> That's the only
On Tue, Jun 07, 2016 at 01:32:48PM +0100, Russell King - ARM Linux wrote:
> On Tue, Jun 07, 2016 at 11:01:43AM +0100, Mark Rutland wrote:
> > So, if we codify the dma-coherent semantics as only matching the working
> > case today, then it becomes consistent and independent of kernel
> > configurati
On Sunday 29 May 2016 12:38:24 Pali Rohár wrote:
> > From fd67b58e3538c0732750ecad915cde736da099dc Mon Sep 17 00:00:00 2001
> > From: =?UTF-8?q?Pali=20Roh=C3=A1r?=
> > Date: Sat, 9 Jan 2016 16:57:59 +0100
> > Subject: [PATCH] musb: debugfs: Add support in testmode for forcing host
> > mode
> > t
On 07/06/16 12:27, Lu Baolu wrote:
> Hi,
>
> On 06/07/2016 02:34 PM, Jun Li wrote:
On 06/07/2016 11:03 AM, Jun Li wrote:
>> Hi Roger
>>
For Mux devices implementing dual-role, the mux device driver _must_
use OTG/dual-role core API so that a common ABI is pr
On Mon 14-03-16 17:39:43, Michal Hocko wrote:
> On Tue 01-03-16 19:20:24, Michael S. Tsirkin wrote:
> > On Tue, Mar 01, 2016 at 06:17:58PM +0100, Michal Hocko wrote:
> [...]
> > > Sorry, I could have been more verbose... The code would have to make sure
> > > that the mm is still alive before calli
Hi Mark,
On 2016年06月07日 20:06, Mark Brown wrote:
OK, then the original name probably makes some sense though really
that's such an unusual design that just naming it after the specific
board might be better, it's not likely to see any reuse I'd guess.
There are not only one type of board with th
On 2016年06月07日 14:14, Keerthy wrote:
On Monday 06 June 2016 05:14 PM, Caesar Wang wrote:
From: Sascha Hauer
The .get_trend callback in struct thermal_zone_device_ops has
the prototype:
int (*get_trend) (struct thermal_zone_device *, int,
enum thermal_trend *);
whereas the .get_trend callbac
On 07/06/16 14:49, Grygorii Strashko wrote:
> On 06/07/2016 12:34 PM, Roger Quadros wrote:
>> On 02/06/16 14:52, Grygorii Strashko wrote:
>>> On 06/01/2016 10:46 AM, Roger Quadros wrote:
Implementations might use different IRQs for
host, gadget and OTG so use named interrupt resources
>>>
On 2016/6/7 16:28, Ganapatrao Kulkarni wrote:
> On Tue, Jun 7, 2016 at 1:38 PM, Zhen Lei wrote:
>> 1. Currently only cpu0 set on cpu_possible_mask and percpu areas have not
>>been initialized.
>> 2. No reason to limit cpu0 must belongs to node0.
>
> even smp init assumes cpu0/boot processor
There is no way to end up in _free_event() with event::pmu being NULL.
The latter is initialized in event allocation path and remains set
forever. In case of allocation failure, the error path doesn't use
_free_event().
Having the check, however, suggests that it is possible to have a
event::pmu==
On Tue, Jun 07, 2016 at 03:41:04PM +0300, Sagi Grimberg wrote:
> Actually it looks like the data-integrity insert/strip operation
> (where protection sg list does not exist) is broken.
>
> It looks that the protection scatterlist should be done only if
> prot_sg_count was provided...
>
> I don't
On Tue, Jun 07, 2016 at 02:00:16PM +0200, Peter Zijlstra wrote:
> On Tue, Jun 07, 2016 at 07:43:15PM +0800, Boqun Feng wrote:
> > On Mon, Jun 06, 2016 at 06:08:36PM +0200, Peter Zijlstra wrote:
> > > diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
> > > index ce2f75e32ae1..e1c2
On 07.06.2016 09:15, Peter Zijlstra wrote:
>>
>> diff --git a/Documentation/memory-barriers.txt
>> b/Documentation/memory-barriers.txt
>> index 147ae8ec836f..a4d0a99de04d 100644
>> --- a/Documentation/memory-barriers.txt
>> +++ b/Documentation/memory-barriers.txt
>> @@ -806,6 +806,41 @@ out-guess
Gerd,
On Tue, Jun 07, 2016 at 01:05:40PM +0200, Gerd Hoffmann wrote:
> From: Eric Anholt
>
> This is equivalent and works for arm64 as well.
>
> Signed-off-by: Eric Anholt
> ---
> drivers/irqchip/irq-bcm2835.c | 3 +--
> drivers/irqchip/irq-bcm2836.c | 2 +-
> 2 files changed, 2 insertions(+)
On 07/06/16 00:15, Sudip Mukherjee wrote:
prot_sg_cnt has been assigned with the value of ret which we have
already checked to be non-zero so prot_sg_cnt can never be zero at this
point of the code and hence the else part can never execute.
And since we know prot_sg_cnt is non zero there is no
Ciao Juri,
On 06/07/2016 07:14 AM, Juri Lelli wrote:
> Interesting. And your test is using cpuset controller to partion
> DEADLINE tasks and then modify groups concurrently?
Yes. I was studying the partitioning/admission control of the
deadline scheduler, to document it.
I was using the minimal
On 07/06/2016 14:15, Wanpeng Li wrote:
>> >
>> > You're adding almost the same code to two callers of get_vtime_delta out
>> > of three. I don't know the vtime accounting code very well, but why
>> > doesn't the same apply to account_idle_time?
> St stuff is accounted when vCPUs(tasks on host) a
On Tue, Jun 07, 2016 at 11:01:43AM +0100, Mark Rutland wrote:
> So, if we codify the dma-coherent semantics as only matching the working
> case today, then it becomes consistent and independent of kernel
> configuration, and we can add properties to cater for the other cases,
> independent of kerne
On Tue 07-06-16 21:11:03, Tetsuo Handa wrote:
> On 2016/06/06 20:32, Michal Hocko wrote:
> > diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c
> > index 669fef1e2bb6..a4b0f18a69ab 100644
> > --- a/drivers/vhost/vhost.c
> > +++ b/drivers/vhost/vhost.c
> > @@ -707,7 +707,7 @@ static int vhos
Mike Galbraith reported that the LTP test case futex_wake04 was broken
by commit 65d8fc777f6d ("futex: Remove requirement for lock_page()
in get_futex_key()").
This test case uses futexes backed by hugetlbfs pages and so there is an
associated inode with a futex stored on such pages. The problem i
Hi Florian,
> -Original Message-
> From: Florian Fainelli [mailto:f.faine...@gmail.com]
> Sent: 07 June 2016 00:12
> To: Pramod Kumar; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
> Kumar Gala; Catalin Marinas; Will Deacon; Kishon Vijay Abraham I; David S.
> Miller
> Cc: devicet...
Signed-off-by: Lee Jones
---
drivers/clk/clk.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index d584004..8a815a1 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1501,7 +1501,6 @@ static int clk_core_set_rate_nolock(struct
On Wed, Jun 01, 2016 at 01:56:34AM -0400, Jason Wang wrote:
> We always poll tx for socket, this is sub optimal since:
>
> - it will be only used when we exceed the sndbuf of the socket.
> - since we use two independent polls for tx and vq, this will slightly
> increase the waitqueue traversing
Fix the following warnings from sparse due to casting to/from __iomem
annotated variables:
drivers/irqchip/irq-tegra.c:93:31: warning: incorrect type in initializer
(different address spaces)
drivers/irqchip/irq-tegra.c:93:31:expected void [noderef] *base
drivers/irqchip/irq-tegra.c:93:31:
On Wed, Jun 01, 2016 at 01:56:33AM -0400, Jason Wang wrote:
> We don't stop rx polling socket during rx processing, this will lead
> unnecessary wakeups from under layer net devices (E.g
> sock_def_readable() form tun). Rx will be slowed down in this
> way. This patch avoids this by stop polling so
On 6 Jun 2016 at 19:13, Theodore Ts'o wrote:
> On Mon, Jun 06, 2016 at 09:30:12PM +0200, PaX Team wrote:
> >
> > what matters for latent entropy is not the actual values fed into the
> > entropy
> > pool (they're effectively compile time constants save for runtime data
> > dependent
> > computa
Now some cipher hardware engines prefer to handle bulk block rather than one
sector (512 bytes) created by dm-crypt, cause these cipher engines can handle
the intermediate values (IV) by themselves in one bulk block. This means we
can increase the size of the request by merging request rather than
Since the ecb(aes) cipher does not need to handle the IV things for encryption
or decryption, that means it can support for bulk block when handling data.
Thus this patch adds the CRYPTO_ALG_BULK flag for ecb(aes) cipher to improve
the hardware aes engine's efficiency.
Signed-off-by: Baolin Wang
Fix warnings from sparse about casting to __iomem from non anotated
variable:
drivers/irqchip/irq-sirfsoc.c:56:47: warning: incorrect type in initializer
(different address spaces)
drivers/irqchip/irq-sirfsoc.c:56:47:expected void [noderef] *base
drivers/irqchip/irq-sirfsoc.c:56:47:got vo
In now dm-crypt code, it is ineffective to map one segment (always one
sector) of one bio with just only one scatterlist at one time for hardware
crypto engine. Especially for some encryption mode (like ecb or xts mode)
cooperating with the crypto engine, they just need one initial IV or null
IV in
In the absence of an fb_mmap callback, the fbdev code falls back to a
naive implementation which relies upon the DMA address being the same
as the physical address, and the buffer being physically contiguous
from there. Whilst this often holds for standard CMA allocations via
the platform's regular
This patchset will check if the cipher can support bulk mode, then dm-crypt
will handle different ways to send requests to crypto layer according to
cipher mode. For bulk mode, we can use sg table to map the whole bio and
send all scatterlists of one bio to crypto engine to encrypt or decrypt,
whic
In dm-crypt, it need to map one bio to scatterlist for improving the
hardware engine encryption efficiency. Thus this patch introduces the
blk_bio_map_sg() function to map one bio with scatterlists.
Signed-off-by: Baolin Wang
---
block/blk-merge.c | 19 +++
include/linux/b
2016-06-07 18:47 GMT+08:00 Paolo Bonzini :
>
>
> On 07/06/2016 10:00, Wanpeng Li wrote:
>> From: Wanpeng Li
>>
>> This patch adds guest steal-time support to full dynticks CPU
>> time accounting. After the following commit:
>>
>> ff9a9b4c4334 ("sched, time: Switch VIRT_CPU_ACCOUNTING_GEN to jiffy
From: Michal Hocko
Vladimir has noticed that we might declare memcg oom even during
readahead because read_pages only uses GFP_KERNEL (with mapping_gfp
restriction) while __do_page_cache_readahead uses
page_cache_alloc_readahead which adds __GFP_NORETRY to prevent from
OOMs. This gfp mask discrep
On 2016/06/06 20:32, Michal Hocko wrote:
> diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c
> index 669fef1e2bb6..a4b0f18a69ab 100644
> --- a/drivers/vhost/vhost.c
> +++ b/drivers/vhost/vhost.c
> @@ -707,7 +707,7 @@ static int vhost_memory_reg_sort_cmp(const void *p1,
> const void *p2)
>
Linus,
Please pull the for-linus branch from the git tree:
git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace.git
for-linus
HEAD: d71ed6c930ac7d8f88f3cef6624a7e826392d61f mnt: fs_fully_visible test
the proper mount for MNT_LOCKED
This contains two small but significa
On Tue, Jun 07, 2016 at 07:38:23PM +0800, Xing Zheng wrote:
> On 2016年06月07日 18:47, Mark Brown wrote:
> > No, that'd be one card with all three CODECs on the same board which I'm
> > guessing isn't the intention?
> Yes, because on our board, the audio connection by hardware really is such:
>
commit c74ba8b3480d ("arch: Introduce post-init read-only memory")
introduced the __ro_after_init attribute which allows to add variables
to the ro_after_init data section.
This new section was added to rodata, even though it contains writable
data. This in turn causes problems on architectures wh
On Tue, Jun 07, 2016 at 10:09:46AM +0200, Arnd Bergmann wrote:
Please start new threads for things like this - there's no obvious
relevance to me in either the subject or even the first couple of pages
of the message so it very nearly got deleted unread. It's very common
to get copied on irreleva
On s390 __ro_after_init is currently mapped to __read_mostly which
means that data marked as __ro_after_init will not be protected.
Reason for this is that the common code __ro_after_init implementation
is x86 centric: the ro_after_init data section was added to rodata,
since x86 enables write pro
On Thu, Jun 02, 2016 at 10:05:09AM +0200, Peter Zijlstra wrote:
> On Wed, Jun 01, 2016 at 09:57:23PM +0200, Peter Zijlstra wrote:
> > On Mon, May 23, 2016 at 01:00:10PM +0100, Morten Rasmussen wrote:
> > > On Mon, May 23, 2016 at 01:12:07PM +0200, Mike Galbraith wrote:
> > > > On Mon, 2016-05-23 at
These two patches allow a proper ro_after_init implementation on s390.
The current implementation maps __ro_after_init to __read_mostly,
which means that ro_after_init data won't be write protected at all.
Reason for this is that s390 write protects rodata very early (before
init calls) and there
Hello,
This patch series aims at replacing all dummy ->best_encoder()
implementations where we have a 1:1 relationship between encoders
and connectors.
The core already provides the drm_atomic_helper_best_encoder()
function which is taking the first encoder attached to the
connector (after making
On Tue, Jun 07, 2016 at 07:24:46PM +0800, Cao jin wrote:
> Hi,
>
> I noticed some problems about iowait entry of /proc/stat: it seems not
> accurate, and sometimes will decrease in SMP.
>
> For UP, we have a simple definition about iowait, which is:
> The time that the processor is idle, during w
On Tue, Jun 07, 2016 at 02:57:09PM +0300, Sagi Grimberg wrote:
> We forgot to CC Linux-rdma, CC'ing...
D'oh - thanks for catching this.
We have a 1:1 relationship between connectors and encoders and the
driver is relying on the atomic helpers: we can drop the custom
->best_encoder() and let the core call drm_atomic_helper_best_encoder()
for us.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 9
Hi Florian,
> -Original Message-
> From: Florian Fainelli [mailto:f.faine...@gmail.com]
> Sent: 07 June 2016 00:06
> To: Pramod Kumar; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
> Kumar Gala; Catalin Marinas; Will Deacon; Kishon Vijay Abraham I; David S.
> Miller
> Cc: devicet...
We forgot to CC Linux-rdma, CC'ing...
On 07/06/16 00:23, Christoph Hellwig wrote:
This patch implements the RDMA transport for the NVMe over Fabrics target,
which allows exporting NVMe over Fabrics functionality over RDMA fabrics
(Infiniband, RoCE, iWARP).
All NVMe logic is in the generic targe
Adapt drm_pick_crtcs() and update_connector_routing() to fallback to
drm_atomic_helper_best_encoder() if funcs->best_encoder() is NULL so
that DRM drivers can leave this hook unassigned if they know they want
to use drm_atomic_helper_best_encoder().
Update the vtables documentation accordingly.
S
On 6/5/2016 4:13 PM, Sudip Mukherjee wrote:
> If stats->names is NULL or stats->num_counters <= 0 we are jumping to
> the error path where the for loop is freeing hsag->attrs[i]. But as i
> is initialized to 0 so i >= 0 will be true and the loop will execute
> once trying to free hsag->attrs[0]. Bu
For all outputs except dp_mst, we have a 1:1 relationship between
connectors and encoders and the driver is relying on the atomic helpers:
we can drop the custom ->best_encoder() implementation and let the core
call drm_atomic_helper_best_encoder() for us.
Signed-off-by: Boris Brezillon
---
driv
We forgot to CC Linux-rdma, CC'ing...
On 07/06/16 00:23, Christoph Hellwig wrote:
This patch set implements the NVMe over Fabrics RDMA host and the target
drivers.
The host driver is tied into the NVMe host stack and implements the RDMA
transport under the NVMe core and Fabrics modules. The NVM
We forgot to CC Linux-rdma, CC'ing...
On 07/06/16 00:23, Christoph Hellwig wrote:
This patch implements the RDMA host (initiator in SCSI speak) driver. It
can be used to connect to remote NVMe over Fabrics controllers over
Infiniband, RoCE or iWarp, and uses the existing NVMe core driver as wel
We have a 1:1 relationship between connectors and encoders and the
driver is relying on the atomic helpers: we can drop the custom
->best_encoder() and let the core call drm_atomic_helper_best_encoder()
for us.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c |
NVIDIA's Tegra210 Jetson platform (P2180) uses the following
components:
MAX77620 as system PMIC.
PCA9539 as I2C GPIO bus expander
Enable the configs for PCA9539 GPIOs and Interrupt support and
MAX77620 MFD/GPIO/Pincontrol/Regulators.
Signed-off-by: Laxman Dewangan
---
Changes fr
We have a 1:1 relationship between connectors and encoders and the
driver is relying on the atomic helpers: we can drop the custom
->best_encoder() implementation and let the core call
drm_atomic_helper_best_encoder() for us.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/mediatek/mtk_dsi.c
The whole series looks fine to me:
Reviewed-by: Christoph Hellwig
We forgot to CC Linux-rdma, CC'ing...
On 07/06/16 00:23, Christoph Hellwig wrote:
From: Sagi Grimberg
NVMe over Fabrics RDMA transport defines a connection establishment
protocol over the RDMA connection manager. This header will be used by
both the host and target drivers to negotiate the con
Jetson-TX1 uses the Maxim MAX77620 as system Power management IC.
Add device node for the MAX77620 with following details:
- Add device max77620 with.
- Add all pins configurations.
- Configure FPS of the device.
- Configure SD/DCDC and LDOs regulators.
- populate the bus ex
We have a 1:1 relationship between connectors and encoders and the
driver is relying on the atomic helpers: we can drop the custom
->best_encoder(), and let the core call drm_atomic_helper_best_encoder()
for us.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/arc/arcpgu_hdmi.c | 18 --
On Tue, Jun 07, 2016 at 07:43:15PM +0800, Boqun Feng wrote:
> On Mon, Jun 06, 2016 at 06:08:36PM +0200, Peter Zijlstra wrote:
> > diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
> > index ce2f75e32ae1..e1c29d352e0e 100644
> > --- a/kernel/locking/qspinlock.c
> > +++ b/kernel/lo
This patch Replace all occurences of (1<
---
drivers/staging/comedi/drivers/dmm32at.c | 86
1 file changed, 43 insertions(+), 43 deletions(-)
diff --git a/drivers/staging/comedi/drivers/dmm32at.c
b/drivers/staging/comedi/drivers/dmm32at.c
index 958c0d4..3c4722a 1
All outputs have a 1:1 relationship between connectors and encoders
and the driver is relying on the atomic helpers: we can drop the custom
->best_encoder() implementations and let the core call
drm_atomic_helper_best_encoder() for us.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/sti/sti_d
On Mon, Jun 06, 2016 at 04:49:57PM -0500, Nishanth Menon wrote:
> On 06/01/2016 07:41 AM, Jens Wiklander wrote:
> [...]
> > diff --git a/drivers/tee/Makefile b/drivers/tee/Makefile
> > index 60d2dab..53f3c76 100644
> > --- a/drivers/tee/Makefile
> > +++ b/drivers/tee/Makefile
> > @@ -1,3 +1,4 @@
>
All outputs have a 1:1 relationship between connectors and encoders,
and the driver is relying on the atomic helpers: we can drop the custom
->best_encoder() implementations and let the core call
drm_atomic_helper_best_encoder() for us.
Signed-off-by: Boris Brezillon
Reviewed-by: Laurent Pinchart
On 07/06/2016 13:50, Wanpeng Li wrote:
>> > I'm not sure this patch is necessary. Instead you could just revert
>> > commit e9532e69b8d1. The previous patch obviously makes it unnecessary
>> > to reset rq->prev_steal_time and rq->prev_steal_time_rq, and the reset
>> > of rq->prev_irq_time looks
The virtgpu output exposes a 1:1 relationship between connectors and
encoders and the driver is relying on the atomic helpers: we can drop
the custom ->best_encoder() implementation and let the core call
drm_atomic_helper_best_encoder() for us.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/
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