On Tue, Jul 18, 2017 at 04:27:15PM +0530, Keerthy wrote:
> Add a separate compatible for keystone-k2g soc
>
> Signed-off-by: Keerthy
> ---
> Documentation/devicetree/bindings/gpio/gpio-davinci.txt | 3 ++-
> drivers/gpio/gpio-davinci.c | 1 +
> 2 files changed, 3 inse
On Tue, Jul 18, 2017 at 05:49:22PM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> add dt-binding document for MediaTek MT6380 PMIC
>
> Signed-off-by: Chenglin Xu
> Signed-off-by: Sean Wang
> ---
> .../bindings/regulator/mt6380-regulator.txt| 90
> ++
>
On Mon, Jul 24, 2017 at 6:09 PM, Jerome Brunet wrote:
> On Mon, 2017-07-24 at 14:26 +0200, Neil Armstrong wrote:
>> On 07/24/2017 02:06 PM, Neil Armstrong wrote:
>> > On 07/23/2017 07:03 PM, Joseph Kogut wrote:
>> > > Hi Kevin,
>> > >
>> > > I tested on a P212 reference board, which is currently t
On Mon, Jul 24, 2017 at 10:19:24AM -0700, Greg Hackmann wrote:
> Commit ff86bf0c65f1 ("alarmtimer: Rate limit periodic intervals") sets a
> minimum bound on the alarm timer interval. This minimum bound shouldn't
> be applied if the interval is 0. Otherwise, one-shot timers will be
> converted int
On 07/22/2017 09:50 AM, Tejun Heo wrote:
> Hello, Waiman.
>
> On Fri, Jul 21, 2017 at 04:34:51PM -0400, Waiman Long wrote:
>> The special prefix '#' attached to a controller name can now be written
>> into the cgroup.subtree_control file to set that controller in bypass
>> mode in all the child cgr
On Mon, Jul 24, 2017 at 05:54:52PM +, Kani, Toshimitsu wrote:
> Umm... I was under impression that we are adding the OSC bit check in
> addition to the current GHES filtering.
Read the parallel subthread again.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--
Add static inline stubs to bpmp.h when CONFIG_BPMP is not enabled.
This allows building BPMP-related drivers with COMPILE_TEST.
Signed-off-by: Mikko Perttunen
---
v2:
- added patch
include/soc/tegra/bpmp.h | 42 +++---
1 file changed, 39 insertions(+), 3 dele
Now bisected and verified via revert, the culprit is:
cf8e0fedf078 mm/zsmalloc: simplify zs_max_alloc_size handling
Reproducer: ltp::testcases/bin/zram03.
-Mike
On 24/07/17 18:21, Jassi Brar wrote:
> On Mon, Jul 24, 2017 at 9:51 PM, Sudeep Holla wrote:
>> On 24/07/17 16:41, Jassi Brar wrote:
>
>>> SCMI calls
>>> mbox_send_message(struct mbox_chan *chan, struct scmi_xfer *xfer);
>>>
>>> whereas the API expects
>>> mbox_send_message(struct mbox_
On Tue, Jul 18, 2017 at 03:29:40PM +0800, Icenowy Zheng wrote:
> Allwinner XR819 is a SDIO Wi-Fi chip, which has the functionality to use
> an out-of-band interrupt pin instead of SDIO in-band interrupt.
>
> Add the device tree binding of this chip, in order to make it possible
> to add this inter
On Tue 25-07-17 00:42:05, kbuild test robot wrote:
> Hi Michal,
>
> [auto build test ERROR on mmotm/master]
> [also build test ERROR on v4.13-rc2 next-20170724]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
On Mon, 2017-07-24 at 14:56 -0300, Mauro Carvalho Chehab wrote:
> Em Mon, 24 Jul 2017 15:56:27 +
:
> That's probably too late for me as I received a new HP machine
> we bought just last week, but for the next time I would need to
> get a new hardware, what would be the non-RAS equivalent to
>
On Tue, Jul 18, 2017 at 03:06:11PM +0800, Baolin Wang wrote:
> This patch adds the binding documentation for Spreadtrum SC9860 DMA
> controller device.
>
> Signed-off-by: Baolin Wang
> ---
> Documentation/devicetree/bindings/dma/sprd-dma.txt | 41
>
> 1 file changed, 41 i
Em Mon, 24 Jul 2017 18:44:00 +0200
Borislav Petkov escreveu:
> On Mon, Jul 24, 2017 at 01:04:13PM -0300, Mauro Carvalho Chehab wrote:
> > If the Kernel force those users to use ghes_edac by default,
> > they they won't see the error counts anymore, but, instead,
> > hardware reports that the memo
Em Mon, Jul 24, 2017 at 10:46:38AM -0700, Andi Kleen escreveu:
> On Mon, Jul 24, 2017 at 02:34:37PM -0300, Arnaldo Carvalho de Melo wrote:
> > Em Sun, Jul 23, 2017 at 08:46:20AM -0700, Andi Kleen escreveu:
> > > On Sun, Jul 23, 2017 at 07:46:05AM +0900, Namhyung Kim wrote:
> > > > Hi Arnaldo and Ta
On 24.07.2017 13:40, Claudio Imbrenda wrote:
> Simplify and improve the code so that the PID is always available in
> the uevent even when debugfs is not available.
>
> This adds a userspace_pid field to struct kvm, as per Radim's
> suggestion, so that the PID can be retrieved on destruction too.
On Mon, Jul 24, 2017 at 11:08 PM, Sudeep Holla wrote:
> On 24/07/17 18:20, Jassi Brar wrote:
>>
>>> I see that the SCPI firmware driver (as the user of the mailbox API) is
>>> expecting the return value from a0 as returned above, translating the
>>> firmware error codes into Linux' ones.
>>>
>> I
Em Mon, 24 Jul 2017 15:56:27 +
"Kani, Toshimitsu" escreveu:
> On Mon, 2017-07-24 at 17:37 +0200, Borislav Petkov wrote:
> > On Mon, Jul 24, 2017 at 03:25:34PM +, Kani, Toshimitsu wrote:
> :
> >
> > > We've been providing this model for many years now.
> >
> > Dude, relax, I'm onl
On Tue, Jul 18, 2017 at 03:33:29PM +0800, Icenowy Zheng wrote:
> Allwinner H5 has a Mali-450 MP4 GPU, which has a reset line like other
> Allwinner SoCs with Mali Utgard, but it's a Mali-450, so it needs a new
> compatible.
>
> Add the new compatible to Mali Utgard binding document.
>
> Signed-of
On Tegra186, the BPMP (Boot and Power Management Processor) exposes an
interface to thermal sensors on the system-on-chip. This driver
implements access to the interface. It supports reading the
temperature, setting trip points and receiving notification of a
tripped trip point.
Signed-off-by: Mik
On Mon, 2017-07-24 at 20:50 +0300, Boris Petkov wrote:
> On July 24, 2017 8:44:03 PM GMT+03:00, "Kani, Toshimitsu" @hpe.com> wrote:
> > I assumed our platforms w/o build-in RAS do not implement GHES,
>
> If we make it a normal module, it will be decoupled from GHES and it
> will rely only on the
On Mon, Jul 24, 2017 at 06:57:53PM +0300, Andrey Ryabinin wrote:
>
>
> On 07/24/2017 06:37 PM, Kirill A. Shutemov wrote:
> > On Mon, Jul 24, 2017 at 06:25:58PM +0300, Andrey Ryabinin wrote:
> >> KASAN fills kernel page tables with repeated values to map several
> >> TBs of the virtual memory to t
On 07/24/2017 09:40 AM, Marc Gonzalez wrote:
> [ Trimming CC list ]
>
> On 19/07/2017 21:07, Doug Berger wrote:
>
>> From: Florian Fainelli
>>
>> The only usage of the irq_gc_mask_disable_reg_and_ack() function
>> is by the Tango irqchip driver. This usage is replaced by the
>> irq_gc_mask_disab
On Mon, Jul 17, 2017 at 02:25:38PM -0500, Christopher Bostic wrote:
> Describe device tree optional properties:
>
> * aspeed,reset-type = "cpu|soc|system|none"
> One of three different, mutually exclusive, values
>
> "cpu" : ARM CPU reset on signal
> "soc" : 'System on chip' re
On Mon, 2017-07-24 at 10:15 +0200, Benjamin Tissoires wrote:
> On Jul 22 2017 or thereabouts, Lyude wrote:
> > So it looks like that suspend/resume has actually always been
> > broken on
> > hid-rmi. The fact it worked was a rather silly coincidence that was
> > relying on the HID device to already
On Mon, Jul 17, 2017 at 03:05:11PM -0700, Kees Cook wrote:
> Document the /chosen/kaslr-seed property (and its interaction with the
> EFI_RNG_PROTOCOL API). Thanks to Ard for clarifications.
>
> Signed-off-by: Kees Cook
> Acked-by: Ard Biesheuvel
> Acked-by: Mark Rutland
> Acked-by: Will Deacon
Expose and export the tegra_bpmp_mrq_return function for use of drivers
outside the core BPMP driver. This function is used to reply to
messages originating from the BPMP, which is required in the thermal
driver.
Signed-off-by: Mikko Perttunen
---
drivers/firmware/tegra/bpmp.c | 5 +++--
include
On July 24, 2017 8:44:03 PM GMT+03:00, "Kani, Toshimitsu"
wrote:
>I assumed our platforms w/o build-in RAS do not implement GHES,
If we make it a normal module, it will be decoupled from GHES and it will rely
only on the whitelist to load.
--
Sent from a small device: formatting sux and brevi
On 07/22/2017 09:43 AM, Tejun Heo wrote:
> Hello, Waiman.
>
> On Fri, Jul 21, 2017 at 04:34:50PM -0400, Waiman Long wrote:
>> When thread mode is used, it is possible that some cgroups may be
>> in an invalid state. Currently users may not be aware that they are
>> invalid until they try to migrate
On Mon, 2017-07-24 at 18:37 +0200, Borislav Petkov wrote:
> On Mon, Jul 24, 2017 at 03:56:27PM +, Kani, Toshimitsu wrote:
> > Yes, Mauro has already pointed this out. As I replied to him, we
> > do have a separate series of platforms that do not have built-in
> > RAS, and
>
> So this whitelis
On Sat, Jul 22, 2017 at 1:25 PM, Eric W. Biederman
wrote:
> I played with some clever changes such as limiting the copy to 48 bytes,
> disabling the memset and the like but I could not get a strong enough
> signal to say that any one change removed the extra or a clear part of
> it 20ns.
What CPU
On Mon, Jul 24, 2017 at 02:42:09PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Jul 24, 2017 at 04:16:49PM +0200, Jiri Olsa escreveu:
> > On Fri, Jul 21, 2017 at 05:31:59PM -0700, Sukadev Bhattiprolu wrote:
> > > Andi Kleen [a...@firstfloor.org] wrote:
> > > > From: Andi Kleen
> > > >
> > > >
On Mon, Jul 24, 2017 at 02:34:37PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Sun, Jul 23, 2017 at 08:46:20AM -0700, Andi Kleen escreveu:
> > On Sun, Jul 23, 2017 at 07:46:05AM +0900, Namhyung Kim wrote:
> > > Hi Arnaldo and Taeung,
> > >
> > > (+ Andi)
> > >
> > > On Fri, Jul 21, 2017 at 11:47:
On Sun, 2017-07-23 at 12:54 +0300, Andy Shevchenko wrote:
> On Sun, Jul 23, 2017 at 4:15 AM, Lyude wrote:
>
> > So, call hid_hw_open() in rmi_post_resume() so we make sure that
> > the
> > device is alive before we try talking to it.
> >
> > This fixes RMI device suspend/resume over HID.
> > -
On 24/07/17 18:20, Jassi Brar wrote:
> On Mon, Jul 24, 2017 at 4:50 AM, André Przywara
> wrote:
>> On 02/07/17 06:55, Jassi Brar wrote:
>>
+ mbox_chan_received_data(link, (void *)res.a0);
+
>>> Or you can update the 'data' with value from 'a0' ?
>>
>> Mmh, I am a bit puzzled by
Em Mon, Jul 24, 2017 at 04:16:49PM +0200, Jiri Olsa escreveu:
> On Fri, Jul 21, 2017 at 05:31:59PM -0700, Sukadev Bhattiprolu wrote:
> > Andi Kleen [a...@firstfloor.org] wrote:
> > > From: Andi Kleen
> > >
> > > Today, when a JSON file fails parsing the build continues,
> > > but there are no jso
As the only caller of dma_supported() outside of DMA API internals, the
qtfnmac driver stands out and invites scrutiny. Thankfully, it's not
being used for evil, but it is entirely redundant, since it open-codes a
check that the DMA mask setting functions are going to perform anyway.
In fact, the w
Em Mon, Jul 24, 2017 at 11:49:30AM +0800, Jin, Yao escreveu:
> Hi Arnaldo,
>
> Is this patch OK for merging? It's more than 2 months no more comments.
This is not an area I'm completely familiar with, so having other people
vouch for it, reviewing, acking it surely should speed merging, can you
f
Em Mon, Jul 24, 2017 at 07:09:07PM +0800, Jin Yao escreveu:
> Current --branch-history LBR annotation displays confused
> data. For example, each cycles report is duplicated on both
> "from" and "to" entries.
Andi, can you take a look at this? An Acked-by you or Reviewed-by would
be great to have,
On 07/18/2017 12:37 PM, Florian Fainelli wrote:
> Adds support for the Broadcom reference board BCM947189ACDMBR which
> features the following:
>
> * 128MB of DRAM
> * External MoCA support through a Broadcom BCM6802 chip
> * 1x external Gigabit PHY through the external BCM6802
> * 1x USB 2.0 port
In Tegra186, the BPMP (Boot and Power Management Processor) implements
an interface that is used to read system temperatures, including CPU
cluster and GPU temperatures. This binding describes the thermal sensor
that is exposed by BPMP.
Signed-off-by: Mikko Perttunen
Acked-by: Rob Herring
---
.
The wrappers have been removed in commit 5a35876e2830
(drm: omapdrm: Remove manual update display support)
and will not be reintroduced, since the normal sys
functions properly call the dirty callback.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/omap_fbdev.c | 3 ---
1 file chan
On Sun, Jul 23, 2017 at 7:06 PM, Alex Williamson
wrote:
> On Fri, 21 Jul 2017 13:20:18 -0700
> Feng Kan wrote:
>
>> On Thu, Jul 20, 2017 at 3:22 PM, Alex Williamson
>> wrote:
>> > On Wed, 19 Jul 2017 17:46:51 -0700
>> > Feng Kan wrote:
>> >
>> >> The APM X-Gene PCIe root port does not support A
Droid 4 has a command mode DSI panel, which does not have/use
DSI based backlight support. This adds proper support for this
using a backlight phandle property, which follows the common
panel binding.
If no backlight phandle is found, it is assumed, that the
native backlight should be used instead
This is a workaround for a hardware bug occuring on OMAP3
with manually updated panels. Details about the HW bug are
unknown to me, but without this fix the panel refresh does
not work at all on Nokia N950.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/dss/dispc.c | 16 +++
From: Tony Lindgren
This adds support for get_timings() and check_timings()
to get the driver working and properly initializes the
timing information from DT.
Signed-off-by: Tony Lindgren
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 56 +++
Em Mon, Jul 24, 2017 at 10:51:58AM +0900, Taeung Song escreveu:
> Hi Arnaldo,
>
> Sorry, I'm too late.
>
> On 07/21/2017 08:24 PM, Arnaldo Carvalho de Melo wrote:
> > Em Fri, Jul 21, 2017 at 06:41:29PM +0900, Taeung Song escreveu:
> > > On 07/21/2017 04:19 AM, Arnaldo Carvalho de Melo wrote:
> >
Add support for regulators used by panels found inside
of the Nokia N950, N9 and Motorola Droid 4.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 57 +++--
1 file changed, 53 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/o
When walking the page tables to resolve an address that points to
!present_p*d() entry, huge_pte_offset() returns inconsistent values
depending on the level of page table (PUD or PMD).
In the case of a PUD entry, it returns NULL while in the case of a PMD
entry, it returns a pointer to the page ta
Add support to load physical size information from DT using
the properties defined by the common panel binding.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/omapdrm/di
While physical size information is automatically parsed for EDID
based displays, we need to provide it manually for displays providing
one fixed mode.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/dss/omapdss.h| 2 ++
drivers/gpu/drm/omapdrm/omap_connector.c | 6 ++
2 file
Use the new descriptor based GPIO API instead of
the legacy one, which results in cleaner code
with less lines of code.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 74 +
1 file changed, 27 insertions(+), 47 deletions(-)
diff --g
Hi,
This adds support for command mode DSI panels to
omapdrm. I tested the patches on Nokia N950 (omap3)
and Motorola Droid 4 (omap4). This is basically
PATCHv3 of my series adding N950 display support,
but I started from scratch without reverting the
removal of manual display update support.
Tes
Ack. You have numbers, it's all good.
Except I'd still want you to comment on why you cared and about which
piece of your upcoming code this is going to matter for, ok?
Linus
Add basic panel support for the Nokia N950. It must be tweaked a
little bit later, since the panel was built into the device
upside-down. Also the first 5 and the last 5 pixels are covered
by plastic.
Signed-off-By: Sebastian Reichel
---
arch/arm/boot/dts/omap3-n950.dts | 88
Em Sun, Jul 23, 2017 at 08:46:20AM -0700, Andi Kleen escreveu:
> On Sun, Jul 23, 2017 at 07:46:05AM +0900, Namhyung Kim wrote:
> > Hi Arnaldo and Taeung,
> >
> > (+ Andi)
> >
> > On Fri, Jul 21, 2017 at 11:47:48AM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Thu, Jul 20, 2017 at 06:36:55AM +09
In the future we would use dynamic allocation for IRQ which brings
non-1:1 mapping for IOAPIC domain. Thus, we need to respect return value
of mp_map_gsi_to_irq() and assign it back to the device structure.
Besides that we need to read GSI from interrupt pin register to avoid
cases when some drive
This improves LCD support for the Droid 4.
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/omap4-droid4-xt894.dts | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts
b/arch/arm/boot/dts/omap4-droid4-xt894.dts
index 3af4905a6b6
Although huge_pte_offset() returns NULL when encountering swap page
table entries, the callers of huge_pte_offset() correctly handling swap
entries.
Add support to the huge_pte_offset() to return the swap entries when it
encounters them during the page table walks.
Also update the function docume
Hi,
The generic implementation of huge_pte_offset() has inconsistent
behaviour when looking up hugepage PUDs vs PMDs entries that are not
present (returning NULL vs pte_t*).
Similarly, it returns NULL when encountering swap entries although all
the callers have special checks to properly deal wit
This prepares framedone interrupt handling for
manual display update support.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/omap_crtc.c | 48 +
drivers/gpu/drm/omapdrm/omap_drv.h | 2 ++
drivers/gpu/drm/omapdrm/omap_irq.c | 24 +++
In preparation for manually updated display support, such as DSI
command mode panels, this adds a simple helper to see if a connector
is manually updated.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/omap_connector.c | 8
drivers/gpu/drm/omapdrm/omap_drv.h | 1 +
2
This adds the required infrastructure for manually
updated displays, such as DSI command mode panels.
While those panels often support partial updates
we currently always do a full refresh. Display
will be refreshed when something calls the dirty
callback, such as libdrm's drmModeDirtyFB().
This
Remove driver (un)register API defines. They do not even exist
anymore.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/dss/omapdss.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 85953a0bc7
Group timers callback initializers together in
x86_intel_mid_early_setup() for easy to find and maintain.
No functional change intended.
Signed-off-by: Andy Shevchenko
---
arch/x86/platform/intel-mid/intel-mid.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/platfo
Thanks to the nested inlining, all drivers correctly calling
dma_mapping_error() after a mapping a page or single buffer generate two
calls to get_arch_dma_ops() per callsite, which all adds up to a fair
old chunk of useless code, e.g. ~3KB for an arm64 defconfig plus extras:
textdata b
On Mon, Jul 24, 2017 at 6:09 PM, Andrey Smirnov
wrote:
> Add a driver for RAVE Supervisory Processor, an MCU implementing
> varoius bits of housekeeping functionality (watchdoging, backlight
> control, LED control, etc) on RAVE family of products by Zodiac
> Inflight Innovations.
>
> This driver i
Hi Nick,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.13-rc2 next-20170724]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Nick-Terrell/Add-xxhash-and-zstd-modules
On Mon, Jul 24, 2017 at 4:50 AM, André Przywara wrote:
> On 02/07/17 06:55, Jassi Brar wrote:
>
>>> + mbox_chan_received_data(link, (void *)res.a0);
>>> +
>> Or you can update the 'data' with value from 'a0' ?
>
> Mmh, I am a bit puzzled by this. Why would this be needed or useful?
>
I meant
On Thu, 20 Jul 2017 10:02:33 +0530
Anup Patel wrote:
> Not allowing No-IOMMU mode for devices already having
> iommu_ops on their bus is very conservative.
>
> We now have IOMMU (such as ARM SMMU) which can bypass
> transcations when IOMMU is not configured for a given
> device. In addition, it
On 24/07/17 18:16, Alex Williamson wrote:
> On Thu, 20 Jul 2017 12:17:12 +0100
> Robin Murphy wrote:
>
>> On 20/07/17 10:10, Will Deacon wrote:
>>> On Thu, Jul 20, 2017 at 09:32:00AM +0530, Anup Patel wrote:
On Wed, Jul 19, 2017 at 5:23 PM, Will Deacon wrote:
> There are two things
On Mon, Jul 24, 2017 at 9:51 PM, Sudeep Holla wrote:
> On 24/07/17 16:41, Jassi Brar wrote:
>> SCMI calls
>> mbox_send_message(struct mbox_chan *chan, struct scmi_xfer *xfer);
>>
>> whereas the API expects
>> mbox_send_message(struct mbox_chan *chan, struct controller_specific
>> *xfer)
Commit ff86bf0c65f1 ("alarmtimer: Rate limit periodic intervals") sets a
minimum bound on the alarm timer interval. This minimum bound shouldn't
be applied if the interval is 0. Otherwise, one-shot timers will be
converted into periodic ones.
This patch is against 4.9.39, and is only needed in -
Add missing line breaks between the last two tests.
Signed-off-by: Shuah Khan
---
tools/testing/selftests/breakpoints/breakpoint_test.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/testing/selftests/breakpoints/breakpoint_test.c
b/tools/testing/selftests/breakpo
On Thu, 20 Jul 2017 12:17:12 +0100
Robin Murphy wrote:
> On 20/07/17 10:10, Will Deacon wrote:
> > On Thu, Jul 20, 2017 at 09:32:00AM +0530, Anup Patel wrote:
> >> On Wed, Jul 19, 2017 at 5:23 PM, Will Deacon wrote:
> >>> There are two things here:
> >>>
> >>> 1. iommu_present() is pretty
On 20 July 2017 at 04:17, Suzuki K Poulose wrote:
> This series adds support for ARM Coresight SoC-600 IP, which implements
> Coresight V3 architecture. It also does some clean up of the replicator
> driver namings used in the driver to prevent confusions to the user.
>
> The SoC-600 comes with an
On Mon, 24 Jul 2017, Johan Hovold wrote:
> On Mon, Jul 24, 2017 at 10:38:41AM -0400, Alan Stern wrote:
> > On Mon, 24 Jul 2017, Johan Hovold wrote:
> >
> > > Make sure that the controller is runtime resumed when system suspending
> > > to avoid an external abort when accessing the interrupt regis
On 20 July 2017 at 04:17, Suzuki K Poulose wrote:
> The coresight SoC 600 supports ETR save-restore which allows us
> to restore a trace session by retaining the RRP/RWP/STS.Full values
> when the TMC leaves the Disabled state. However, the TMC doesn't
> have a scatter-gather unit in built.
>
> Al
On 20 July 2017 at 04:17, Suzuki K Poulose wrote:
> Coresight TMC splits 64bit registers into a pair of 32bit registers
> (e.g DBA, RRP, RWP). Provide helpers to read/write to these registers.
>
> Cc: Mathieu Poirier
> Signed-off-by: Suzuki K Poulose
> ---
> drivers/hwtracing/coresight/coresigh
To be able to use the common 4k zero page in DAX we need to have our PTE
fault path look more like our PMD fault path where a PTE entry can be
marked as dirty and writeable as it is first inserted rather than waiting
for a follow-up dax_pfn_mkwrite() => finish_mkwrite_fault() call.
Right now we ca
On Wed, Jul 19, 2017 at 10:58 AM, Thomas Garnier wrote:
> The work pending loop can call set_fs after addr_limit_user_check
> removed the _TIF_FSCHECK flag. To prevent the infinite loop, move
> the addr_limit_user_check call at the beginning of the loop.
>
> Fixes: 73ac5d6a2b6a ("arm/syscalls: Che
Now that we no longer insert struct page pointers in DAX radix trees the
page cache code no longer needs to know anything about DAX exceptional
entries. Move all the DAX exceptional entry definitions from dax.h to
fs/dax.c.
Signed-off-by: Ross Zwisler
Suggested-by: Jan Kara
Reviewed-by: Jan Kar
dax_load_hole() will soon need to call dax_insert_mapping_entry(), so it
needs to be moved lower in dax.c so the definition exists.
dax_wake_mapping_entry_waiter() will soon be removed from dax.h and be made
static to dax.c, so we need to move its definition above all its callers.
Signed-off-by:
Now that we no longer insert struct page pointers in DAX radix trees we can
remove the special casing for DAX in page_cache_tree_insert(). This also
allows us to make dax_wake_mapping_entry_waiter() local to fs/dax.c,
removing it from dax.h.
Signed-off-by: Ross Zwisler
Suggested-by: Jan Kara
Re
When servicing mmap() reads from file holes the current DAX code allocates
a page cache page of all zeroes and places the struct page pointer in the
mapping->page_tree radix tree. This has three major drawbacks:
1) It consumes memory unnecessarily. For every 4k page that is read via a
DAX mmap()
Changes since v4:
- Added static __vm_insert_mixed() to mm/memory.c that holds the common
code for both vm_insert_mixed() and vm_insert_mixed_mkwrite() so we
don't have duplicate code and we don't have to pass boolean flags
around. (Dan & Jan)
- Added a comment for the PFN sanity check
This reverts the change of commit f85c758dbee54cc3612a6e873ef7cecdb66ebee5,
as the behavior it modified was intended.
The VM is running in 32-bit PAE mode, and Table 4-7 of the Intel manual
says:
Table 4-7. Use of CR3 with PAE Paging
Bit Position(s) Contents
4:0 Ignored
31:5
On Mon, Jul 17, 2017 at 03:39:55PM +0200, Sebastian Reichel wrote:
> From: Milo Kim
>
> Add DT binding for ti-lmu devices.
>
> Signed-off-by: Milo Kim
> Signed-off-by: Sebastian Reichel
> ---
> .../bindings/leds/backlight/ti-lmu-backlight.txt | 66
> ++
> 1 file changed
On 07/20/2017 06:57 AM, Egil Hjelmeland wrote:
> Workaround for dsa_switch_mdb_add adding CPU port to group,
> but forgetting to remove it:
>
> Remove port 0 if only port 0 is only port left.
>
> Signed-off-by: Egil Hjelmeland
> ---
> drivers/net/dsa/lan9303-core.c | 11 +++
> 1 file ch
Hi Jeffy,
> Currently we are calling usb_submit_urb directly to submit deferred tx
> urbs after unanchor them.
>
> So the usb_giveback_urb_bh would failed to unref it in usb_unanchor_urb
> and cause memory leak:
> unreferenced object 0xffc0ce0fa400 (size 256):
> ...
> backtrace:
>[] __sa
On 07/20/2017 06:42 AM, Egil Hjelmeland wrote:
> Must be set to 1 by user space when STP is used on the lan9303.
> If bridging without local STP, leave at 0, so external STP BPDUs
> are forwarded.
>
> Hopefully the kernel can be improved so the driver can handle this
> without user intervention, a
On 07/23/2017 07:15 PM, Huang, Ying wrote:
> Hi, Tim,
>
> Tim Chen writes:
>
>> We will only reach the lock initialization code
>> in alloc_swap_slot_cache when the cpu's swap_slots_cache's slots
>> have not been allocated and swap_slots_cache has not been initialized
>> previously. So the lock
Hi,
On 07/24/2017 07:47 AM, Egil Hjelmeland wrote:
> This series extends the LAN9303 3 port switch DSA driver. Highlights:
> - Make the MDIO interface work
> - Bridging: Unicast offload
> - Bridging: Added fdb/mdb handling
> - Bridging: STP support
> - Documentation
>
> The last three patche
On 07/20/2017 03:35 AM, Egil Hjelmeland wrote:
> Saving 2628 bytes.
>
> Signed-off-by: Egil Hjelmeland
Reviewed-by: Florian Fainelli
--
Florian
On 07/20/2017 01:49 AM, Egil Hjelmeland wrote:
> Added read only file /sys/class/net//lan9303/alr_dump,
> that output 168 first ALR entires.
>
> Currently "bridge fdb show" does not include the CPU port, while
> "alr_dump" list all three ports per entry.
Agreed, and this is a limitation we would
On Mon, Jul 24, 2017 at 01:04:13PM -0300, Mauro Carvalho Chehab wrote:
> If the Kernel force those users to use ghes_edac by default,
> they they won't see the error counts anymore, but, instead,
> hardware reports that the memories need to be replaced.
This is exactly why I'm trying to load ghes_
On Wed, Jul 19, 2017 at 12:16:24PM +0100, Juri Lelli wrote:
> On 19/07/17 13:00, Peter Zijlstra wrote:
> > On Wed, Jul 19, 2017 at 10:20:29AM +0100, Juri Lelli wrote:
> > > On 19/07/17 09:21, Peter Zijlstra wrote:
> > > > On Wed, Jul 05, 2017 at 09:59:05AM +0100, Juri Lelli wrote:
> > > > > @@ -115
On Mon, Jul 17, 2017 at 01:33:30PM +0300, Todor Tomov wrote:
> Add DT binding document for Qualcomm Camera subsystem driver.
>
> CC: Rob Herring
> CC: devicet...@vger.kernel.org
> Signed-off-by: Todor Tomov
> ---
> .../devicetree/bindings/media/qcom,camss.txt | 191
>
On 24/07/17 11:29, Suzuki K Poulose wrote:
> Add a helper to map a device node to a logical CPU number to avoid
> duplication. Currently this is open coded in different places (e.g
> gic-v3, coresight). The helper tries to map device node to a "possible"
> logical CPU id, which may not be online
Hi Michal,
[auto build test ERROR on mmotm/master]
[also build test ERROR on v4.13-rc2 next-20170724]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Michal-Hocko/mm-oom-allow-oom-reaper-to-race
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