Re: [PATCH v3] ata: add Amiga Gayle PATA controller driver

On Fri, Mar 16, 2018 at 9:15 AM, Bartlomiej Zolnierkiewicz wrote: > Add Amiga Gayle PATA controller driver. It enables libata support > for the on-board IDE interfaces on some Amiga models (A600, A1200, > A4000 and A4000T) and also for IDE interfaces on the Zorro

Re: [PATCH v3] ata: add Amiga Gayle PATA controller driver

On Fri, Mar 16, 2018 at 9:15 AM, Bartlomiej Zolnierkiewicz wrote: > Add Amiga Gayle PATA controller driver. It enables libata support > for the on-board IDE interfaces on some Amiga models (A600, A1200, > A4000 and A4000T) and also for IDE interfaces on the Zorro expansion > bus (M-Tech E-Matrix

Re: [PATCH v10 1/5] arm64: KVM: Prepare set virtual SEI syndrome value

Hi James, > > Hi Dongjiu Geng, > > On 03/03/18 16:09, Dongjiu Geng wrote: > > Export one API to specify virtual SEI syndrome value for guest, and > > add a helper to get the VSESR_EL2 value. > > This patch adds two helpers that nothing calls... its not big, please merge > it with the patch

Re: [PATCH v10 1/5] arm64: KVM: Prepare set virtual SEI syndrome value

Hi James, > > Hi Dongjiu Geng, > > On 03/03/18 16:09, Dongjiu Geng wrote: > > Export one API to specify virtual SEI syndrome value for guest, and > > add a helper to get the VSESR_EL2 value. > > This patch adds two helpers that nothing calls... its not big, please merge > it with the patch

Re: [PATCH] arm64: rename the function arm64_is_ras_serror() to avoid confusion

Hi James, > Hi gengdongjiu, > > On 26/02/18 16:13, gengdongjiu wrote: > > 2018-02-24 1:58 GMT+08:00 James Morse : > >> On 22/02/18 18:02, Dongjiu Geng wrote: > >>> The RAS SError Syndrome can be Implementation-Defined, > >>> arm64_is_ras_serror() is used to judge whether it

Re: [PATCH] arm64: rename the function arm64_is_ras_serror() to avoid confusion

Hi James, > Hi gengdongjiu, > > On 26/02/18 16:13, gengdongjiu wrote: > > 2018-02-24 1:58 GMT+08:00 James Morse : > >> On 22/02/18 18:02, Dongjiu Geng wrote: > >>> The RAS SError Syndrome can be Implementation-Defined, > >>> arm64_is_ras_serror() is used to judge whether it is RAS SError, but >

Re: [PATCH net-next 05/10] phy: cp110-comphy: 2.5G SGMII mode

Hi Antoine, On Fri, Mar 16, 2018 at 11:33:46AM +0100, Antoine Tenart wrote: > This patch allow the CP100 comphy to configure some lanes in the Should be 'CP110'. > 2.5G SGMII mode. This mode is quite close to SGMII and uses nearly the > same code path. > > Signed-off-by: Antoine Tenart

Re: [PATCH net-next 05/10] phy: cp110-comphy: 2.5G SGMII mode

Hi Antoine, On Fri, Mar 16, 2018 at 11:33:46AM +0100, Antoine Tenart wrote: > This patch allow the CP100 comphy to configure some lanes in the Should be 'CP110'. > 2.5G SGMII mode. This mode is quite close to SGMII and uses nearly the > same code path. > > Signed-off-by: Antoine Tenart

[RFC PATCH] ext2, dax: ext2_dax_aops can be static

Fixes: 97affa6a9d1c ("ext2, dax: introduce ext2_dax_aops") Signed-off-by: Fengguang Wu --- inode.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c index 9590712..8ea394c8 100644 --- a/fs/ext2/inode.c +++

[RFC PATCH] ext2, dax: ext2_dax_aops can be static

Fixes: 97affa6a9d1c ("ext2, dax: introduce ext2_dax_aops") Signed-off-by: Fengguang Wu --- inode.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c index 9590712..8ea394c8 100644 --- a/fs/ext2/inode.c +++ b/fs/ext2/inode.c @@ -989,7 +989,7

Re: [PATCH v6 06/15] ext2, dax: introduce ext2_dax_aops

Hi Dan, I love your patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v4.16-rc5 next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [PATCH v6 06/15] ext2, dax: introduce ext2_dax_aops

Hi Dan, I love your patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v4.16-rc5 next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [PATCH v4.16-rc5 2/2] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

On 18/03/2018, Jason Vas Dias wrote: (should have CC'ed to list, sorry) > On 17/03/2018, Andi Kleen wrote: >> >> That's quite a mischaracterization of the issue. gcc works as intended, >> but the kernel did not correctly supply a indirect call

Re: [PATCH v4.16-rc5 2/2] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

On 18/03/2018, Jason Vas Dias wrote: (should have CC'ed to list, sorry) > On 17/03/2018, Andi Kleen wrote: >> >> That's quite a mischaracterization of the issue. gcc works as intended, >> but the kernel did not correctly supply a indirect call retpoline thunk >> to the vdso, and it just happened

[PATCH V2 1/2] ARM: dts: pfuze3000: update sw1a/vldo4 voltage range

Update sw1a/vldo4's voltage range according to pfuze3000 datasheet(Rev.9.0) from: https://www.nxp.com/docs/en/data-sheet/PF3000.pdf Signed-off-by: Anson Huang Signed-off-by: Robin Gong --- no changes since V1. arch/arm/boot/dts/imx6sx-udoo-neo.dtsi |

[PATCH V2 2/2] regulator: pfuze100: update voltage setting for pfuze3000 sw1a

pfuze3000 datasheet(Rev.9.0) from: https://www.nxp.com/docs/en/data-sheet/PF3000.pdf updates sw1a's voltage range, the settings for 1.450V and 1.475V are replaced with 1.8V and 3.3V: 5b'0 1.450 (SW1B), 1.8 (SW1A/SW1AB) 5b'1 1.475 (SW1B), 3.3 (SW1A/SW1AB) the voltage calculation using

[PATCH V2 2/2] regulator: pfuze100: update voltage setting for pfuze3000 sw1a

pfuze3000 datasheet(Rev.9.0) from: https://www.nxp.com/docs/en/data-sheet/PF3000.pdf updates sw1a's voltage range, the settings for 1.450V and 1.475V are replaced with 1.8V and 3.3V: 5b'0 1.450 (SW1B), 1.8 (SW1A/SW1AB) 5b'1 1.475 (SW1B), 3.3 (SW1A/SW1AB) the voltage calculation using

[PATCH V2 1/2] ARM: dts: pfuze3000: update sw1a/vldo4 voltage range

Update sw1a/vldo4's voltage range according to pfuze3000 datasheet(Rev.9.0) from: https://www.nxp.com/docs/en/data-sheet/PF3000.pdf Signed-off-by: Anson Huang Signed-off-by: Robin Gong --- no changes since V1. arch/arm/boot/dts/imx6sx-udoo-neo.dtsi | 2 +-

[PATCH 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source

On i.MX6SX SabreAuto board, there is external 24MHz clock source for analog clock2, add this clock source to clock tree. Signed-off-by: Anson Huang --- arch/arm/boot/dts/imx6sx-sabreauto.dts | 8 1 file changed, 8 insertions(+) diff --git

[PATCH 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree

i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1. And this lvds2, along with lvds1, can be used to provide external clock source to the internal pll, such as pll4_audio and pll5_video. This patch mainly adds the lvds2 to the clock tree and fix its relationship with pll accordingly.

[PATCH 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source

On i.MX6SX SabreAuto board, there is external 24MHz clock source for analog clock2, add this clock source to clock tree. Signed-off-by: Anson Huang --- arch/arm/boot/dts/imx6sx-sabreauto.dts | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts

[PATCH 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree

i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1. And this lvds2, along with lvds1, can be used to provide external clock source to the internal pll, such as pll4_audio and pll5_video. This patch mainly adds the lvds2 to the clock tree and fix its relationship with pll accordingly.

Re: [PATCH v3 11/16] mmc: tmio: deprecate "toshiba,mmc-wrprotect-disable" DT property

2018-02-08 4:32 GMT+09:00 Wolfram Sang : > On Thu, Jan 18, 2018 at 10:58:36AM +0900, Masahiro Yamada wrote: >> 2018-01-18 1:28 GMT+09:00 Masahiro Yamada : >> > This property is equivalent to "disable-wp" defined in >> >

Re: [PATCH v3 11/16] mmc: tmio: deprecate "toshiba,mmc-wrprotect-disable" DT property

2018-02-08 4:32 GMT+09:00 Wolfram Sang : > On Thu, Jan 18, 2018 at 10:58:36AM +0900, Masahiro Yamada wrote: >> 2018-01-18 1:28 GMT+09:00 Masahiro Yamada : >> > This property is equivalent to "disable-wp" defined in >> > Documentation/devicetree/bindings/mmc/tmio_mmc.txt >> >> This is mistake. >>

RE: [PATCH 2/2] regulator: pfuze100: update voltage setting for pfuze3000 sw1a

Anson Huang Best Regards! > -Original Message- > From: Fabio Estevam [mailto:feste...@gmail.com] > Sent: Sunday, March 18, 2018 2:27 AM > To: Stefan Wahren > Cc: Rob Herring ; Fabio Estevam > ; Mark Rutland

RE: [PATCH 2/2] regulator: pfuze100: update voltage setting for pfuze3000 sw1a

Anson Huang Best Regards! > -Original Message- > From: Fabio Estevam [mailto:feste...@gmail.com] > Sent: Sunday, March 18, 2018 2:27 AM > To: Stefan Wahren > Cc: Rob Herring ; Fabio Estevam > ; Mark Rutland ; Robin > Gong ; Russell King - ARM Linux > ; Anson Huang ; Liam > Girdwood ;

RE: [PATCH 1/2] ARM: dts: pfuze3000: update sw1a/vldo4 voltage range

Anson Huang Best Regards! > -Original Message- > From: Fabio Estevam [mailto:feste...@gmail.com] > Sent: Saturday, March 17, 2018 10:53 PM > To: Anson Huang > Cc: Robin Gong ; Shawn Guo ; > Sascha Hauer

RE: [PATCH 1/2] ARM: dts: pfuze3000: update sw1a/vldo4 voltage range

Anson Huang Best Regards! > -Original Message- > From: Fabio Estevam [mailto:feste...@gmail.com] > Sent: Saturday, March 17, 2018 10:53 PM > To: Anson Huang > Cc: Robin Gong ; Shawn Guo ; > Sascha Hauer ; Fabio Estevam > ; Rob Herring ; Mark Rutland > ; Russell King - ARM Linux ; >

[PATCH] iommu/mediatek: Fix protect memory setting

In MediaTek's IOMMU design, When a iommu translation fault occurs (HW can NOT translate the destination address to a valid physical address), the IOMMU HW output the dirty data into a special memory to avoid corrupting the main memory, this is called "protect memory". the register(0x114) for

[PATCH] iommu/mediatek: Fix protect memory setting

In MediaTek's IOMMU design, When a iommu translation fault occurs (HW can NOT translate the destination address to a valid physical address), the IOMMU HW output the dirty data into a special memory to avoid corrupting the main memory, this is called "protect memory". the register(0x114) for

Re: [PATCH 1/3] x86, pkeys: do not special case protection key 0

On 03/17/2018 04:24 PM, Ram Pai wrote: > So the difference between the two proposals is just the freeing part i.e (b). > Did I get this right? Yeah, I think that's the only difference.

Re: [PATCH 1/3] x86, pkeys: do not special case protection key 0

On 03/17/2018 04:24 PM, Ram Pai wrote: > So the difference between the two proposals is just the freeing part i.e (b). > Did I get this right? Yeah, I think that's the only difference.

Re: [PATCH v2 net 1/2] vmxnet3: avoid xmit reset due to a race in vmxnet3

From: Ronak Doshi Date: Fri, 16 Mar 2018 14:47:54 -0700 > The field txNumDeferred is used by the driver to keep track of the number > of packets it has pushed to the emulation. The driver increments it on > pushing the packet to the emulation and the emulation resets it to 0

Re: [PATCH v2 net 2/2] vmxnet3: use correct flag to indicate LRO feature

From: Ronak Doshi Date: Fri, 16 Mar 2018 14:49:19 -0700 > 'Commit 45dac1d6ea04 ("vmxnet3: Changes for vmxnet3 adapter version 2 > (fwd)")' introduced a flag "lro" in structure vmxnet3_adapter which is > used to indicate whether LRO is enabled or not. However, the patch > did

Re: [PATCH v2 net 1/2] vmxnet3: avoid xmit reset due to a race in vmxnet3

From: Ronak Doshi Date: Fri, 16 Mar 2018 14:47:54 -0700 > The field txNumDeferred is used by the driver to keep track of the number > of packets it has pushed to the emulation. The driver increments it on > pushing the packet to the emulation and the emulation resets it to 0 at > the end of the

Re: [PATCH v2 net 2/2] vmxnet3: use correct flag to indicate LRO feature

From: Ronak Doshi Date: Fri, 16 Mar 2018 14:49:19 -0700 > 'Commit 45dac1d6ea04 ("vmxnet3: Changes for vmxnet3 adapter version 2 > (fwd)")' introduced a flag "lro" in structure vmxnet3_adapter which is > used to indicate whether LRO is enabled or not. However, the patch > did not set the flag and

Re: [PATCH v4 3/8] doc: Add doc for the Ingenic TCU hardware

On 03/17/2018 04:28 PM, Paul Cercueil wrote: > Add a documentation file about the Timer/Counter Unit (TCU) > present in the Ingenic JZ47xx SoCs. > > Signed-off-by: Paul Cercueil > --- > Documentation/mips/00-INDEX| 3 +++ > Documentation/mips/ingenic-tcu.txt | 50

Re: [PATCH v4 3/8] doc: Add doc for the Ingenic TCU hardware

On 03/17/2018 04:28 PM, Paul Cercueil wrote: > Add a documentation file about the Timer/Counter Unit (TCU) > present in the Ingenic JZ47xx SoCs. > > Signed-off-by: Paul Cercueil > --- > Documentation/mips/00-INDEX| 3 +++ > Documentation/mips/ingenic-tcu.txt | 50 >

Re: [PATCH net-next] net: ethernet: ti: cpsw: enable vlan rx vlan offload

From: Grygorii Strashko Date: Thu, 15 Mar 2018 15:15:50 -0500 > In VLAN_AWARE mode CPSW can insert VLAN header encapsulation word on Host > port 0 egress (RX) before the packet data if RX_VLAN_ENCAP bit is set in > CPSW_CONTROL register. VLAN header encapsulation word

Re: [PATCH net-next] net: ethernet: ti: cpsw: enable vlan rx vlan offload

From: Grygorii Strashko Date: Thu, 15 Mar 2018 15:15:50 -0500 > In VLAN_AWARE mode CPSW can insert VLAN header encapsulation word on Host > port 0 egress (RX) before the packet data if RX_VLAN_ENCAP bit is set in > CPSW_CONTROL register. VLAN header encapsulation word has following format: > >

Re: [PATCH v2] net: ethernet: ti: cpsw: add check for in-band mode setting with RGMII PHY interface

From: SZ Lin (林上智) Date: Fri, 16 Mar 2018 00:56:01 +0800 > According to AM335x TRM[1] 14.3.6.2, AM437x TRM[2] 15.3.6.2 and > DRA7 TRM[3] 24.11.4.8.7.3.3, in-band mode in EXT_EN(bit18) register is only > available when PHY is configured in RGMII mode with 10Mbps speed. It will >

Re: [PATCH v2] net: ethernet: ti: cpsw: add check for in-band mode setting with RGMII PHY interface

From: SZ Lin (林上智) Date: Fri, 16 Mar 2018 00:56:01 +0800 > According to AM335x TRM[1] 14.3.6.2, AM437x TRM[2] 15.3.6.2 and > DRA7 TRM[3] 24.11.4.8.7.3.3, in-band mode in EXT_EN(bit18) register is only > available when PHY is configured in RGMII mode with 10Mbps speed. It will > cause some

Re: [PATCH] net: hns: Fix ethtool private flags

From: Matthias Brugger Date: Thu, 15 Mar 2018 17:54:20 +0100 > The driver implementation returns support for private flags, while > no private flags are present. When asked for the number of private > flags it returns the number of statistic flag names. > > Fix this by

Re: [PATCH] net: hns: Fix ethtool private flags

From: Matthias Brugger Date: Thu, 15 Mar 2018 17:54:20 +0100 > The driver implementation returns support for private flags, while > no private flags are present. When asked for the number of private > flags it returns the number of statistic flag names. > > Fix this by returning EOPNOTSUPP for

Re: [PATCH] MAINTAINERS: update maintainers for MTD and SPI NOR subsystems

On 03/15/2018 08:04 PM, Cyrille Pitchen wrote: > remove myself as MTD and SPI NOR maintainer. > > Signed-off-by: Cyrille Pitchen What happened ? > --- > MAINTAINERS | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index

Re: [PATCH] MAINTAINERS: update maintainers for MTD and SPI NOR subsystems

On 03/15/2018 08:04 PM, Cyrille Pitchen wrote: > remove myself as MTD and SPI NOR maintainer. > > Signed-off-by: Cyrille Pitchen What happened ? > --- > MAINTAINERS | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 3bdc260e36b7..7892db9a9494 100644 >

Re: [PATCH v6 15/15] xfs, dax: introduce xfs_break_dax_layouts()

Hi Dan, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.16-rc5] [cannot apply to next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [PATCH v6 15/15] xfs, dax: introduce xfs_break_dax_layouts()

Hi Dan, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.16-rc5] [cannot apply to next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [PATCH v5 3/8] docs: Add Generic Counter interface documentation

On 03/09/2018 10:42 AM, William Breathitt Gray wrote: > This patch adds high-level documentation about the Generic Counter > interface. > > Signed-off-by: William Breathitt Gray > --- > Documentation/driver-api/generic-counter.rst | 321 > +++ >

Re: [PATCH v5 3/8] docs: Add Generic Counter interface documentation

On 03/09/2018 10:42 AM, William Breathitt Gray wrote: > This patch adds high-level documentation about the Generic Counter > interface. > > Signed-off-by: William Breathitt Gray > --- > Documentation/driver-api/generic-counter.rst | 321 > +++ >

Re: [PATCH v4.16-rc5 (2)] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

fixed typo in timer_latency.c affecting only -r printout : $ gcc -DN_SAMPLES=1000 -o timer timer_latency.c CLOCK_MONOTONIC ( using rdtscp_ordered() ) : $ ./timer -m -r 10 sum: 67615 Total time: 0.67615S - Average Latency: 0.00067S N zero deltas: 0 N inconsistent deltas: 0 sum: 51858

Re: [PATCH v4.16-rc5 (2)] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

fixed typo in timer_latency.c affecting only -r printout : $ gcc -DN_SAMPLES=1000 -o timer timer_latency.c CLOCK_MONOTONIC ( using rdtscp_ordered() ) : $ ./timer -m -r 10 sum: 67615 Total time: 0.67615S - Average Latency: 0.00067S N zero deltas: 0 N inconsistent deltas: 0 sum: 51858

[PATCH v4 3/8] doc: Add doc for the Ingenic TCU hardware

Add a documentation file about the Timer/Counter Unit (TCU) present in the Ingenic JZ47xx SoCs. Signed-off-by: Paul Cercueil --- Documentation/mips/00-INDEX| 3 +++ Documentation/mips/ingenic-tcu.txt | 50 ++ 2 files changed, 53

[PATCH v4 6/8] clk: ingenic: Add JZ47xx TCU clocks driver

The TCU (Timer Counter Unit) of the Ingenic JZ47xx SoCs features 8 channels, each one having its own clock, that can be started and stopped, reparented, and reclocked. This driver only modifies the bits of the registers of the TCU that are related to clocks control. It provides one clock per TCU

[PATCH v4 3/8] doc: Add doc for the Ingenic TCU hardware

Add a documentation file about the Timer/Counter Unit (TCU) present in the Ingenic JZ47xx SoCs. Signed-off-by: Paul Cercueil --- Documentation/mips/00-INDEX| 3 +++ Documentation/mips/ingenic-tcu.txt | 50 ++ 2 files changed, 53 insertions(+) create

[PATCH v4 6/8] clk: ingenic: Add JZ47xx TCU clocks driver

The TCU (Timer Counter Unit) of the Ingenic JZ47xx SoCs features 8 channels, each one having its own clock, that can be started and stopped, reparented, and reclocked. This driver only modifies the bits of the registers of the TCU that are related to clocks control. It provides one clock per TCU

[PATCH v4 2/8] dt-bindings: ingenic: Add DT bindings for TCU clocks

This header provides clock numbers for the ingenic,tcu DT binding. Signed-off-by: Paul Cercueil Reviewed-by: Rob Herring --- include/dt-bindings/clock/ingenic,tcu.h | 23 +++ 1 file changed, 23 insertions(+) create mode 100644

[PATCH v4 2/8] dt-bindings: ingenic: Add DT bindings for TCU clocks

This header provides clock numbers for the ingenic,tcu DT binding. Signed-off-by: Paul Cercueil Reviewed-by: Rob Herring --- include/dt-bindings/clock/ingenic,tcu.h | 23 +++ 1 file changed, 23 insertions(+) create mode 100644 include/dt-bindings/clock/ingenic,tcu.h v2:

[PATCH v4 7/8] clocksource: Add a new timer-ingenic driver

This driver will use the TCU (Timer Counter Unit) present on the Ingenic JZ47xx SoCs to provide the kernel with a clocksource and timers. Signed-off-by: Paul Cercueil --- drivers/clocksource/Kconfig | 8 ++ drivers/clocksource/Makefile| 1 +

[PATCH v4 7/8] clocksource: Add a new timer-ingenic driver

This driver will use the TCU (Timer Counter Unit) present on the Ingenic JZ47xx SoCs to provide the kernel with a clocksource and timers. Signed-off-by: Paul Cercueil --- drivers/clocksource/Kconfig | 8 ++ drivers/clocksource/Makefile| 1 +

[PATCH v4 8/8] MAINTAINERS: Add myself as maintainer for Ingenic TCU drivers

Add myself as maintainer for the ingenic-tcu-intc interrupt controller driver, the ingenic-tcu-clocks clock driver, and the ingenic-tcu clocksource driver. Signed-off-by: Paul Cercueil --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) v2: No change v3: No

[PATCH v4 8/8] MAINTAINERS: Add myself as maintainer for Ingenic TCU drivers

Add myself as maintainer for the ingenic-tcu-intc interrupt controller driver, the ingenic-tcu-clocks clock driver, and the ingenic-tcu clocksource driver. Signed-off-by: Paul Cercueil --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) v2: No change v3: No change v4: No change

[PATCH v4 5/8] irqchip: Add the ingenic-tcu-intc driver

This simple driver handles the IRQ chip of the TCU (Timer Counter Unit) of the JZ47xx Ingenic SoCs. Signed-off-by: Paul Cercueil --- drivers/irqchip/Kconfig | 6 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-ingenic-tcu.c | 161

[PATCH v4 5/8] irqchip: Add the ingenic-tcu-intc driver

This simple driver handles the IRQ chip of the TCU (Timer Counter Unit) of the JZ47xx Ingenic SoCs. Signed-off-by: Paul Cercueil --- drivers/irqchip/Kconfig | 6 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-ingenic-tcu.c | 161

[PATCH v4 0/8] Ingenic JZ47xx Timer/Counter Unit drivers

Hi, This is the 4th version of my TCU patchset. The major change is a greatly improved documentation, both in-code and as separate text files, to describe how the hardware works and how the devicetree bindings should be used. There are also cosmetic changes in the irqchip driver, and the

[PATCH v4 1/8] mfd: syscon: Add ingenic-tcu.h header

This header contains macros for the registers that are present in the regmap shared by all the drivers related to the TCU (Timer Counter Unit) of the Ingenic JZ47xx SoCs. Signed-off-by: Paul Cercueil Acked-by: Lee Jones ---

[PATCH v4 0/8] Ingenic JZ47xx Timer/Counter Unit drivers

Hi, This is the 4th version of my TCU patchset. The major change is a greatly improved documentation, both in-code and as separate text files, to describe how the hardware works and how the devicetree bindings should be used. There are also cosmetic changes in the irqchip driver, and the

[PATCH v4 1/8] mfd: syscon: Add ingenic-tcu.h header

This header contains macros for the registers that are present in the regmap shared by all the drivers related to the TCU (Timer Counter Unit) of the Ingenic JZ47xx SoCs. Signed-off-by: Paul Cercueil Acked-by: Lee Jones --- include/linux/mfd/syscon/ingenic-tcu.h | 54

[PATCH v4 4/8] dt-bindings: Add doc for the Ingenic TCU drivers

Add documentation about how to properly use the Ingenic TCU (Timer/Counter Unit) drivers from devicetree. Signed-off-by: Paul Cercueil --- .../bindings/clock/ingenic,tcu-clocks.txt | 42 .../bindings/interrupt-controller/ingenic,tcu.txt | 39

[PATCH v4 4/8] dt-bindings: Add doc for the Ingenic TCU drivers

Add documentation about how to properly use the Ingenic TCU (Timer/Counter Unit) drivers from devicetree. Signed-off-by: Paul Cercueil --- .../bindings/clock/ingenic,tcu-clocks.txt | 42 .../bindings/interrupt-controller/ingenic,tcu.txt | 39 +++

Re: [PATCH 1/3] x86, pkeys: do not special case protection key 0

On Fri, Mar 16, 2018 at 02:46:56PM -0700, Dave Hansen wrote: > > From: Dave Hansen > > mm_pkey_is_allocated() treats pkey 0 as unallocated. That is > inconsistent with the manpages, and also inconsistent with > mm->context.pkey_allocation_map. Stop special casing

Re: [PATCH 1/3] x86, pkeys: do not special case protection key 0

On Fri, Mar 16, 2018 at 02:46:56PM -0700, Dave Hansen wrote: > > From: Dave Hansen > > mm_pkey_is_allocated() treats pkey 0 as unallocated. That is > inconsistent with the manpages, and also inconsistent with > mm->context.pkey_allocation_map. Stop special casing it and only > disallow values

Re: linux-next: build failure after merge of the y2038 tree

I posted the patch. The patch has simple changes. Let me know if maybe posting a new version makes sense. I also needed this patch to build linux-next: commit b784c76bb7c1c440a4ce06a18f4b3a936f33967d Author: Deepa Dinamani Date: Fri Mar 16 20:57:10 2018 -0700

Re: linux-next: build failure after merge of the y2038 tree

I posted the patch. The patch has simple changes. Let me know if maybe posting a new version makes sense. I also needed this patch to build linux-next: commit b784c76bb7c1c440a4ce06a18f4b3a936f33967d Author: Deepa Dinamani Date: Fri Mar 16 20:57:10 2018 -0700 i40iw: add missing irq.h

[PATCH] s390: Use asm/compat.h instead of linux/compat.h

Include asm/compat.h directly for uses of compat_ptr. This includes the compat defines when CONFIG_COMPAT is not on. Also make compat data structure definitions conditional on CONFIG_COMPAT, to remove circular include dependencies in elf.h Cc: David Hildenbrand Cc:

[PATCH] s390: Use asm/compat.h instead of linux/compat.h

Include asm/compat.h directly for uses of compat_ptr. This includes the compat defines when CONFIG_COMPAT is not on. Also make compat data structure definitions conditional on CONFIG_COMPAT, to remove circular include dependencies in elf.h Cc: David Hildenbrand Cc: linux-s...@vger.kernel.org

Re: [PATCH v4.16-rc5 2/2] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

On Sat, Mar 17, 2018 at 02:29:34PM +, jason.vas.d...@gmail.com wrote: > This patch allows compilation to succeed with compilers that support > -DRETPOLINE - > it was kindly contributed by H.J. Liu in GCC Bugzilla: 84908 : >

Re: [PATCH v4.16-rc5 2/2] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

On Sat, Mar 17, 2018 at 02:29:34PM +, jason.vas.d...@gmail.com wrote: > This patch allows compilation to succeed with compilers that support > -DRETPOLINE - > it was kindly contributed by H.J. Liu in GCC Bugzilla: 84908 : >

Re: [PATCH v5 0/2] Remove false-positive VLAs when using max()

On Sat, Mar 17, 2018 at 01:07:32PM -0700, Kees Cook wrote: > On Sat, Mar 17, 2018 at 11:52 AM, Linus Torvalds > wrote: > > So the above is completely insane, bit there is actually a chance that > > using that completely crazy "x -> sizeof(char[x])" conversion

Re: [PATCH v5 0/2] Remove false-positive VLAs when using max()

On Sat, Mar 17, 2018 at 01:07:32PM -0700, Kees Cook wrote: > On Sat, Mar 17, 2018 at 11:52 AM, Linus Torvalds > wrote: > > So the above is completely insane, bit there is actually a chance that > > using that completely crazy "x -> sizeof(char[x])" conversion actually > > helps, because it really

re: [PATCH v4.16-rc5 (2)] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

Hi - I submitted a new stripped-down to bare essentials version of the patch, (see LKML emails with $subject) which passes all checkpatch.pl tests and addresses all concerns raised by reviewers, which uses only rdtsc_ordered(), and which only only updates in vsyscall_gtod_data the new fields:

re: [PATCH v4.16-rc5 (2)] x86/vdso: VDSO should handle clock_gettime(CLOCK_MONOTONIC_RAW) without syscall

Hi - I submitted a new stripped-down to bare essentials version of the patch, (see LKML emails with $subject) which passes all checkpatch.pl tests and addresses all concerns raised by reviewers, which uses only rdtsc_ordered(), and which only only updates in vsyscall_gtod_data the new fields:

Re: [PATCH 0/2] iio: stm32-dfsdm-adc: fix filter & rate setting

On Fri, 16 Mar 2018 10:10:09 +0100 Arnaud Pouliquen wrote: > Hello, > > For the series: > Acked-by: Arnaud Pouliquen Both applied and marked for stable (as I'm not sure exactly when this will hit mainline and it may be after the next merge

Re: [PATCH 0/2] iio: stm32-dfsdm-adc: fix filter & rate setting

On Fri, 16 Mar 2018 10:10:09 +0100 Arnaud Pouliquen wrote: > Hello, > > For the series: > Acked-by: Arnaud Pouliquen Both applied and marked for stable (as I'm not sure exactly when this will hit mainline and it may be after the next merge window) Thanks, Jonathan > > Thanks, > Arnaud > >

Re: [PATCH] iio/accel/kxcjk-1013: Improve unlocking of a mutex in three functions

On Tue, 13 Mar 2018 13:47:20 +0100 SF Markus Elfring wrote: > From: Markus Elfring > Date: Tue, 13 Mar 2018 13:40:12 +0100 > > * Add jump targets so that a call of the function "mutex_unlock" is stored > less often in these

Re: [PATCH] iio/accel/kxcjk-1013: Improve unlocking of a mutex in three functions

On Tue, 13 Mar 2018 13:47:20 +0100 SF Markus Elfring wrote: > From: Markus Elfring > Date: Tue, 13 Mar 2018 13:40:12 +0100 > > * Add jump targets so that a call of the function "mutex_unlock" is stored > less often in these function implementations. > > * Replace eight calls by goto

Re: Plan to move cdc:ad7746 driver out of staging

On Mon, 12 Mar 2018 16:25:52 -0300 Hernán Gonzalez wrote: > Hi, > > This is my plan for moving out the ad7746 driver out of staging. I > have some specific questions that would be really helpful if someone > can point me in the right direction to go. > > 1. Pick up

Re: Plan to move cdc:ad7746 driver out of staging

On Mon, 12 Mar 2018 16:25:52 -0300 Hernán Gonzalez wrote: > Hi, > > This is my plan for moving out the ad7746 driver out of staging. I > have some specific questions that would be really helpful if someone > can point me in the right direction to go. > > 1. Pick up on David's clean-up patch.

Re: linux-next: manual merge of the rtc tree with the asm-generic tree

Hi Alexandre, On Sat, 17 Mar 2018 14:22:52 +0100 Alexandre Belloni wrote: > > I've removed the patch from my tree as there is no point in modifying a > driver that is removed. Thanks for letting me know. -- Cheers, Stephen Rothwell pgpsZMXnkISMY.pgp

Re: linux-next: manual merge of the rtc tree with the asm-generic tree

Hi Alexandre, On Sat, 17 Mar 2018 14:22:52 +0100 Alexandre Belloni wrote: > > I've removed the patch from my tree as there is no point in modifying a > driver that is removed. Thanks for letting me know. -- Cheers, Stephen Rothwell pgpsZMXnkISMY.pgp Description: OpenPGP digital signature

[RFC PATCH 3/3] drm: bridge: lvds-encoder: on request, override the bus format

If the bridge changes the bus format, allow this to be described in the bridge, instead of providing false information about the bus format of the panel itself. Signed-off-by: Peter Rosin --- .../bindings/display/bridge/lvds-transmitter.txt | 8

[RFC PATCH 3/3] drm: bridge: lvds-encoder: on request, override the bus format

If the bridge changes the bus format, allow this to be described in the bridge, instead of providing false information about the bus format of the panel itself. Signed-off-by: Peter Rosin --- .../bindings/display/bridge/lvds-transmitter.txt | 8

[RFC PATCH 2/3] drm: bridge: panel: allow override of the bus format

Useful if the bridge does some kind of conversion of the bus format. Signed-off-by: Peter Rosin --- drivers/gpu/drm/bridge/panel.c | 22 +- include/drm/drm_bridge.h | 1 + 2 files changed, 22 insertions(+), 1 deletion(-) diff --git

[RFC PATCH 1/3] dt-bindings: display: bridge: lvds-transmitter: add ti,ds90c185

Start list of actual chips compatible with "lvds-encoder". Signed-off-by: Peter Rosin --- .../devicetree/bindings/display/bridge/lvds-transmitter.txt | 5 + 1 file changed, 5 insertions(+) diff --git

[RFC PATCH 0/3] allow override of bus format in bridges

I'm trying to get something to work that I assumed would not need patches, so I think I might be missing something completely obvious... I have an Atmel sama5d31 hooked up to an lvds encoder and then on to an lvds panel. Which seems like something that has been done one or two times before...

[RFC PATCH 2/3] drm: bridge: panel: allow override of the bus format

Useful if the bridge does some kind of conversion of the bus format. Signed-off-by: Peter Rosin --- drivers/gpu/drm/bridge/panel.c | 22 +- include/drm/drm_bridge.h | 1 + 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/panel.c

[RFC PATCH 1/3] dt-bindings: display: bridge: lvds-transmitter: add ti,ds90c185

Start list of actual chips compatible with "lvds-encoder". Signed-off-by: Peter Rosin --- .../devicetree/bindings/display/bridge/lvds-transmitter.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-transmitter.txt

[RFC PATCH 0/3] allow override of bus format in bridges

I'm trying to get something to work that I assumed would not need patches, so I think I might be missing something completely obvious... I have an Atmel sama5d31 hooked up to an lvds encoder and then on to an lvds panel. Which seems like something that has been done one or two times before...

Re: [PATCH v6 11/15] mm, fs, dax: handle layout changes to pinned dax mappings

Hi Dan, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.16-rc5 next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [PATCH v6 11/15] mm, fs, dax: handle layout changes to pinned dax mappings

Hi Dan, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.16-rc5 next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

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