On Tue 22 May 23:05 PDT 2018, Vinod wrote:
> On 22-05-18, 22:20, Bjorn Andersson wrote:
>
> > +static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
> > +{
> > + int ret;
> > + u32 val;
> > + int i;
> > +
> > + /* Assert resets, stop core */
> > + val = readl(wcss->reg_base + QDSP6SS_RESET
Hi Rob,
On Tue, 22 May 2018 at 17:09, Rob Herring wrote:
> On Tue, May 22, 2018 at 11:01:23AM +0100, Michel Pollet wrote:
> > The Renesas RZ/N1 Family (Part #R9A06G0xx) requires a driver
> > to provide the SoC clock infrastructure for Linux.
> >
> > This documents the driver bindings.
> >
> > Si
On Tue, May 22, 2018 at 04:16:24PM +0100, Adam Thomson wrote:
> For supply registration, provide fwnode pointer of the port device,
> via the power_supply_config structure, to allow other psy drivers
> to add us as a supplier. At present this only applies to DT
> based platforms using the 'power-su
On 2018/5/23 14:05, Leon Romanovsky wrote:
> On Thu, May 17, 2018 at 04:02:50PM +0800, Wei Hu (Xavier) wrote:
>> This patch modified uar allocation algorithm in hns_roce_uar_alloc
>> function to avoid bitmap exhaust.
>>
>> Signed-off-by: Wei Hu (Xavier)
>> ---
>> drivers/infiniband/hw/hns/hns_r
On Tue, May 22, 2018 at 04:16:23PM +0100, Adam Thomson wrote:
> To allow users of the power supply framework to be hw description
> agnostic, this commit adds the ability to pass a fwnode pointer,
> via the power_supply_config structure, to the initialisation code
> of the core, instead of explicit
From: Finley Xiao
This driver is modified to support PX30 SoC.
Signed-off-by: Finley Xiao
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rock
From: Finley Xiao
Add binding documentation for the power domains
found on Rockchip PX30 SoCs.
Signed-off-by: Finley Xiao
Signed-off-by: Elaine Zhang
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/device
From: Finley Xiao
According to a description from TRM, add all the power domains.
Signed-off-by: Finley Xiao
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/px30-power.h | 27 +++
1 file changed, 27 insertions(+)
create mode 100644 include/dt-bindings/power/
Hi Joel,
On 22/05/18 16:50, Joel Fernandes (Google) wrote:
> Currently there is a race in schedutil code for slow-switch single-CPU
> systems. Fix it by enforcing ordering the write to work_in_progress to
> happen before the read of next_freq.
>
> Kthread Sch
Add binding documentation for the power domains
found on Rockchip RK3228 SoCs.
Signed-off-by: Elaine Zhang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/rockc
This driver is modified to support RK3228 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 99a2dd8a7801..90dcd5e21a
According to a description from TRM, add all the power domains.
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3228-power.h | 21 +
1 file changed, 21 insertions(+)
create mode 100644 include/dt-bindings/power/rk3228-power.h
diff --git a/include/dt-bindings/pow
This driver is modified to support RK3128 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 01d4ba26a054..99a2dd8a7801 1
Add binding documentation for the power domains
found on Rockchip RK3128 SoCs.
Signed-off-by: Elaine Zhang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/rockc
On Tue, 22 May 2018 at 19:44, Geert Uytterhoeven
wrote:
> Hi Michel,
> On Tue, May 22, 2018 at 12:01 PM, Michel Pollet
> wrote:
> > This adds the constants necessary to use the renesas,rzn1-clocks driver.
> >
> > Signed-off-by: Michel Pollet
> Thanks for your patch!
> > ---
> > include/dt-b
According to a description from TRM, add all the power domains.
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3128-power.h | 14 ++
1 file changed, 14 insertions(+)
create mode 100644 include/dt-bindings/power/rk3128-power.h
diff --git a/include/dt-bindings/power/rk31
From: Caesar Wang
According to a description from TRM, add all the power domains.
Signed-off-by: Caesar Wang
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3036-power.h | 13 +
1 file changed, 13 insertions(+)
create mode 100644 include/dt-bindings/power/rk3036-power
From: Caesar Wang
This driver is modified to support RK3036 SoC.
Signed-off-by: Caesar Wang
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/
From: Finley Xiao
Solve the pd could only ever turn off but never turn them on again,
If the pd registers have the writemask bits.
Fix up the code error for commit:
commit 79bb17ce8edb3141339b5882e372d0ec7346217c
Author: Elaine Zhang
Date: Fri Dec 23 11:47:52 2016 +080
From: Caesar Wang
Add binding documentation for the power domains
found on Rockchip RK3036 SoCs.
Signed-off-by: Caesar Wang
Signed-off-by: Elaine Zhang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --g
add power domain support for RK3036/RK3128/RK3228/PX30 Soc.
fix up the wrong value when set power domain up.
Change in V2:
Fix up the commit message description and Assign author.
Change in V3:
[PATCH 01/13]: The Copyright description use SPDX tag instead.
[PATCH 05/13]: The Copyright description
From: "Joel Fernandes (Google)"
rcu_seq_snap may be tricky to decipher. Lets document how it works with
an example to make it easier.
Signed-off-by: Joel Fernandes (Google)
---
kernel/rcu/rcu.h | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git
From: "Joel Fernandes (Google)"
There's no need to keep checking the same starting node for whether a
grace period is in progress as we advance up the funnel lock loop. Its
sufficient if we just checked it in the start, and then subsequently
checked the internal nodes as we advanced up the combin
On 2018/5/23 14:17, Leon Romanovsky wrote:
> On Thu, May 17, 2018 at 04:02:53PM +0800, Wei Hu (Xavier) wrote:
>> This patch fixed the potential illegal operation when using the
>> extend sge buffer cross page in post send operation. The bug
>> will cause the calltrace.
>>
>> Reported-by: Jie Chen
From: "Joel Fernandes (Google)"
RCU tasks callbacks can take at least 1 second before the callbacks are
executed. This happens even if the hold-out tasks enter their quiescent states
quickly. I noticed this when I was testing trampoline callback execution.
To test the trampoline freeing, I wrote
From: "Joel Fernandes (Google)"
The funnel locking loop in rcu_start_this_gp uses rcu_root as a
temporary variable while walking the combining tree. This causes a
tiresome exercise of a code reader reminding themselves that rcu_root
may not be root. Lets just call it rnp, and rename other variabl
Hi Paul,
Here's an updated series for rcu/dev addressing some of your comments along
with the performance optimization. I also threw in the RCU-tasks speed up
patch again, hopefully that doesn't annoy you :)
cheers,
- Joel
Joel Fernandes (Google) (4):
rcu: Speed up calling of RCU tasks callba
From: Jens Axboe
No functional changes in this patch, just a prep patch for utilizing
this in an IO scheduler.
Signed-off-by: Jens Axboe
---
block/blk-mq-sched.c | 34 --
include/linux/blk-mq.h | 3 ++-
2 files changed, 26 insertions(+), 11 deletions(-)
diff
Hi Jens
This is the second version patchset to make the kyber io scheduler more firendly
with merging.
Most of time, kyber io scheduler will not leave any requests in ctx rq_list,
this is because even if tokens of one domain is used up, kyber will try to
dispatch requests from other domain and fl
Currently, kyber is very unfriendly with merging. kyber depends
on ctx rq_list to do merging, however, most of time, it will not
leave any requests in ctx rq_list. This is because even if tokens
of one domain is used up, kyber will try to dispatch requests
from other domain and flush the rq_list th
On Tue, 22 May 2018 16:50:55 +0200
Christophe LEROY wrote:
> Le 22/05/2018 à 16:38, Nicholas Piggin a écrit :
> > On Tue, 22 May 2018 16:02:56 +0200 (CEST)
> > Christophe Leroy wrote:
> >
> >> Commit a7a9dcd882a67 ("powerpc: Avoid taking a data miss on every
> >> userspace instruction miss")
Hi Boris,
On Wed, May 23, 2018 at 8:20 AM, Boris Brezillon
wrote:
> On Tue, 22 May 2018 17:07:53 +0200
> Geert Uytterhoeven wrote:
>
>> The comment about offset zero was not updated when changing behavior:
>> - Automatic offset calculation is indicated by OFFSET_CONTINUOUS,
>> - Zero really
GPC is in always-on domain, it never lost its
content during suspend/resume, so no need to
do save/restore for it during suspend/resume.
Signed-off-by: Anson Huang
---
drivers/irqchip/irq-imx-gpcv2.c | 41 -
1 file changed, 41 deletions(-)
diff --git a/dr
On Sun 13 May 00:01 PDT 2018, Rohit kumar wrote:
> This adds Qualcomm ADSP PIL driver support for SDM845 with ADSP bootup
> and shutdown operation handled from Application Processor SubSystem(APSS).
>
> Signed-off-by: Rohit kumar
> Signed-off-by: RajendraBabu Medisetti
> Signed-off-by: Krishnam
Hi Linus,
This fix seemingly builds fine for me locally:
[for-mfd-fixes]$ ls -l build-x86/drivers/mfd/cros_ec_spi.o
-rw-rw-r-- 1 lee lee 39880 May 23 06:59 build-x86/drivers/mfd/cros_ec_spi.o
[for-mfd-fixes]$ ls -l build-multi-v7/drivers/mfd/cros_ec_spi.o
-rw-rw-r-- 1 lee lee 10032 May 23
Implement adjust_link function that allows to overwrite default CPU port
setting using fixed-link device tree subnode.
Signed-off-by: Michal Vokáč
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
Changes in v3:
- none
Changes in v2:
- Add "Reviewed-by" tags from Andrew and Florian.
The current implementation will leak a byte to the log via memmove. The
specified 27 bytes are off-by-one, as the payload is 25 bytes, and the
termination character is only one byte large. To avoid this, factor out
the error message, and furthermore make the second parameter of the
append_entry fun
Add support for the four-port variant of the Qualcomm QCA833x switch.
Signed-off-by: Michal Vokáč
Reviewed-by: Andrew Lunn
---
Changes in v3:
- Add "Reviewed-by" tag from Andrew
Changes in v2:
- Add commit message
drivers/net/dsa/qca8k.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/d
On Wed, May 23, 2018 at 02:15:48PM +0800, Wei Hu (Xavier) wrote:
>
>
> On 2018/5/23 14:09, Wei Hu (Xavier) wrote:
> >
> > On 2018/5/23 13:49, Leon Romanovsky wrote:
> >> On Thu, May 17, 2018 at 04:02:51PM +0800, Wei Hu (Xavier) wrote:
> >>> This patch increases checking CMQ status timeout value and
When a port is brought up/down do not enable/disable only the TXMAC
but the RXMAC as well. This is essential for the CPU port to work.
Fixes: 6b93fb46480a ("net-next: dsa: add new driver for qca8xxx family")
Signed-off-by: Michal Vokáč
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
This series basically adds support for a QCA8334 ethernet switch to the
qca8k driver. It is a four-port variant of the already supported seven
port QCA8337. Register map is the same for the whole familly and all chips
have the same device ID.
Major part of this series enhances the CPU port setting
Replace the GPLv2 license boilerplate with the SPDX license identifier.
Signed-off-by: Michal Vokáč
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
Changes in v3:
- none
Changes in v2:
- Add commit message.
- Add "Reviewed-by" tags from Andrew and Florian.
drivers/net/dsa/qca8k
By default autonegotiation is enabled to configure MAC on all ports.
For the CPU port autonegotiation can not be used so we need to set
some sensible defaults manually.
This patch forces the default setting of the CPU port to 1000Mbps/full
duplex which is the chip maximum capability.
Also correct
On Tue, 22 May 2018 17:07:53 +0200
Geert Uytterhoeven wrote:
> The comment about offset zero was not updated when changing behavior:
> - Automatic offset calculation is indicated by OFFSET_CONTINUOUS,
> - Zero really means offset zero.
>
> Fixes: b175d03dd2072836 ("[PATCH] mtd cmdlinepart: a
Add support for the four-port variant of the Qualcomm QCA833x switch.
The CPU port default link settings can be reconfigured using
a fixed-link sub-node.
Signed-off-by: Michal Vokáč
Reviewed-by: Rob Herring
Reviewed-by: Andrew Lunn
---
Changes in v3:
- Correct fixed-link node documentation te
Fix warning reported by checkpatch.
Signed-off-by: Michal Vokáč
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
Changes in v3:
- none
Changes in v2:
- Fix typo in subject.
- Add "Reviewed-by" tags from Andrew and Florian.
drivers/net/dsa/qca8k.c | 2 +-
1 file changed, 1 insert
On Thu, May 17, 2018 at 04:02:53PM +0800, Wei Hu (Xavier) wrote:
> This patch fixed the potential illegal operation when using the
> extend sge buffer cross page in post send operation. The bug
> will cause the calltrace.
>
> Reported-by: Jie Chen
> Reported-by: Xiping Zhang (Francis)
> Fixes: b1
On 18-05-18, 00:07, Bjorn Andersson wrote:
> diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c
> index 5897af7d3355..3f35098b71b1 100644
> --- a/drivers/pci/dwc/pcie-qcom.c
> +++ b/drivers/pci/dwc/pcie-qcom.c
> @@ -1088,6 +1088,8 @@ static int qcom_pcie_host_init(struct pcie_p
On 2018/5/23 14:09, Wei Hu (Xavier) wrote:
>
> On 2018/5/23 13:49, Leon Romanovsky wrote:
>> On Thu, May 17, 2018 at 04:02:51PM +0800, Wei Hu (Xavier) wrote:
>>> This patch increases checking CMQ status timeout value and
>>> uses the same value with NIC driver to avoid deficiency of
>>> time.
>>>
On Tue, May 22, 2018 at 8:00 PM, Maxime Ripard
wrote:
> On Tue, May 22, 2018 at 06:52:28PM +0530, Jagan Teki wrote:
>> Amarula A64-Relic is Allwinner A64 based IoT device, which support
>> - Allwinner A64 Cortex-A53
>> - Mali-400MP2 GPU
>> - AXP803 PMIC
>> - 1GB DDR3 RAM
>> - 8GB eMMC
>> - AP6330
On 05/23/2018 07:00 AM, Takashi Sakamoto wrote:
Hi,
On May 14 2018 15:27, Oleksandr Andrushchenko wrote:
> diff --git a/sound/xen/xen_snd_front_alsa.c
b/sound/xen/xen_snd_front_alsa.c
> new file mode 100644
> index ..5041f83e98d2
> --- /dev/null
> +++ b/sound/xen/xen_snd_front_alsa
Rajendra, Jon,
On 23 May 2018 at 06:51, Rajendra Nayak wrote:
>
>
> On 05/23/2018 02:25 AM, Jon Hunter wrote:
>>
>> On 22/05/18 15:47, Ulf Hansson wrote:
>>> [...]
>>>
>
> +/**
> + * genpd_dev_pm_attach_by_id() - Attach a device to one of its PM domain.
> + * @dev: Device to attac
On 2018/5/23 13:49, Leon Romanovsky wrote:
> On Thu, May 17, 2018 at 04:02:51PM +0800, Wei Hu (Xavier) wrote:
>> This patch increases checking CMQ status timeout value and
>> uses the same value with NIC driver to avoid deficiency of
>> time.
>>
>> Signed-off-by: Wei Hu (Xavier)
>> ---
>> drive
On Thu, May 17, 2018 at 04:02:50PM +0800, Wei Hu (Xavier) wrote:
> This patch modified uar allocation algorithm in hns_roce_uar_alloc
> function to avoid bitmap exhaust.
>
> Signed-off-by: Wei Hu (Xavier)
> ---
> drivers/infiniband/hw/hns/hns_roce_device.h | 1 +
> drivers/infiniband/hw/hns/hns_
On 22-05-18, 22:20, Bjorn Andersson wrote:
> +static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
> +{
> + int ret;
> + u32 val;
> + int i;
> +
> + /* Assert resets, stop core */
> + val = readl(wcss->reg_base + QDSP6SS_RESET_REG);
> + val |= Q6SS_CORE_ARES | Q6SS_BUS_ARES_E
No functional changes.
Signed-off-by: Zhen Lei
---
drivers/iommu/dma-iommu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
index ddcbbdb..4e885f7 100644
--- a/drivers/iommu/dma-iommu.c
+++ b/drivers/iommu/dm
On Tue, May 22, 2018 at 02:45:00PM -0600, Shuah Khan wrote:
> On 05/21/2018 03:10 PM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.16.11 release.
> > There are 110 patches in this series, all will be posted as a response
> > to this one. If anyone has any is
Hi, Stu:
On Wed, 2018-05-23 at 10:25 +0800, Stu Hsieh wrote:
> This patch add the connection from OD1 to RDMA1 for ext path.
>
I would like to apply this patch before the patch 'Add support for
mediatek SOC MT2712' because this patch is necessary for mt2712.
Regards,
CK
> Signed-off-by: Stu Hs
On 23-05-18, 00:14, Dmitry Osipenko wrote:
> Tegra20-cpufreq driver missed enabling the CPU clocks. This results in a
> clock-enable refcount disbalance on PLL_P <-> PLL_X reparent, causing
> PLL_X to get disabled while it shouldn't. Fix this by enabling the clocks
> on the driver probe.
>
> Signe
On Tue, 22 May 2018, Brian Norris wrote:
> Commit 001dde9400d5 ("mfd: cros ec: spi: Fix "in progress" error
> signaling") pointed out some bad code, but its analysis and conclusion
> was not 100% correct.
>
> It *is* correct that we should not propagate result==EC_RES_IN_PROGRESS
> for transport
On 22-05-18, 16:13, Taniya Das wrote:
> On 5/22/2018 12:36 AM, skan...@codeaurora.org wrote:
> > On 2018-05-21 02:01, Viresh Kumar wrote:
> > > On 19-05-18, 23:04, Taniya Das wrote:
> > > > + /* Make sure the write goes through before proceeding */
> > > > + mb();
> > >
> > > Btw what happe
On Thu, May 17, 2018 at 04:02:51PM +0800, Wei Hu (Xavier) wrote:
> This patch increases checking CMQ status timeout value and
> uses the same value with NIC driver to avoid deficiency of
> time.
>
> Signed-off-by: Wei Hu (Xavier)
> ---
> drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 2 +-
> 1 file
On 22-05-18, 14:31, Rob Herring wrote:
> On Sat, May 19, 2018 at 11:04:50PM +0530, Taniya Das wrote:
> > + freq-domain-0 {
> > + compatible = "cpufreq";
> > + reg = <0x17d43920 0x4>,
> > +<0x17d43110 0x500>,
> > +
On 22-05-18, 14:07, Sudeep Holla wrote:
> On Tue, May 22, 2018 at 02:29:45PM +0300, Ilia Lin wrote:
> > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
> > the CPU frequency subset and voltage value of each OPP varies
> > based on the silicon variant in use. Qualcomm Proces
On May 23, 2018, at 4:32 AM, Laurent Pinchart
wrote:
Hello,
Thank you for the patch.
On Wednesday, 9 May 2018 05:13:08 EEST ming_q...@realsil.com.cn wrote:
From: ming_qian
The length of UVC 1.5 video control is 48, and it id 34 for UVC 1.1.
Change it to 48 for UVC 1.5 device,
and the UV
On 22-05-18, 15:42, Daniel Lezcano wrote:
> On 21/05/2018 12:32, Viresh Kumar wrote:
> > On 18-05-18, 16:50, Daniel Lezcano wrote:
> >> Initially, the cpu_cooling device for ARM was changed by adding a new
> >> policy inserting idle cycles. The intel_powerclamp driver does a
> >> similar action.
>
Hi Steve,
On Wed, May 16, 2018 at 11:00:12AM -0400, Steven Rostedt wrote:
> A few people have asked for this in the past, and I finally got around
> to implementing it. What this does is to allow writes into trace_marker
> to initiate a trigger.
>
> The trace_marker event is described in:
>
> t
On 22-05-18, 10:27, Frank Mori Hess wrote:
> On Mon, May 21, 2018 at 11:37 PM, Vinod Koul wrote:
> >
> > Well looks like even adding support for sync_pause doesn't solve your issue
> > on
> > pl330. Do you want to move this to PIO mode then..?
The issue for which you requested the revert of pl33
Hi Stan,
On 2018-05-23 02:27, Stanimir Varbanov wrote:
Hi Jordan,
On 22.05.2018 22:50, Jordan Crouse wrote:
On Tue, May 22, 2018 at 04:04:51PM +0300, Stanimir Varbanov wrote:
Hi Vikash,
On 05/17/2018 02:32 PM, Vikash Garodia wrote:
In order to invoke scm calls, ensure that the platform
has
In atomisp_csi2_set_ffmt(), there is no reason to have
"#ifndef ISP2401" condition since code is identical in ifndef and
else sections. Hence remove redudent checks.
Signed-off-by: Pankaj Bharadiya
---
drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c | 8
1 file changed, 8 dele
Assignment asd = &isp->asd[i] can never be null hence remove
redundent check.
Signed-off-by: Pankaj Bharadiya
---
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20
In sh_css_config_input_network(), "stream" is being dereferenced
before it is null checked.
Fix it by moving the "stream" pointer dereference after it has been
properly null checked.
Signed-off-by: Pankaj Bharadiya
---
drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c | 3 ++-
1 file c
In verify_copy_out_frame_format(), "pipe" is being dereferenced before
it is null checked.
Fix it by moving the "pipe" pointer dereference after it has been
properly null checked.
Signed-off-by: Pankaj Bharadiya
---
drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c | 4 +++-
1 file cha
In ia_css_pipe_get_primary_binarydesc(), "pipe" is being dereferenced
before it is null checked.
Fix it by moving the "pipe" pointer dereference after it has been
properly null checked.
Signed-off-by: Pankaj Bharadiya
---
.../atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c | 3
Local variable "requeue" is assigned only once to a constant "false"
value so "if(requeue)" condition will never be true.
Thus remove it.
Signed-off-by: Pankaj Bharadiya
---
drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c | 14 --
1 file changed, 14 deletions(-)
diff --git
This patch series fixes some of the issues reported by static analysis
tool.
Pankaj Bharadiya (6):
media: staging: atomisp: remove redundent check
media: staging: atomisp: Remove useless if statement
media: staging: atomisp: Remove useless "ifndef ISP2401"
media: staging: atomisp: Fix pote
Hi, Stu:
I've some inline comment.
On Wed, 2018-05-23 at 10:25 +0800, Stu Hsieh wrote:
> This patch add support for the Mediatek MT2712 DISP subsystem.
> There are two OVL engine and three disp output in MT2712.
>
> Signed-off-by: Stu Hsieh
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c |
On 05/23/2018 12:15 AM, Dan Williams wrote:
OK. How about this:
diff --git a/include/linux/nospec.h b/include/linux/nospec.h
index e791ebc..498995b 100644
--- a/include/linux/nospec.h
+++ b/include/linux/nospec.h
@@ -55,4 +55,21 @@ static inline unsigned long
array_index_mask_nospec(unsigned
In preparation for consolidating all ZONE_DEVICE enabling via
devm_memremap_pages(), teach it how to handle the constraints of
MEMORY_DEVICE_PRIVATE ranges.
Cc: Christoph Hellwig
Cc: "Jérôme Glisse"
Reported-by: Logan Gunthorpe
Signed-off-by: Dan Williams
---
kernel/memremap.c | 38
Commit e8d513483300 "memremap: change devm_memremap_pages interface to
use struct dev_pagemap" refactored devm_memremap_pages() to allow a
dev_pagemap instance to be supplied. Passing in a dev_pagemap interface
simplifies the design of pgmap type drivers in that they can rely on
container_of() to l
Shared between all Hexagon V5 based remoteprocs is the handling of the 5
interrupts and the SMP2P stop request, so break this out into a separate
function in order to allow these drivers to be cleaned up.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/Kconfig | 5 +
drivers/remotepr
Migrate the MSS remoteproc driver to use the newly extracted helper
functions.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/Kconfig | 4 +
drivers/remoteproc/qcom_q6v5_pil.c | 157 +++--
2 files changed, 19 insertions(+), 142 deletions(-)
diff --git a/
Migrate the Hexagon V5 PAS (ADSP) driver to using the newly extracted
helper functions. The use of the handover callback does introduce latent
disabling of proxy resources. But apart from this there should be no
change in functionality.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/Kconf
With the introduction of support for the non-MSA Hexagon WCSS driver from
Sricharan and the non-PAS ADSP driver from Rohit it makes sense to overhaul the
structure of the Qualcomm "Q6V5 drivers".
The first patch is from Sricharan's series and included here for completeness.
The second patch introd
From: Sricharan R
qcom_mdt_load function loads the mdt type firmware and
initialises the secure memory as well. Make the initialisation only
when requested by the caller, so that the function can be used
by self-authenticating remoteproc as well.
Acked-by: Bjorn Andersson
Signed-off-by: Srichar
From: Sricharan R
IPQ8074 has an integrated Hexagon dsp core q6v5 and a wireless lan
(Lithium) IP. An mdt type single image format is used for the
firmware. So the mdt_load function can be directly used to load
the firmware. Also add the relevant resets required for this core.
Signed-off-by: Sri
The devm_memremap_pages() facility is tightly integrated with the
kernel's memory hotplug functionality. It injects an altmap argument
deep into the architecture specific vmemmap implementation to allow
allocating from specific reserved pages, and it has Linux specific
assumptions about page struct
The routines hmm_devmem_add(), and hmm_devmem_add_resource() are small
wrappers around devm_memremap_pages(). The devm_memremap_pages()
interface is a subset of the hmm functionality which has more and deeper
ties into the kernel memory management implementation. It was an
oversight that these symb
The last step before devm_memremap_pages() returns success is to
allocate a release action, devm_memremap_pages_release(), to tear the
entire setup down. However, the result from devm_add_action() is not
checked.
Checking the error from devm_add_action() is not enough. The api
currently relies on
devm semantics arrange for resources to be torn down when
device-driver-probe fails or when device-driver-release completes.
Similar to devm_memremap_pages() there is no need to support an explicit
remove operation when the users properly adhere to devm semantics.
Reviewed-by: Christoph Hellwig
C
Given the fact that devm_memremap_pages() requires a percpu_ref that is
torn down by devm_memremap_pages_release() the current support for
mapping RAM is broken.
This has been broken since forever and there is no use case to map RAM
in this way, so just kill the support and make it an explicit err
Changes since v1: [1]
* Kill support for mapping System RAM as a nop. No one uses this
functionality and it is broken relative to percpu_ref management.
* Fix percpu_ref teardown. Given that devm_memremap_pages() has strict
assumptions about when the percpu_ref is killed, give it
responsibil
On Tue, May 22, 2018 at 10:03 PM, Gustavo A. R. Silva
wrote:
>
>
> On 05/22/2018 03:50 PM, Dan Williams wrote:
Dan,
What do you think about this first draft:
diff --git a/include/linux/nospec.h b/include/linux/nospec.h
index e791ebc..6154183 100644
---
Hi,
On Tue, May 22, 2018 at 6:19 PM, David Collins wrote:
OK, so how's this for a proposal then:
1. For RPMh-regulator whenever we see a "set voltage" but Linux hasn't
specified that the regulator is enabled then we don't send the
voltage, we just cache it.
2. W
On 05/22/2018 03:50 PM, Dan Williams wrote:
Dan,
What do you think about this first draft:
diff --git a/include/linux/nospec.h b/include/linux/nospec.h
index e791ebc..6154183 100644
--- a/include/linux/nospec.h
+++ b/include/linux/nospec.h
@@ -55,4 +55,16 @@ static inline unsigned long
array
On 2018.05.22 09:53:37 -0600, Alex Williamson wrote:
> [Cc +GVT-g maintainers/lists]
>
> On Tue, 22 May 2018 10:13:46 +0200
> Cornelia Huck wrote:
>
> > On Fri, 18 May 2018 13:10:25 -0600
> > Alex Williamson wrote:
> >
> > > When we create an mdev device, we check for duplicates against the
>
On 22-05-18, 04:42, George Cherian wrote:
> Per Section 8.4.7.1.3 of ACPI 6.2, The platform provides performance
> feedback via set of performance counters. To determine the actual
> performance level delivered over time, OSPM may read a set of
> performance counters from the Reference Performance
On 05/23/2018 02:25 AM, Jon Hunter wrote:
>
> On 22/05/18 15:47, Ulf Hansson wrote:
>> [...]
>>
+/**
+ * genpd_dev_pm_attach_by_id() - Attach a device to one of its PM domain.
+ * @dev: Device to attach.
+ * @index: The index of the PM domain.
+ *
+ * Parse dev
On 22.05.2018 22:42, Florian Fainelli wrote:
On 05/22/2018 01:16 PM, Andrew Lunn wrote:
Planned network structure will be as with 4.7.x kernels:
br0 <=> eth0.101 <=> eth0 (vlan 101 tagged) <=> lan 1-lan4 (vlan 101
untagged pvid)
br1 <=> eth0.102 <=> eth0 (vlan 102 tagged) <=> wan (vlan 102 unt
On Wed, May 23, 2018 at 11:11:31AM +0900, Masahiro Yamada wrote:
> It is redundant to pass -DNCURSES_WIDECHAR=1 explicitly; when we use
> 'pkg-config --cflags', it takes care of appropriate flags.
>
> Actually, 'pkg-config --cflags' will add -D_GNU_SOURCE, which will
> define _XOPEN_SOURCE_EXTENDE
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