On Fri, Jun 01, 2018 at 10:06:43PM -0700, sb...@kernel.org wrote:
> From: Stephen Boyd
>
> We only have two users of the debug_init hook, and we recently stopped
> caring about the return value from that op. Finish that off by changing
> the clk_op to return void instead of int because it doesn't
Quoting Viresh Kumar (2018-05-30 03:09:02)
> The OPP binding says:
>
> Property: operating-points-v2
>
> ...
>
> This can contain more than one phandle for power domain
> providers that provide multiple power domains. That is, one
> phandle for each power
Quoting Rajan Vaja (2018-05-03 02:18:30)
> Hi Stephen,
>
> > -Original Message-
> > From: Rajan Vaja
> > Sent: 16 March 2018 05:20 PM
> > To: 'Stephen Boyd'
> > Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Jolly Shah
> > ; Michal Simek ;
> > mturque...@baylibre.com
> > Sub
Quoting Dmitry Osipenko (2018-05-30 08:06:45)
> Kernel should never gate the EMC clock as it causes immediate lockup, so
> removing clk-gate functionality doesn't affect anything. Turning EMC clk
> gate into divider allows to implement glitch-less EMC scaling, avoiding
> reparenting to a backup clo
Quoting Faiz Abbas (2018-05-30 07:11:32)
> diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi
> index bfc82636999c..57b8dc0fe719 100644
> --- a/arch/arm/boot/dts/dra76x.dtsi
> +++ b/arch/arm/boot/dts/dra76x.dtsi
> @@ -11,6 +11,25 @@
> / {
> compatible = "ti,dra762",
Quoting Matti Vaittinen (2018-06-01 03:51:05)
> On Thu, May 31, 2018 at 07:57:53AM -0700, Stephen Boyd wrote:
> > Quoting Rob Herring (2018-05-31 07:07:24)
> > >
> > > I don't think it should. The h/w either has an interrupt controller or
> > > it doesn't. My concern is you added it but nothing us
> -Original Message-
> From: Darren Hart [mailto:dvh...@infradead.org]
> Sent: Friday, June 01, 2018 7:53 PM
> To: Greg KH
> Cc: Vadim Pasternak ; andy.shevche...@gmail.com;
> linux-kernel@vger.kernel.org; platform-driver-...@vger.kernel.org;
> j...@resnulli.us; Michael Shych ;
> ivec..
Quoting Ray Jui (2018-06-01 17:56:07)
> From: Pramod Kumar
>
> Update and add Stingray clock definitions and tables so they match the
> binding document and the latest ASIC datasheet
>
> Signed-off-by: Pramod Kumar
> Signed-off-by: Ray Jui
> ---
Applied to clk-next
Quoting Ray Jui (2018-06-01 17:56:06)
> From: Pramod Kumar
>
> Update Stingray clock binding document to add additional clock entries
> with names matching the latest ASIC datasheet. Also modify a few existing
> entries to make their naming more consistent with the rest of the entries
>
> Signed
Quoting Paul Cercueil (2018-05-20 09:31:16)
> This was broken before, because the AHB1 bus was enabled before the VPU
> clock was ungated, while it must be done afterwards.
>
> Signed-off-by: Paul Cercueil
> ---
Applied to clk-next
Quoting Paul Cercueil (2018-05-20 09:31:13)
> Some clocks need a small delay after being ungated to run stable, as
> using them too soon might result in hardware lockups.
>
> Signed-off-by: Paul Cercueil
> ---
Applied to clk-next
Quoting Mike Looijmans (2018-05-31 07:03:55)
> The si544 driver had a rounding problem that using the result of
> clk_round_rate
> may set the clock to yet another rate, for example:
> clk_round_rate(19500) = 19499
> clk_round_rate(19499) = 19498
>
> Clients would expect that afte
Quoting Paul Cercueil (2018-05-20 09:31:15)
> When the main processor goes idle, by default its clock is stopped.
> However, this also stops the clock of the co-processor.
>
> Here, if the C1CLK clock is enabled, we disable this functionality.
>
> Signed-off-by: Paul Cercueil
> ---
Applied to c
Quoting Paul Cercueil (2018-05-20 09:31:17)
> This is required, as we must not use the AHB1 bus before it is stable.
>
> Signed-off-by: Paul Cercueil
> ---
Applied to clk-next
Quoting Paul Cercueil (2018-05-20 09:31:12)
> Support the clocks which are gated when their gate bit is cleared
> instead of set.
>
> Signed-off-by: Paul Cercueil
> ---
Applied to clk-next
Quoting Paul Cercueil (2018-05-20 09:31:14)
> We now have the means to express the specificities of the OTG clock with
> the common CGU code.
>
> Signed-off-by: Paul Cercueil
> ---
Applied to clk-next
Quoting Stefan Wahren (2018-05-22 05:25:35)
> > +++ b/include/dt-bindings/clock/imx6ul-clock.h
> > @@ -242,20 +242,25 @@
> > #define IMX6UL_CLK_CKO2_PODF 229
> > #define IMX6UL_CLK_CKO2 230
> > #define IMX6UL_CLK_CKO 231
> > +#define IMX6UL_CLK_
Quoting Yisheng Xie (2018-05-31 04:11:14)
> match_string() returns the index of an array for a matching string,
> which can be used instead of open coded variant.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Yisheng Xie
> ---
Applied to clk-next
Quoting Yisheng Xie (2018-05-31 04:11:13)
> match_string() returns the index of an array for a matching string,
> which can be used instead of open coded variant.
>
> Reviewed-by: Eric Anholt
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Eric Anholt
> Cc: Stefan Wahren
> Cc: linux-...@vger
Fixes: 45cad4b6d339 ("gnss: add driver for u-blox receivers")
Signed-off-by: kbuild test robot
---
ubx.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gnss/ubx.c b/drivers/gnss/ubx.c
index ecddfb3..c7dcfdc 100644
--- a/drivers/gnss/ubx.c
+++ b/drivers/gnss/ubx.c
Hi Johan,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.17-rc7 next-20180601]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
Hi Long,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on v4.17-rc6]
[cannot apply to cifs/for-next next-20180601]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
An AMD POGO check in shpchp incorrectly included any device with device ID
0x7458, no matter what the vendor.
Also, use pci_info() instead of dbg() for messages related to OSHP.
They're important enough that they should appear in dmesg.
I intend to include these along with Mika's shpchp updates.
From: Bjorn Helgaas
Use dev_printk() for messages related to requesting control of SHPC hotplug
via the OSHP method.
Signed-off-by: Bjorn Helgaas
---
drivers/pci/hotplug/acpi_pcihp.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/hotplug/acpi_pc
From: Bjorn Helgaas
The fix for an AMD POGO erratum related to SHPC incorrectly identified the
device. The workaround should be applied only for AMD POGO devices, but it
was instead applied to:
- all AMD bridges, and
- all devices from any vendor with device ID 0x7458
Fixes: 53044f357448 (
On Sat, 02 Jun 2018, Herbert Xu wrote:
tbl = bucket_table_alloc(ht, size, GFP_KERNEL);
- if (tbl == NULL)
- return -ENOMEM;
+ if (unlikely(tbl == NULL)) {
+ size = min_t(u16, ht->p.min_size, HASH_MIN_SIZE);
You mean max_t?
Not really. I consider
From: Stephen Boyd
We only have two users of the debug_init hook, and we recently stopped
caring about the return value from that op. Finish that off by changing
the clk_op to return void instead of int because it doesn't matter if
debugfs fails or not.
Cc: Eric Anholt
Cc: David Lechner
Cc: Se
On Fri, 2018-06-01 at 20:35 -0700, Andy Lutomirski wrote:
> On Fri, Jun 1, 2018 at 3:13 PM Rik van Riel wrote:
> >
> > On Fri, 1 Jun 2018 14:21:58 -0700
> > Andy Lutomirski wrote:
> >
> > > Hmm. I wonder if there's a more clever data structure than a
> > > bitmap
> > > that we could be using h
Quoting Geert Uytterhoeven (2018-06-01 12:22:33)
> Hi Stephen,
>
> On Fri, Jun 1, 2018 at 9:20 PM, Stephen Boyd wrote:
> > Quoting Geert Uytterhoeven (2018-05-18 03:58:40)
> >> __of_clk_get() calls of_parse_phandle_with_args(), which rejects
> >> negative indices since commit bd69f73f2c81eed9 ("o
On Fri, Jun 01, 2018 at 09:01:25AM -0700, Davidlohr Bueso wrote:
> Update the test module as such.
>
> Signed-off-by: Davidlohr Bueso
Please drop this patch.
Thanks,
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Fri, Jun 01, 2018 at 09:01:22AM -0700, Davidlohr Bueso wrote:
>
> diff --git a/lib/rhashtable.c b/lib/rhashtable.c
> index 05a4b1b8b8ce..ae17da6f0c75 100644
> --- a/lib/rhashtable.c
> +++ b/lib/rhashtable.c
> @@ -175,7 +175,7 @@ static struct bucket_table *bucket_table_alloc(struct
> rhashtable
Hi,
Looking at the crash some more, it seems that if value_len > PAGE_SIZE
then e_buf->max_size is rounded up nearest page size [1]. If a new
attribute is added with value_len < e_buf->max_size - EA_SIZE(ea) then
no new space is allocated for the attiribute list [2] and this
triggers the KASAN sla
On Sat, Jun 02, 2018 at 04:42:56AM +0100, Al Viro wrote:
> _If_ I'm interpreting that correctly, that should be something like a bitmap
> of attributes to modify + values to set for each. Let's see -
> propagation 1 + 2 bits
> nodev 1 + 1
> noexec 1 + 1
>
On Sat, Jun 02, 2018 at 04:09:14AM +0100, Al Viro wrote:
> On Fri, Jun 01, 2018 at 09:27:43AM +0100, David Howells wrote:
> > Al Viro wrote:
> >
> > > > Instead of overloading this on open having a specific syscalls just
> > > > seems like a much saner idea.
> > >
> > > It's not just mount API;
On Fri, 2018-06-01 at 13:03 -0700, Andy Lutomirski wrote:
>
> Mike, you never did say: do you have PCID on your CPU?
Yes.
> Also, what is
> your workload doing to cause so many switches back and forth between
> init_mm and a task.
pipe-test measures pipe round trip, does nearly nothing but sc
On Fri, Jun 1, 2018 at 6:33 PM, Stephen Rothwell wrote:
> Hi Darrick,
>
> On Fri, 1 Jun 2018 17:59:48 -0700 "Darrick J. Wong"
> wrote:
>>
>> > + if (!dax_enabled) {
>> > - pr_debug("VFS (%s): error: dax support not enabled\n",
>> > - sb->s_id);
>> > +
On Fri, Jun 1, 2018 at 3:13 PM Rik van Riel wrote:
>
> On Fri, 1 Jun 2018 14:21:58 -0700
> Andy Lutomirski wrote:
>
> > Hmm. I wonder if there's a more clever data structure than a bitmap
> > that we could be using here. Each CPU only ever needs to be in one
> > mm's cpumask, and each cpu only
On Fri, Jun 01, 2018 at 09:27:43AM +0100, David Howells wrote:
> Al Viro wrote:
>
> > > Instead of overloading this on open having a specific syscalls just
> > > seems like a much saner idea.
> >
> > It's not just mount API; these can be used independently of that.
> > Think of the uses where yo
Hi Anson,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on shawnguo/for-next]
[also build test ERROR on v4.17-rc7 next-20180601]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
Currently we show event_count instead of wakeup_count as part of per
device wakeup_count sysfs attribute. Change it to wakeup_count to make
it more meaningful.
Signed-off-by: Ravi Chandra Sadineni
---
drivers/base/power/sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
On Wed, 2018-05-30 at 17:03 +0530, Rajneesh Bhardwaj wrote:
> On Wed, May 30, 2018 at 03:53:12AM -0700, David E. Box wrote:
>
> Hi Dave,
>
> > Hi Rajneesh,
> >
> > On Mon, 2018-05-28 at 12:30 +0530, Rajneesh Bhardwaj wrote:
> > > On Thu, May 24, 2018 at 06:10:56PM -0700, David E. Box wrote:
> >
Add the QCOM RPMh regulator driver to manage PMIC regulators
which are controlled via RPMh on some Qualcomm Technologies, Inc.
SoCs. RPMh is a hardware block which contains several
accelerators which are used to manage various hardware resources
that are shared between the processors of the SoC.
This patch series adds a driver and device tree binding documentation for
PMIC regulator control via Resource Power Manager-hardened (RPMh) on some
Qualcomm Technologies, Inc. SoCs such as SDM845. RPMh is a hardware block
which contains several accelerators which are used to manage various
hardwar
Introduce bindings for RPMh regulator devices found on some
Qualcomm Technlogies, Inc. SoCs. These devices allow a given
processor within the SoC to make PMIC regulator requests which
are aggregated within the RPMh hardware block along with requests
from other processors in the SoC to determine th
Hi Darrick,
On Fri, 1 Jun 2018 17:59:48 -0700 "Darrick J. Wong"
wrote:
>
> > + if (!dax_enabled) {
> > - pr_debug("VFS (%s): error: dax support not enabled\n",
> > - sb->s_id);
> > + pr_debug("%s: error: dax support not enabled\n",
> > +
This compatible property was documented before the driver was renamed to
"SBS" (see commit e57f1b68c406 ("devicetree-bindings: Propagate
bq20z75->sbs rename to dt bindings")). The driver has continued to
support this property as an alternative to "sbs,sbs-battery", and
because we've noticed there a
This driver was originally submitted for the TI BQ20Z75 battery IC
(commit a7640bfa10c5 ("power_supply: Add driver for TI BQ20Z75 gas gauge
IC")) and later renamed to express generic SBS support. While it's
mostly true that this driver implemented a standard SBS command set, it
takes liberties with
- On May 31, 2018, at 1:51 PM, Joel Fernandes, Google
j...@joelfernandes.org wrote:
>> I find it odd to have a "return" in a macro that consists of a
>> do { } while (0). I'm tempted to replace "return" by "break" here,
>> to break the macro do/while (0) loop.
>
> "return;" is also used from
Call pm_wakeup_event on every irq. This should help us in identifying if
keyboard was a potential wake reason for the last resume.
Signed-off-by: Ravi Chandra Sadineni
---
V2: Increment the wakeup count only when there is a irq and not when the
method is called internally.
drivers/input/serio/i8
On 6/1/2018 9:59 AM, Konrad Rzeszutek Wilk wrote:
Hi Konrad,
Thanks for doing this. It was on my to-do list to get this
support out after everything settled down.
Just some questions/comments below.
> The AMD document outlining the SSBD handling
> 124441_AMD64_SpeculativeStoreBypassDisable_Whi
On Fri, Jun 01, 2018 at 06:58:46PM +1000, Stephen Rothwell wrote:
> Hi Dan,
>
> Today's linux-next merge of the nvdimm tree got a conflict in:
>
> drivers/dax/super.c
>
> between commits:
>
> ba23cba9b3bd ("fs: allow per-device dax status checking for filesystems")
> 80660f20252d ("dax: c
From: Pramod Kumar
Update Stingray clock binding document to add additional clock entries
with names matching the latest ASIC datasheet. Also modify a few existing
entries to make their naming more consistent with the rest of the entries
Signed-off-by: Pramod Kumar
Signed-off-by: Ray Jui
---
This patch series updates Broadcom Stingray clock entries so they match the
latest ASIC datasheet
This patch series is based off v4.17-rc5 and is available on GIHUB:
repo: https://github.com/Broadcom/arm64-linux.git
branch: sr-clk-v3
Changes since v2:
- Move dt-binding header change to the same
From: Pramod Kumar
Update clock output names in the Stingray clock DT nodes so they match
the binding document and the latest ASIC datasheet. Also add entries
for LCPLL2
Signed-off-by: Pramod Kumar
Signed-off-by: Ray Jui
---
.../boot/dts/broadcom/stingray/stingray-clock.dtsi | 26
From: Pramod Kumar
Update and add Stingray clock definitions and tables so they match the
binding document and the latest ASIC datasheet
Signed-off-by: Pramod Kumar
Signed-off-by: Ray Jui
---
drivers/clk/bcm/clk-sr.c | 135 +--
1 file changed, 120 i
On 6/1/2018 12:02 PM, Rob Herring wrote:
On Fri, Jun 1, 2018 at 12:56 PM, Ray Jui wrote:
Hi Rob,
On 5/31/2018 9:25 AM, Rob Herring wrote:
On Fri, May 25, 2018 at 09:45:16AM -0700, Ray Jui wrote:
Update and add Stingray clock definitions and tables so they match the
binding document and
On Wed, 30 May 2018 at 01:08, Paolo Bonzini wrote:
>
> On 29/05/2018 16:31, Radim Krčmář wrote:
> > 2018-05-29 16:23+0200, Radim Krčmář:
> >> 2018-05-29 14:53+0800, Wanpeng Li:
> >>> From: Wanpeng Li
> >>>
> >>> 'Commit d0659d946be0 ("KVM: x86: add option to advance tscdeadline
> >>> hrtimer expi
Immediately after the platform_device_unregister() the device will be cleaned
up.
Accessing the freed pointer immediately after that will crash the system.
Found this bug when kernel is built with CONFIG_PAGE_POISONING and testing
loading/unloading audio drivers in a loop on Qcom platforms.
Fix
On Thu, 31 May 2018 16:25:38 +0530
"Naveen N. Rao" wrote:
> Masami Hiramatsu wrote:
> > Clear current_kprobe and enable preemption in kprobe
> > even if pre_handler returns !0.
> >
> > This simplifies function override using kprobes.
> >
> > Jprobe used to require to keep the preemption disable
On 01/06/18 23:58, Srinivas Kandagatla wrote:
- of_node_clear_flag(dev->of_node, OF_POPULATED);
- of_node_clear_flag(dev->of_node, OF_POPULATED_BUS);
This change seems to have a side effect during re-probing. I will dig in
bit more to see how best it can be fixed.
thanks,
srini
All the managed resources would be freed by the time release function
is invoked. Handling such memory in qcom_smd_edge_release() would do
bad things.
Found this issue while testing Audio usecase where the dsp is started up
and shutdown in a loop.
This patch fixes this issue by using simple kzall
On Fri, 01 Jun 2018 16:42:36 +0800 Ian Kent wrote:
> The resulting "autofs-create-autofs-kconfig-and-makefile.patch" should
> now look like
Got it, thanks ;)
On Thu, May 31, 2018 at 05:08:12PM +0300, Alexey Budankov wrote:
>
> Enable complex event names containing [.:=,] symbols to be encoded into Perf
> trace using name= modifier e.g. like this:
>
> perf record -e
> cpu/name=\'OFFCORE_RESPONSE:request=DEMAND_RFO:response=L3_HIT.SNOOP_HITM\',\
>
Immediately after the platform_device_unregister() the device will be cleaned
up.
Accessing the freed pointer immediately after that will crash the system.
Found this bug when kernel is built with CONFIG_PAGE_POISONING and testing
loading/unloading audio drivers in a loop on Qcom platforms.
Fix
dapm_kcontrol_data is freed as part of dapm_kcontrol_free(), leaving the
paths list pointer dangling in the list.
This leads to system crash when we try to unload and reload sound card.
I hit this bug during ADSP crash/reboot test case on Dragon board DB410c.
Below is the kernel BUG with SLAB Poi
On Fri, 1 Jun 2018 14:21:58 -0700
Andy Lutomirski wrote:
> Hmm. I wonder if there's a more clever data structure than a bitmap
> that we could be using here. Each CPU only ever needs to be in one
> mm's cpumask, and each cpu only ever changes its own state in the
> bitmask. And writes are much
On 6/1/2018 2:31 PM, Brian Norris wrote:
> Hi,
>
> On Fri, Jun 01, 2018 at 10:34:34AM -0700, Guenter Roeck wrote:
>> On Fri, Jun 01, 2018 at 10:23:59AM -0700, Brian Norris wrote:
>>> drivers/power/supply/sbs-battery.c | 54 +-
>>> 1 file changed, 46 insertions(+), 8 de
On Fri 2018-06-01 18:37:36, H. Nikolaus Schaller wrote:
> Hi Pavel,
>
> > Am 01.06.2018 um 18:26 schrieb Pavel Machek :
> >
> > NMEA would not be my first choice, really. I'd propose something very
> > similar to existing /dev/input/eventX, but with wider data types.
>
> Since even Rome wasn't b
On Mon, 28 May 2018 19:34:19 +0800
kernel test robot wrote:
> Greeting,
>
> FYI, we noticed a -12.0% regression of aim9.disk_rr.ops_per_sec due to commit:
>
>
> commit: 1c758a2202a6b4624d0703013a2c6cfa6e7455aa ("tracing/x86: Update
> syscall trace events to handle new prefixed syscall func na
Hello Mark,
On 05/31/2018 04:48 AM, Mark Brown wrote:
> On Wed, May 30, 2018 at 04:39:10PM -0700, David Collins wrote:
>> The DRMS modes to use and max allowed current per mode need to be
>> specified at the board level in device tree instead of hard-coded per
>> regulator type in the driver. The
On Fri, Jun 1, 2018 at 1:35 PM Rik van Riel wrote:
>
> On Fri, 2018-06-01 at 13:03 -0700, Andy Lutomirski wrote:
> > Mike, you never did say: do you have PCID on your CPU? Also, what is
> > your workload doing to cause so many switches back and forth between
> > init_mm and a task.
> >
> > The po
A pseudo-locked region does not have a class of service associated with
it and thus not tracked in the array of control values maintained as
part of the domain. Even so, when the user provides a new bitmask for
another resource group it needs to be checked for interference with
existing pseudo-lock
On Fri, Jun 01, 2018 at 02:15:59PM +0100, Suzuki K Poulose wrote:
> Coresight uses DT graph bindings to describe the connections of the
> components. However we have some undocumented usage of the bindings
> to describe some of the properties of the connections.
>
> The coresight driver needs to k
On Fri, Jun 01, 2018 at 02:16:07PM +0100, Suzuki K Poulose wrote:
> Switch to updated coresight bindings for hw ports.
>
> Cc: Sudeep Holla
> Cc: Liviu Dudau
> Cc: Mathieu Poirier
> Signed-off-by: Suzuki K Poulose
Reviewed-and-tested-by: Mathieu Poirier
> ---
> arch/arm64/boot/dts/arm/juno
On Fri, Jun 01, 2018 at 02:16:06PM +0100, Suzuki K Poulose wrote:
> So far we have relied on an undocumented property "slave-mode",
> to indicate if the given port is input or not. Since we are
> redefining the coresight bindings, define new property for the
> "direction" of data flow for a given c
On Fri, 2018-06-01 at 13:03 -0700, Andy Lutomirski wrote:
> Mike, you never did say: do you have PCID on your CPU? Also, what is
> your workload doing to cause so many switches back and forth between
> init_mm and a task.
>
> The point of the optimization is that switching to init_mm() should
> b
On Fri, Jun 01, 2018 at 02:16:05PM +0100, Suzuki K Poulose wrote:
> The coresight drivers relied on default bindings for graph
> in DT, while reusing the "reg" field of the "ports" to indicate
> the actual hardware port number for the connections. However,
> with the rules getting stricter w.r.t to
On Fri, Jun 1, 2018 at 12:43 PM Rik van Riel wrote:
>
> On Fri, 2018-06-01 at 20:48 +0200, Mike Galbraith wrote:
> > On Fri, 2018-06-01 at 14:22 -0400, Rik van Riel wrote:
> > > On Fri, 2018-06-01 at 08:11 -0700, Andy Lutomirski wrote:
> > > > On Fri, Jun 1, 2018 at 5:28 AM Rik van Riel
> > > > w
Hi Peter,
How about taking patches 1-4 and 7 ? I can work on patches 5 & 6
separetly to provide a better integration for x86, this can be decided
separetly but the other patches will enable early clock functionality
on arches where sched_clock() is available early.
Pavel
On Thu, May 31, 2018 at 1
On 06/01/2018 03:56 AM, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20180531:
>
on i386:
drivers/pwm/pwm-stm32.o: In function `stm32_pwm_raw_capture.isra.0':
pwm-stm32.c:(.text+0xa01): undefined reference to `stm32_timers_dma_burst_read'
when CONFIG_PWM_STM32=y and CONFIG_MFD_STM32_TI
Quoting Chris Packham (2018-05-23 22:23:41)
> The correct fieldbit value for the NAND PLL reload trigger is 27.
>
> Fixes: commit e120c17a70e5 ("clk: mvebu: support for 98DX3236 SoC")
> Signed-off-by: Chris Packham
> ---
Applied to clk-next
On 1 June 2018 at 13:38, Mathieu Poirier wrote:
> On Fri, Jun 01, 2018 at 02:16:01PM +0100, Suzuki K Poulose wrote:
>> When parsing the remote endpoint of an output port, we do :
>> rport = of_graph_get_remote_port(ep);
>> rparent = of_graph_get_remote_port_parent(ep);
>>
>> and then par
Quoting Daniel Lezcano (2018-05-22 13:45:28)
> The current defconfig is inconsistent as it selects the mailbox and
> the clock for the hi6220 and the hi3660 without having their Kconfigs
> making sure the dependencies are correct. It ends up when selecting
> different versions for the kernel (for e
On Fri, 2018-06-01 at 20:48 +0200, Mike Galbraith wrote:
> On Fri, 2018-06-01 at 14:22 -0400, Rik van Riel wrote:
> > On Fri, 2018-06-01 at 08:11 -0700, Andy Lutomirski wrote:
> > > On Fri, Jun 1, 2018 at 5:28 AM Rik van Riel
> > > wrote:
> > > >
> > > > Song noticed switch_mm_irqs_off taking a l
On Fri, Jun 01, 2018 at 02:16:01PM +0100, Suzuki K Poulose wrote:
> When parsing the remote endpoint of an output port, we do :
> rport = of_graph_get_remote_port(ep);
> rparent = of_graph_get_remote_port_parent(ep);
>
> and then parse the "remote_port" as if it was the remote endpoint,
Hi Stephen,
On Fri, Jun 1, 2018 at 9:20 PM, Stephen Boyd wrote:
> Quoting Geert Uytterhoeven (2018-05-18 03:58:40)
>> __of_clk_get() calls of_parse_phandle_with_args(), which rejects
>> negative indices since commit bd69f73f2c81eed9 ("of: Create function for
>> counting number of phandles in a pr
Quoting Bjorn Andersson (2018-05-24 14:37:35)
> The halt check of the UFS symbol clocks always fails, as such probing
> UFS after clk_disable_unused always fails. This makes it impossible to
> boot a system with the UFS phy or UFS HCD drivers compiled as modules.
>
> Follow SDM845 and disable the
Quoting Geert Uytterhoeven (2018-05-18 03:58:40)
> __of_clk_get() calls of_parse_phandle_with_args(), which rejects
> negative indices since commit bd69f73f2c81eed9 ("of: Create function for
> counting number of phandles in a property").
>
> Signed-off-by: Geert Uytterhoeven
> ---
> Commit bd69f7
Quoting Lei YU (2018-05-18 01:57:02)
> Add a 24MHz fixed clock.
> This clock will be used for certain devices, e.g. pwm.
>
> Signed-off-by: Lei YU
> ---
Applied to clk-next
However, I interpret a firmware that send (confidence 1, tip switch 1)
and then (confidence 0, tip switch 0) a simple release, and the
confidence bit should not be relayed.
This unfortunately leads to false clicks: you start with finger, so
confidence is 1, then you transition the same touch t
Hello Rajendra,
On 06/01/2018 01:48 AM, Rajendra Nayak wrote:
> On 05/26/2018 06:38 AM, David Collins wrote:
>>
>>> + [1] = &sdm845_mx,
>>> + [2] = &sdm845_mx_ao,
>>> + [3] = &sdm845_cx,
>>> + [4] = &sdm845_cx_ao,
>>> + [5] = &sdm845_lmx,
>>> + [6] = &sdm845_lcx,
>>> + [7] = &sdm845_
Quoting Anson Huang (2018-05-17 18:01:05)
> Correct enet clock gates as below:
>
> CCGR6: IMX7D_ENET_AXI_ROOT_CLK (enet1 and enet2 bus clocks)
> CCGR112: IMX7D_ENET1_TIME_ROOT_CLK, IMX7D_ENET1_IPG_ROOT_CLK
> CCGR113: IMX7D_ENET2_TIME_ROOT_CLK, IMX7D_ENET2_IPG_ROOT_CLK
>
> Just rename unused IMX7D
Quoting Anson Huang (2018-05-17 18:01:06)
> ENET "ipg" clock should be IMX7D_ENETx_IPG_ROOT_CLK
> rather than IMX7D_ENET_AXI_ROOT_CLK which is for ENET bus
> clock.
>
> Based on Andy Duan's patch from the NXP kernel tree.
>
> Signed-off-by: Anson Huang
> ---
Applied to clk-next
idns by task pid or by pidns fd
* add arguments source_type and target_type
v6:
* revert back minimized v4 design
* rebase to next-20180601
* fix COND_SYSCALL stub
* use next syscall number, old used for io_pgetevents
--- sample tool ---
#define _GNU_SOURCE
#include
#include
#include
#i
Quoting Anson Huang (2018-05-17 18:01:04)
> IMX7D_ENET_PHY_REF_ROOT_DIV supplies clock for PHY directly,
> there is no clock gate after it, rename it to
> IMX7D_ENET_PHY_REF_ROOT_CLK to avoid device tree change.
>
> Signed-off-by: Anson Huang
> ---
Applied to clk-next
Hello,
On Fri, Jun 01, 2018 at 01:11:59PM -0500, Eric W. Biederman wrote:
> Widening the definition of a process sounds good. The memory control
> group code would still need a way to forbid these in cgroup v1 mode,
> when someone uses the task file.
Yeap, you're right. We'll need memcg's can_a
Quoting Anson Huang (2018-05-16 22:00:48)
> IMX6SL_CLK_OCRAM_PODF is a busy divider, its name in
> CCM_CDHIPR register of Reference Manual CCM chapter
> is axi_podf_busy, correct its clock type.
>
> Signed-off-by: Anson Huang
> ---
Applied to clk-next
Quoting Anson Huang (2018-05-16 22:00:47)
> Disable those unnecessary clocks during kernel boot up to save power,
> those modules clock should be managed by modules driver in runtime.
>
> Signed-off-by: Anson Huang
> ---
Applied to clk-next
Quoting Amit Nischal (2018-05-09 04:32:31)
> Add support for the video clock controller found on SDM845
> based devices. This would allow video drivers to probe and
> control their clocks.
>
> Signed-off-by: Amit Nischal
> ---
Applied to clk-next
Quoting Amit Nischal (2018-05-09 04:32:30)
> Add device tree bindings for video clock controller for
> Qualcomm Technology Inc's SoCs.
>
> Signed-off-by: Amit Nischal
> ---
Applied to clk-next
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