From: Thomas Hellstrom
Add two utilities to a) write-protect and b) clean all ptes pointing into
a range of an address space.
The utilities are intended to aid in tracking dirty pages (either
driver-allocated system memory or pci device memory).
The write-protect utility should be used in
On Tue, Jun 11, 2019 at 02:08:34PM +0200, Peter Zijlstra wrote:
> On Tue, Jun 11, 2019 at 10:03:07AM +0200, Peter Zijlstra wrote:
> > On Fri, Jun 07, 2019 at 11:10:19AM -0700, Andy Lutomirski wrote:
>
> > > I am surely missing some kprobe context, but is it really safe to use
> > > this mechanism
From: Thomas Hellstrom
Driver fault callbacks are allowed to drop the mmap_sem when expecting
long hardware waits to avoid blocking other mm users. Allow the mkwrite
callbacks to do the same by returning early on VM_FAULT_RETRY.
In particular we want to be able to drop the mmap_sem when waiting
On Mon, 2019-05-20 at 22:03 +0200, Martin Blumenstingl wrote:
> The audio clocks on the 32-bit Meson8, Meson8b and Meson8m2 are
> (probably) identical to the ones on GXBB, GXL and GXM.
>
> The first piece of evidence is that Amlogic's vendor kernel is using
> the same basic driver (just slightly
On Tue, 2019-05-28 at 10:07 +0200, Neil Armstrong wrote:
> The Amlogic G12B SoC is very similar with the G12A SoC, sharing
> most of the features and architecture.
> G12B clock tree is very close, the main differences are :
> - SYS_PLL is used for the second cluster (otherwise used fir the first
From: Thomas Hellstrom
This is basically apply_to_page_range with added functionality:
Allocating missing parts of the page table becomes optional, which
means that the function can be guaranteed not to error if allocation
is disabled. Also passing of the closure struct and callback function
On Fri, 2019-04-12 at 12:02 +0200, Guillaume La Roque wrote:
> This patch series add support of Clock for temperature sensor
> on Amlogic G12a SoC.
>
> Guillaume
>
> cahnges sinve v2:
> - rebase on good branch
>
> changes since v1:
> - fix .width value
>
> Guillaume La Roque (2):
>
Bring the ACPI path in sync with the device tree path and handle all the
IRQ fetching at probe time. This leaves the only IRQ handling at device
registration time being that which is passed directly through the board
info as either a resource or an actual IRQ number.
Reviewed-by: Mika Westerberg
In preparation for future refactoring factor out the fetch of the IRQ
into its own helper function.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No changes since v3.
Thanks,
Charles
drivers/i2c/i2c-core-acpi.c | 33 +
1 file changed, 21
Only set init_irq during i2c_device_new and only handle client->irq on
the probe/remove paths.
Suggested-by: Benjamin Tissoires
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No change since v3.
Thanks,
Charles
drivers/i2c/i2c-core-base.c | 5 +++--
1 file changed, 3
Use the available IRQ helper functions, most of the functions have
additional helpful side affects like configuring the trigger type of the
IRQ.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No changes since v3.
Apologies Andy but I really can't see a sensible way to split
It makes sense to contain all the ACPI IRQ handling in a single helper
function.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No change since v3.
Thanks,
Charles
drivers/i2c/i2c-core-acpi.c | 3 +++
drivers/i2c/i2c-core-base.c | 3 ---
2 files changed, 3 insertions(+), 3
In preparation for more refactoring make i2c_acpi_get_irq available
outside i2c-core-acpi.c.
Signed-off-by: Charles Keepax
---
Changes since v3:
- Move the change to use the helper function from i2c-core-base into its own
patch.
Thanks,
Charles
drivers/i2c/i2c-core-acpi.c | 15
This series attempts to align as much IRQ handling into the
probe path as possible. Note that I don't have a great setup
for testing these patches so they are mostly just build tested
and need careful review and testing before any of them are
merged.
The series brings the ACPI path inline with
Remove the static from i2c_dev_irq_from _resources so that other parts
of the core code can use this helper function.
Reviewed-by: Mika Westerberg
Signed-off-by: Charles Keepax
---
No changes since v3.
Thanks,
Charles
drivers/i2c/i2c-core-base.c | 4 ++--
drivers/i2c/i2c-core.h | 2 ++
Hello POWER developers,
I'm trying to find out if there is an internal kernel API so that a
PCI driver can call it to check if its PCI device is running inside a
POWER9 machine. Alternatively, if that's not available, if it is
running on a machine with powerpc architecture.
I need this
When McASP is bus master and it's AUXCLK clock is not static, but it is
a multiple of the frame sync the constraint rules should take it account
when validating possible stream formats.
Signed-off-by: Peter Ujfalusi
---
sound/soc/ti/davinci-mcasp.c | 52 ++--
1
On Fri, Jun 07, 2019 at 02:10:15PM +0800, Pingfan Liu wrote:
> On Fri, Jun 7, 2019 at 5:17 AM John Hubbard wrote:
> >
> > On 6/5/19 7:19 PM, Pingfan Liu wrote:
> > > On Thu, Jun 6, 2019 at 5:49 AM Andrew Morton
> > > wrote:
> > ...
> > >>> --- a/mm/gup.c
> > >>> +++ b/mm/gup.c
> > >>> @@
When McASP is bus master it's reference clock (AUXCLK) might not be a
static clock, but running at a specific FS ratio.
Signed-off-by: Peter Ujfalusi
---
.../devicetree/bindings/sound/davinci-mcasp-audio.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Pavel Begunkov
Statements in the loop's body and before it are identical.
Use do-while to not repeat it.
Signed-off-by: Pavel Begunkov
---
kernel/sched/wait.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/kernel/sched/wait.c b/kernel/sched/wait.c
index
Hi,
The AUXCLK of McASP which is used as the master clock for I2S signal generation
usually is a static clock.
The driver (and bindings) assumes this setup, however if the AUXCLK can change
with the stream's FS then this assumption breaks the audio support as it sets
constraint rules in startup,
On Tue, 11 Jun 2019 20:25:22 +0800
Qii Wang wrote:
> On Tue, 2019-06-04 at 20:26 +0800, Qii Wang wrote:
> > On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote:
> > > On Mon, 3 Jun 2019 11:51:03 +0800
> > > Qii Wang wrote:
> > >
> > >
> > > > +static int mtk_i3c_master_probe(struct
In order to display console messages in low power mode, console pins
must be kept active after suspend call.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0d43711..00e4d7a 100644
---
[resubmitted with the missing patch]
Hi,
here are the rest and the main part of patches to add the support for
loading the compressed firmware files. The patch was slightly
refactored for more easily enhancing for other compression formats (if
anyone wants). Also the selftest patch is
From: Bich Hemon
Add idle and no_console_suspend states to uart4 pin configuration.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index 098dbfb..b851f80 100644
---
From: Bich Hemon
Add options for pinctrl states:
- "sleep" for low power
- "idle" for low power and wakeup capabilities enabled
- "no_console_suspend" for enabling console messages in low power
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git
- Mark all usart/uart devices as wakeup source.
- Identify all dedicated interrupts with a specific interrupt name (either
"event" or "wakeup").
- add interrupts-extended wakeup interrupt
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
Use __maybe_unused for power management related functionsinstead of
fixes: 270e5a74fe4c ("serial: stm32: add wakeup mechanism")
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 60f3faf..0d43711 100644
---
Currently, pinctrl states defines only one "sleep" configuration for pins,
no matter the possible uart low power modes (Rx pin always kept active).
Sleep pin configuration is refined for low power modes:
- "sleep" (no wakeup & console suspend enabled): put pins in analog state
to optimize power
This is merely a preparation for the upcoming compressed firmware
support and no functional changes. It moves the code to handle the
paged buffer allocation and mapping out of fallback.c into the main
code, so that they can be used commonly.
Signed-off-by: Takashi Iwai
---
This patch adds the test cases for checking compressed firmware load.
Two more cases are added to fw_filesystem.sh:
- Both a plain file and an xz file are present, and load the former
- Only an xz file is present, and load without '.xz' suffix
The tests are enabled only when
This patch adds the support for loading compressed firmware files.
The primary motivation is to reduce the storage size; e.g. currently
the files in /lib/firmware on my machine counts up to 419MB, while
they can be reduced to 130MB by file compression.
The patch introduces a new kconfig option
Add a note for enabling wakeup capabilities of usart
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 9d3efed..5ec80c1 100644
---
From: Bich Hemon
Select either pinctrl sleep state in suspend function or default state in
resume function.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 9c2b04e..04eda75 100644
---
Use pm_runtime for clock management.
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 04eda75..60f3faf 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -809,13
On Tue, 2019-06-11 at 13:32 +0200, Dmitry Vyukov wrote:
> On Tue, Jun 11, 2019 at 12:44 PM Walter Wu wrote:
> >
> > On Tue, 2019-06-11 at 10:47 +0200, Dmitry Vyukov wrote:
> > > On Tue, Jun 11, 2019 at 9:05 AM Walter Wu
> > > wrote:
> > > >
> > > > On Mon, 2019-06-10 at 13:46 +0200, Dmitry
On Tue, 2019-06-04 at 20:26 +0800, Qii Wang wrote:
> On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote:
> > On Mon, 3 Jun 2019 11:51:03 +0800
> > Qii Wang wrote:
> >
> >
> > > +static int mtk_i3c_master_probe(struct platform_device *pdev)
> > > +{
> > > + struct device *dev = >dev;
> > >
From: Bich Hemon
Add idle and no_console_suspend states to uart4 pin configuration
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 62a8c78..34cc847 100644
---
This series delivers power improvements for stm32-usart driver.
Bich Hemon (4):
dt-bindings: serial: add optional pinctrl states
serial: stm32: select pinctrl state in each suspend/resume function
ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
ARM: dts: stm32: Update
From: Anson Huang
Enable CONFIG_PINCTRL_IMX8MN by default to support i.MX8MN
pinctrl driver.
Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
---
Changes since V1:
- sort the change in alphabet order.
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff
From: Wanpeng Li
Expose PV_SCHED_YIELD feature bit to guest, the guest can check this
feature bit before using paravirtualized sched yield.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Liran Alon
Signed-off-by: Wanpeng Li
---
Documentation/virtual/kvm/cpuid.txt | 4
arch/x86/kvm/cpuid.c
From: Anson Huang
Add the pinctrl driver support for i.MX8MN.
Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
---
Changes since V1:
- Fix some nitpicks like sorting the change in alphabet order
and improve the headfile included.
---
drivers/pinctrl/freescale/Kconfig
From: Anson Huang
Add binding doc for i.MX8MN pinctrl driver.
Signed-off-by: Anson Huang
Acked-by: Dong Aisheng
---
No change.
---
.../bindings/pinctrl/fsl,imx8mn-pinctrl.txt| 39 ++
arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h | 646 +
2 files changed, 685
The idea is from Xen, when sending a call-function IPI-many to vCPUs,
yield if any of the IPI target vCPUs was preempted. 17% performance
increasement of ebizzy benchmark can be observed in an over-subscribe
environment. (w/ kvm-pv-tlb disabled, testing TLB flush call-function
IPI-many since
From: Wanpeng Li
The target vCPUs are in runnable state after vcpu_kick and suitable
as a yield target. This patch implements the sched yield hypercall.
17% performance increasement of ebizzy benchmark can be observed in an
over-subscribe environment. (w/ kvm-pv-tlb disabled, testing TLB
From: Wanpeng Li
When sending a call-function IPI-many to vCPUs, yield if any of
the IPI target vCPUs was preempted, we just select the first
preempted target vCPU which we found since the state of target
vCPUs can change underneath and to avoid race conditions.
Cc: Paolo Bonzini
Cc: Radim
On Tue, 11 Jun 2019 14:19:54 +0200,
Takashi Iwai wrote:
>
> Hi,
>
> here are the rest and the main part of patches to add the support for
> loading the compressed firmware files. The patch was slightly
> refactored for more easily enhancing for other compression formats (if
> anyone wants).
Jacek
Reviewed and tested the updated branch. Looks good to me.
Dan
On 6/5/19 2:31 PM, Jacek Anaszewski wrote:
Hi Dan,
Thank you for the v6.
Patches 4/5 and 5/5 don't contain amendments I made to
the respective patches on the ib-leds-mfd-regulator branch
(that address issues raised by
On Tue, 11 Jun 2019 at 10:42, Ilya Maximets wrote:
>
> On 11.06.2019 11:09, Björn Töpel wrote:
> > On Mon, 10 Jun 2019 at 22:49, Jonathan Lemon
> > wrote:
> >>
> >> On 10 Jun 2019, at 9:15, Ilya Maximets wrote:
> >>
> >>> Device that bound to XDP socket will not have zero refcount until the
>
From: Wanpeng Li
Make lapic timer unpinned when timer is injected by posted-interrupt,
the emulated timer can be offload to the housekeeping cpus.
The host admin should fine tuned, e.g. dedicated instances scenario
w/ nohz_full cover the pCPUs which vCPUs resident, several pCPUs
surplus for
Some a4tech mice use the 'GenericDesktop.00b8' usage to inform whether
the previous wheel report was horizontal or vertical. Before
c01908a14bf73 ("HID: input: add mapping for "Toggle Display" key") this
usage was being mapped to 'Relative.Misc'. After the patch it's simply
ignored (usage->type ==
Hi Michal
>On Sun 09-06-19 17:10:28, ChenGang wrote:
>> Usually the value of min_free_kbytes is multiply of 4, and in this
>> case ,the right shift is ok.
>> But if it's not, the right-shifting operation will lose the low 2
>> bits, and this cause kernel don't reserve enough memory.
>> So it's
From: Wanpeng Li
When lapic timer is injected by posted-interrupt, the emulated timer is
offload to the housekeeping cpu. The timer interrupt will be delivered
properly, no need to migrate timer.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 3 ++-
On 6/11/19 5:29 AM, Srinivas Kandagatla wrote:
On 10/06/2019 15:12, Pierre-Louis Bossart wrote:
+
+ if (dev_addr == SDW_BROADCAST_DEV_NUM) {
+ ctrl->fifo_status = 0;
+ ret = wait_for_completion_timeout(>sp_cmd_comp,
+ msecs_to_jiffies(TIMEOUT_MS));
Hi,
here are the rest and the main part of patches to add the support for
loading the compressed firmware files. The patch was slightly
refactored for more easily enhancing for other compression formats (if
anyone wants). Also the selftest patch is included. The
functionality doesn't change
This patch adds the support for loading compressed firmware files.
The primary motivation is to reduce the storage size; e.g. currently
the files in /lib/firmware on my machine counts up to 419MB, while
they can be reduced to 130MB by file compression.
The patch introduces a new kconfig option
On 6/3/19 2:04 PM, Michael S. Tsirkin wrote:
> On Mon, Jun 03, 2019 at 01:03:04PM -0400, Nitesh Narayan Lal wrote:
>> This patch series proposes an efficient mechanism for communicating free
>> memory
>> from a guest to its hypervisor. It especially enables guests with no page
>> cache
>>
This patch adds the test cases for checking compressed firmware load.
Two more cases are added to fw_filesystem.sh:
- Both a plain file and an xz file are present, and load the former
- Only an xz file is present, and load without '.xz' suffix
The tests are enabled only when
Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur vmexits.
This
From: Wanpeng Li
Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur
On Tue, 11 Jun 2019 at 19:40, Paolo Bonzini wrote:
>
> On 06/06/19 07:31, Wanpeng Li wrote:
> > +static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
> > +{
> > + return posted_interrupt_inject_timer_enabled(vcpu) &&
> > + !vcpu_halt_in_guest(vcpu);
> > +}
>
From: Wanpeng Li
Wait before calling posted-interrupt deliver function directly to add
advance timer support to pi_inject_timer.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 6 --
arch/x86/kvm/lapic.h | 2 +-
arch/x86/kvm/svm.c | 2 +-
On Tue, Jun 11, 2019 at 01:42:34PM +0200, Benjamin Gaignard wrote:
> Le mer. 24 avr. 2019 à 09:25, Benjamin Gaignard
> a écrit :
> >
> > Le mar. 23 avr. 2019 à 19:46, Fabio Estevam a écrit :
> > >
> > > On Wed, Feb 27, 2019 at 1:21 PM Alexandre Torgue
> > > wrote:
> > > >
> > > >
> > > > On
Hi Wei Yang
>On Sun, Jun 09, 2019 at 05:10:28PM +0800, ChenGang wrote:
>>Usually the value of min_free_kbytes is multiply of 4, and in this case
>>,the right shift is ok.
>>But if it's not, the right-shifting operation will lose the low 2 bits,
>But PAGE_SHIFT is not always 12.
You are
On Tue, Jun 11, 2019 at 10:03:07AM +0200, Peter Zijlstra wrote:
> On Fri, Jun 07, 2019 at 11:10:19AM -0700, Andy Lutomirski wrote:
> > I am surely missing some kprobe context, but is it really safe to use
> > this mechanism to replace more than one instruction?
>
> I'm not entirely up-to-scratch
On 07.06.19 13:35, Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven
> ---
> mm/balloon_compaction.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/mm/balloon_compaction.c b/mm/balloon_compaction.c
> index ba739b76e6c52e55..17ac81d8d26bcb50 100644
> ---
On Tue, Jun 11, 2019 at 10:12 AM Johannes Berg
wrote:
> > As I've made clear before, my work on this has been focused on the IPA
> > transport,
> > and some of this higher-level LTE architecture is new to me. But it
> > seems pretty clear that an abstracted WWAN subsystem is a good plan,
> >
On Tue, 2019-06-11 at 13:39 +0200, Dmitry Vyukov wrote:
> I should have been asked this earlier, but: what is your use-case?
We need KASAN to help us to detect memory corruption at mobile phone. It
is powerful tool.
> Could you use CONFIG_KASAN_GENERIC instead? Why not?
> CONFIG_KASAN_GENERIC
On Tue, Jun 11, 2019 at 10:29:55AM +0300, Hawa, Hanna wrote:
> In the near future we plan to push EDAC drivers for L1/L2 and memory
> controller. There's no common resources/shared data between them.
Ok, you should be safe then. If you need to do more involved interaction
in the future, you know
On 10/06/19 11:27 PM, Sergei Shtylyov wrote:
> On 06/09/2019 01:32 PM, Vignesh Raghavendra wrote:
>
>> Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate
>> Bus interface between a host system master and one or more slave
>> interfaces. HyperBus is used to connect
On Tue, Jun 11, 2019 at 05:21:39PM +1000, Benjamin Herrenschmidt wrote:
> So looking again ... all the registration/removal of edac devices seem
> to already be protected by mutexes, so that's not a problem.
>
> Tell me more about what specific races you think we might have here,
> I'm not sure I
Hi Sebastien,
On Tue 11 Jun 2019 at 11:03, Sébastien Szymanski wrote:
> On 6/11/19 11:40 AM, Rui Miguel Silva wrote:
>> Hi Sebastien,
>> On Tue 11 Jun 2019 at 09:16, Sébastien Szymanski wrote:
>>> Hi Rui,
>>>
>>> thanks for the review!
>>>
>>> On 6/10/19 12:28 PM, Rui Miguel Silva wrote:
Hi
On Tue, Jun 11, 2019 at 12:59 PM Greg KH wrote:
>
> On Tue, Jun 11, 2019 at 12:21:44PM +0300, Oded Gabbay wrote:
> > +bool hl_pci_parent_is_phb4(struct hl_device *hdev)
> > +{
> > + struct pci_dev *parent_port = hdev->pdev->bus->self;
> > +
> > + if ((parent_port->vendor ==
On Tue, Jun 11, 2019 at 03:50:40PM +1000, Benjamin Herrenschmidt wrote:
> Should we fix that then instead ?
Sure.
> What are the big issues with adding some basic locking ? being called
> from NMIs ?
That is one possible issue. I know we don't call the error decoding
routines in NMI context on
Add identification registers to address range
of SAI DT parent node, for stm32mp157c.
Change-Id: I696363794fab59ba8d7869b3ffbc041dacdf28de
Signed-off-by: Olivier Moysan
---
arch/arm/boot/dts/stm32mp157c.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
On Fri, 31 May 2019, Anna-Maria Gleixner wrote:
[...]
> I will think about the problem and your solution a little bit more and
> give you feedback hopefully on monday.
I'm sorry for the delay. But now I'm able to give you a detailed feedback:
The general problem is, that your solution is
,On Sun, Jun 9, 2019 at 4:56 AM Hillf Danton wrote:
>
>
> Hi
>
> On Sat, 08 Jun 2019 12:13:06 -0700 (PDT) syzbot wrote:
> > Hello,
> >
> > syzbot found the following crash on:
> >
> > HEAD commit:79c3ba32 Merge tag 'drm-fixes-2019-06-07-1' of git://anong..
> > git tree: upstream
> >
On Tue, 11 Jun 2019 11:02:14 +
Peter Rosin wrote:
> On 2019-06-11 11:56, Mylène Josserand wrote:
> > Hello everyone,
> >
> > You will find a small series that add the support of processed values
> > for iio-rescale driver.
> > Thanks to that, it is possible to read processed values in sysfs
Hi,
Since the regmap-i3c.c was already applied in:
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
tags/regmap-i3c
I wonder what is clean way to submit this patch set?
And since the i3c-regmap was merge in
From: Vitor Soares
Date: Thu, Jun 06, 2019 at 16:12:01
> This
Le mer. 24 avr. 2019 à 09:25, Benjamin Gaignard
a écrit :
>
> Le mar. 23 avr. 2019 à 19:46, Fabio Estevam a écrit :
> >
> > On Wed, Feb 27, 2019 at 1:21 PM Alexandre Torgue
> > wrote:
> > >
> > >
> > > On 2/14/19 9:31 AM, Benjamin Gaignard wrote:
> > > > Implement ARM errata 814220 for Cortex
On 06/06/19 07:31, Wanpeng Li wrote:
> +static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
> +{
> + return posted_interrupt_inject_timer_enabled(vcpu) &&
> + !vcpu_halt_in_guest(vcpu);
> +}
> +
I agree with Radim, what you want here is just use
I should have been asked this earlier, but: what is your use-case?
Could you use CONFIG_KASAN_GENERIC instead? Why not?
CONFIG_KASAN_GENERIC already has quarantine.
On Tue, Jun 11, 2019 at 1:32 PM Dmitry Vyukov wrote:
>
> On Tue, Jun 11, 2019 at 12:44 PM Walter Wu wrote:
> >
> > On Tue,
11.06.2019 13:51, Bitan Biswas пишет:
> Remove redundant BUG_ON calls or replace with WARN_ON_ONCE
> as needed. Remove BUG() and make Rx and Tx case handling
> similar. Add WARN_ON_ONCE check for non-zero rx_fifo_avail
> in tegra_i2c_empty_rx_fifo() and return new error
>
On Tue, 11 Jun 2019 at 19:09, Paolo Bonzini wrote:
>
> On 11/06/19 09:38, Wanpeng Li wrote:
> > MSR_CORE_C1_RES is unreadable except for ATOM platform, so I think we
> > can avoid the complex logic to handle C1 now. :)
>
> I disagree. Linux uses it on all platforms is available, and virtual
>
11.06.2019 10:38, Bitan Biswas пишет:
>
>
> On 6/10/19 2:00 PM, Dmitry Osipenko wrote:
>> 10.06.2019 22:41, Bitan Biswas пишет:
>>>
>>>
>>> On 6/10/19 11:12 AM, Dmitry Osipenko wrote:
10.06.2019 20:08, Bitan Biswas пишет:
> Remove redundant BUG_ON calls or replace with WARN_ON_ONCE
On Tue, 2019-06-11 at 10:43 +0200, Benjamin Tissoires wrote:
> Hi Nicolas,
>
> On Mon, Jun 10, 2019 at 8:54 PM Nicolas Saenz Julienne
> wrote:
> > Some a4tech mice use the 'GenericDesktop.00b8' usage id to inform
> > whether the previous wheel report was horizontal or vertical. Before
> >
On Tue, Jun 11, 2019 at 12:44 PM Walter Wu wrote:
>
> On Tue, 2019-06-11 at 10:47 +0200, Dmitry Vyukov wrote:
> > On Tue, Jun 11, 2019 at 9:05 AM Walter Wu wrote:
> > >
> > > On Mon, 2019-06-10 at 13:46 +0200, Dmitry Vyukov wrote:
> > > > On Mon, Jun 10, 2019 at 9:28 AM Walter Wu
> > > >
Shobhit Kukreti writes:
> The dht11 driver uses a single gpio to make measurements. It was
> using the older global gpio numberspace. The patch replaces the
> old gpio api with the new gpio descriptor based api.
>
> Removed header files "linux/gpio.h" and "linux/of_gpio.h"
>
> Signed-off-by:
Add systimer0 device node for MT8183.
Signed-off-by: Dehui Sun
---
This patch is based on the following patches:
https://patchwork.kernel.org/cover/10962385/
https://patchwork.kernel.org/patch/10983939/
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +
1 file changed, 9 insertions(+)
This commit adds mt8183 compatible node in mtk-timer binding document.
Signed-off-by: Dehui Sun
---
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
This series are based on 5.2-rc1 and add systimer node for MT8183,
and this timer will serve as a wakeup-up source for cpu-idle feature.
Dehui Sun (2):
dt-bindings: mediatek: update bindings for MT8183 systimer
arm64: dts: mt8183: add systimer0 device node
nbrand
Reviewed-by: Oscar Salvador
Acked-by: Mark Rutland
Acked-by: Michal Hocko
Signed-off-by: Anshuman Khandual
---
Changes in PATCH V5 - Rebased (from V5)
- Rebased on linux-next (next-20190611)
- s/__remove_memory/try_remove_memory in the subject line
- s/arch_remove_memory/memblock_[free|
On 07/06/2019 10:58, Geert Uytterhoeven wrote:
> Hi all,
>
> Recently, Marc pointed out some common misconceptions w.r.t. the .name
> and .parent_device fields in struct irq_chip. This patch series fixes
> them in the Renesas interrupt controller drivers.
>
> The first two patches are
On Tue, Jun 11, 2019 at 11:15:46AM +0200, Peter Zijlstra wrote:
> On Sat, Jun 08, 2019 at 01:08:52PM +0200, Heiko Carstens wrote:
> > --- a/arch/s390/kernel/processor.c
> > +++ b/arch/s390/kernel/processor.c
> > @@ -31,6 +31,7 @@ struct cpu_info {
> > };
> >
> > static DEFINE_PER_CPU(struct
On 08/06/2019 20:04, Martin Blumenstingl wrote:
> This series adds GPIO interrupt controller support for Meson-G12A SoCs.
> Although the total number of pins is the same as the Meson-AXG SoC, the
> GPIO banks and IRQ numbers are different. Add a new compatible string
> to avoid confusion when
Add dependency to TI CPTS from Common CLK framework COMMON_CLK to fix
allyesconfig build for Powerpc:
drivers/net/ethernet/ti/cpts.c: In function 'cpts_of_mux_clk_setup':
drivers/net/ethernet/ti/cpts.c:567:2: error: implicit declaration of function
'of_clk_parent_fill'; did you mean
From: David Laight
> Sent: 11 June 2019 10:52
...
> If I have an application that has a loop with a pselect call that
> enables SIGINT (without a handler) and, for whatever reason,
> one of the fd is always 'ready' then I'd expect a SIGINT
> (from ^C) to terminate the program.
>
> A quick test
On 2019-06-11 11:56, Mylène Josserand wrote:
> With the support of CHAN_INFO_PROCESSED in voltage-divider,
> it is possible to read the processed values directly from iio's
> sysfs entries or by using iio-hwmon. Add an example for this last
> use case.
As I wrote in response to the cover letter,
On 11/06/19 09:38, Wanpeng Li wrote:
> MSR_CORE_C1_RES is unreadable except for ATOM platform, so I think we
> can avoid the complex logic to handle C1 now. :)
I disagree. Linux uses it on all platforms is available, and virtual
machines that don't pass mwait through _only_ have C1, so it would
On 06/06/2019 10:56, Neil Armstrong wrote:
> A bunch of arm64 boards can now use the Lima driver, let's enable it
> in defconfig, it will be useful to have it enabled for KernelCI
> boot and runtime testing.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file
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