On Sun, Jun 16, 2019 at 10:46:19AM +0530, Hariprasad Kelam wrote:
> rtw_malloc with memset can be replaced with rtw_zmalloc.
>
> Signed-off-by: Hariprasad Kelam
> ---
> drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/
- Ursprüngliche Mail -
> Von: "Masahiro Yamada"
> An: "linux-mtd"
> CC: "Boris Brezillon" , "Miquel Raynal"
> , "Brian Norris"
> , "Vignesh Raghavendra" ,
> "Marek Vasut" ,
> "Masahiro Yamada" , "richard"
> , "David Woodhouse" ,
> "linux-kernel"
> Gesendet: Dienstag, 18. Juni 2019 05:
> -#define CRAMFS_BLK_FLAG_UNCOMPRESSED (1 << 31)
> +#define CRAMFS_BLK_FLAG_UNCOMPRESSED (1U << 31)
> #define CRAMFS_BLK_FLAG_DIRECT_PTR (1 << 30)
Please use the unsigned constants for all flags, not just one.
On 17/06/19 11:10 PM, Raul E Rangel wrote:
> The O2 controller supports 8-bit EMMC access.
>
> JESD84-B51 section A.6.3.a defines the bus testing procedure that
> `mmc_select_bus_width()` implements. This is used to determine the actual
> bus width of the eMMC.
>
> Signed-off-by: Raul E Rangel
On Tue, Jun 18, 2019 at 07:14:10AM +0530, Hariprasad Kelam wrote:
> kmalloc with memset can be replaced with kzalloc.
Yes, but did you audit the call-paths of this to ensure that GFP_KERNEL
is the correct value for kzalloc() here? If so, please document that in
the changelog.
thanks,
greg k-h
On 6/13/2019 10:55 PM, Mark Brown wrote:
On Wed, Jun 12, 2019 at 04:30:51PM +0530, Nisha Kumari wrote:
+static int qcom_labibb_read(struct qcom_labibb *labibb, u16 address,
+ u8 *val, int count)
+{
+ int ret;
+
+ ret = regmap_bulk_read(labibb->regmap, add
On Mon, Jun 10, 2019 at 06:23:31PM +0300, Horia Geantă wrote:
> LS1028A has a SEC v5.0 compatible security engine.
>
> Signed-off-by: Horia Geantă
Applied, thanks.
Enable SMMUs on 8996 now that the WRZ workaround in the arm-smmu driver
has landed.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
ind
On Tue, Jun 18, 2019 at 09:12:59AM +0300, Mike Rapoport wrote:
> On Mon, Jun 17, 2019 at 05:36:30PM +0100, Will Deacon wrote:
> > On Mon, Jun 17, 2019 at 06:12:52PM +0300, Mike Rapoport wrote:
> > > Andrew, can you please add the patch below as an incremental fix?
> > >
> > > With this the arm64::
Hi Mason,
On Tue, 18 Jun 2019 09:24:14 +0800
masonccy...@mxic.com.tw wrote:
> Hi Miquel,
>
> >
> > > > > > > > > +static void mxic_nand_select_chip(struct nand_chip *chip,
> int
> > >
> > > > > chipnr)
> > > > > > > >
> > > > > > > > _select_target() is preferred now
> > > > > >
On Mon, Jun 17, 2019 at 12:24:12PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Jun 17, 2019 at 05:11:39PM +0800, Leo Yan escreveu:
> > In the function trace__syscall_info(), it explicitly checks verbose
> > level and print out log with fprintf(). Actually, we can use
> > pr_debug() to do the
On Mon, Jun 10, 2019 at 01:39:22PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> i.MX8MQ clock driver uses platform driver model, better to use
> devm_platform_ioremap_resource() instead of of_iomap() to get
> IO base.
>
> Signed-off-by: Anson Huang
Applied, thanks.
On 6/13/2019 10:34 PM, Bjorn Andersson wrote:
On Wed 12 Jun 04:00 PDT 2019, Nisha Kumari wrote:
This patch adds labibb regulator driver for supporting LCD mode display
on SDM845 platform.
Signed-off-by: Nisha Kumari
---
drivers/regulator/Kconfig | 10 +
drivers/regulator
On Mon, Jun 17, 2019 at 05:36:30PM +0100, Will Deacon wrote:
> Hi Mike,
>
> On Mon, Jun 17, 2019 at 06:12:52PM +0300, Mike Rapoport wrote:
> > Andrew, can you please add the patch below as an incremental fix?
> >
> > With this the arm64::pgd_alloc() should be in the right shape.
> >
> >
> > Fro
On 2019/6/18 14:45, Greg Kroah-Hartman wrote:
> On Tue, Jun 18, 2019 at 02:18:00PM +0800, Gao Xiang wrote:
>>
>>
>> On 2019/6/18 13:47, Greg Kroah-Hartman wrote:
>>> On Tue, Jun 18, 2019 at 09:47:08AM +0800, Gao Xiang wrote:
On 2019/6/18 4:36, Greg Kroah-Hartman wrote:
> On Sa
On Tue, 2019-06-18 at 08:01 +0200, Christophe Leroy wrote:
>
> Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
> > patch 1-3: Code refactor
> > patch 4: Speedup disabling breakpoint
> > patch 5: Fix length calculation for unaligned targets
>
> While you are playing with hw breakpoints, did you hav
On Tue, 2019-06-18 at 09:57 +0530, Ravi Bangoria wrote:
> Directly setting dawr and dawrx with 0 should be enough to
> disable watchpoint. No need to reset individual bits in
> variable and then set in hw.
This seems like a pointless optimisation to me.
I'm all for adding more code/complexity if
On Mon, Jun 10, 2019 at 01:36:33PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> Some of i.MX SoCs' clock driver use platform driver model,
> and they need to call imx_check_clocks() API, so
> imx_check_clocks() API should NOT be in .init section.
>
> Signed-off-by: Anson Huang
App
On Mon, Jun 17, 2019 at 08:21:27PM +0200, Enrico Weigelt, metux IT consult
wrote:
> From: Enrico Weigelt
>
> Add more helper macros for trivial driver init cases, similar to the
> already existing module_platform_driver or module_i2c_driver().
Inconsistent use of () after macro names.
Other th
Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
Move feature availability check at the start of the function.
Rearrange comment to it's associated code. Use hw->address and
hw->len in the 512 bytes boundary check(to write if statement
in a single line). Add spacing between code blocks.
Are th
Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
Remove unnecessary comments. Code itself is self explanatory.
And, ISA already talks about MRD field. I Don't think we need
to re-describe it.
In an RFC patch you may "don't think".
But in the final patch you need to make a decision and write it
From: Gavin Schenk
Due to new challenges in my life I can no longer take care of SIOX.
Thorsten takes over my SIOX tasks.
Signed-off-by: Gavin Schenk
Acked-by: Thorsten Scherer
Signed-off-by: Uwe Kleine-König
---
Hello Greg,
this patch was already send by Gavin back in April. I just noticed
On Mon, Jun 17, 2019 at 08:21:28PM +0200, Enrico Weigelt, metux IT consult
wrote:
> From: Enrico Weigelt
>
> Reduce driver init boilerplate by using the new
> module_siox_driver() macro.
>
> Signed-off-by: Enrico Weigelt
The subject is wrong, this isn't about pca953x.
Best regards
Uwe
--
P
Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
patch 1-3: Code refactor
patch 4: Speedup disabling breakpoint
patch 5: Fix length calculation for unaligned targets
While you are playing with hw breakpoints, did you have a look at
https://github.com/linuxppc/issues/issues/38 ?
Christophe
The subject text should mention you are changing comments. Here it
suggests you are changing code text.
Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
do_dabr() was renamed with do_break() long ago. But I still see
some comments mentioning do_dabr(). Replace it.
s/Replace it/Replace them/
Ch
Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
Directly setting dawr and dawrx with 0 should be enough to
disable watchpoint. No need to reset individual bits in
variable and then set in hw.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 3 ++-
arch/powerpc/k
On Mon, Jun 17, 2019 at 10:31:46PM -0300, Marcos Paulo de Souza wrote:
> If BLIST_TRY_VPD_PAGES is set for a device, even for an USB, it should
> be honored, so only set skip_vpd_pages is try_vpd_pages is not set.
>
> Signed-off-by: Marcos Paulo de Souza
> ---
> drivers/usb/storage/scsiglue.c |
On 17.06.19 17:07, Tony Krowiak wrote:
> On 6/17/19 6:05 AM, Harald Freudenberger wrote:
>> On 13.06.19 21:39, Tony Krowiak wrote:
>>> The AP architecture does not preclude assignment of AP resources that are
>>> not available. Let's go ahead and implement this facet of the AP
>>> architecture for
> On Jun 17, 2019, at 9:57 PM, Andrew Morton wrote:
>
> On Wed, 12 Jun 2019 21:59:03 -0700 Nadav Amit wrote:
>
>> For efficient search of resources, as needed to determine the memory
>> type for dax page-faults, introduce a cache of the most recently used
>> top-level resource. Caching the top-
On Thu, Jun 13, 2019 at 02:01:11PM +, Leo Li wrote:
>
>
> > -Original Message-
> > From: Shawn Guo
> > Sent: Wednesday, June 12, 2019 7:45 PM
> > To: Leo Li
> > Cc: Madalin-cristian Bucur ; Rob Herring
> > ; Aisheng Dong ; Vinod Koul
> > ; Grant Likely ; moderated
> > list:ARM/FREES
On Mon, Jun 17, 2019 at 02:32:03PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Jun 17, 2019 at 05:11:40PM +0800, Leo Yan escreveu:
> > trace__init_bpf_map_syscall_args() invokes trace__syscall_info() to
> > retrieve system calls information, it always passes NULL for 'evsel'
> > argument; when
This is going to collide with this patch
https://patchwork.ozlabs.org/patch/1109594/
Mikey
On Tue, 2019-06-18 at 09:57 +0530, Ravi Bangoria wrote:
> Remove unnecessary comments. Code itself is self explanatory.
> And, ISA already talks about MRD field. I Don't think we need
> to re-describe it.
Introduce two new functions, hv_alloc_hyperv_page() and
hv_free_hyperv_page(), to allocate/deallocate memory with the size and
alignment that Hyper-V expects as a page. Although currently they are
not used, they are ready to be used to allocate/deallocate memory on x86
when their ARM64 counterparts
Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
Watchpoint match range is always doubleword(8 bytes) aligned on
powerpc. If the given range is crossing doubleword boundary, we
need to increase the length such that next doubleword also get
covered. Ex,
address len = 6 bytes
Define the ring buffer size as a constant expression because it should
not depend on the guest page size.
Signed-off-by: Maya Nakamura
Reviewed-by: Michael Kelley
---
drivers/hid/hid-hyperv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/hid/hid-hyperv.c b/driv
On Wed, Jun 12, 2019 at 9:59 PM Nadav Amit wrote:
>
> Running some microbenchmarks on dax keeps showing find_next_iomem_res()
> as a place in which significant amount of time is spent. It appears that
> in order to determine the cacheability that is required for the PTE,
> lookup_memtype() is call
> On Jun 17, 2019, at 10:33 PM, Nadav Amit wrote:
>
>> On Jun 17, 2019, at 9:57 PM, Andrew Morton wrote:
>>
>> On Wed, 12 Jun 2019 21:59:03 -0700 Nadav Amit wrote:
>>
>>> For efficient search of resources, as needed to determine the memory
>>> type for dax page-faults, introduce a cache of th
> On Jun 16, 2019, at 11:59 PM, Yang Yingliang wrote:
>
> When loading a module with rodata=n, it causes an executing
> NX-protected page BUG.
>
> [ 32.379191] kernel tried to execute NX-protected page - exploit attempt?
> (uid: 0)
> [ 32.382917] BUG: unable to handle page fault for address
> Subject: Powerpc/hw-breakpoint: Replace stale do_dabr() with do_break()
Can you add the word "comment" to this subject. Currently it implies there are
code changes here.
Mikey
On Tue, 2019-06-18 at 09:57 +0530, Ravi Bangoria wrote:
> do_dabr() was renamed with do_break() long ago. But I still
On 6/12/19, 6:54 PM, Vidya Sagar wrote:
>
> Remove multiple write enable and disable sequences of dbi registers as
> Tegra194 implements writes to BAR-0 register (offset: 0x10) controlled by
> DBI write-lock enable bit thereby not allowing any further writes to BAR-0
> register in config space to t
On Tue, 18 Jun 2019 at 02:58, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.14.128 release.
> There are 53 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Re
On Mon, Jun 10, 2019 at 9:21 PM Yong Wu wrote:
>
> Normally the M4U HW connect EMI with smi. the diagram is like below:
> EMI
>|
> M4U
>|
> smi-common
>|
>-
>||| |
On 18/06/2019 06:23, Bitan Biswas wrote:
> Synchronize ISR and tegra_i2c_xfer_msg execution
> by disabling interrupt. This avoids spinlock usage
> for same purpose.
I think that you need to explain the motivation/benefit of this. It is
not immediately clear to me. Sorry if I have missed some pre
On 6/13/2019 10:57 PM, Mark Brown wrote:
On Wed, Jun 12, 2019 at 04:30:52PM +0530, Nisha Kumari wrote:
+static void labibb_sc_err_recovery_work(void *_labibb)
+{
+ int ret;
+ struct qcom_labibb *labibb = (struct qcom_labibb *)_labibb;
+
+ labibb->ibb_vreg.vreg_enabled = 0;
+
Synchronize ISR and tegra_i2c_xfer_msg execution
by disabling interrupt. This avoids spinlock usage
for same purpose.
Signed-off-by: Bitan Biswas
---
drivers/i2c/busses/i2c-tegra.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.
On 6/14/19 6:02 AM, Dmitry Osipenko wrote:
14.06.2019 12:50, Bitan Biswas пишет:
On 6/13/19 5:28 AM, Dmitry Osipenko wrote:
13.06.2019 14:30, Bitan Biswas пишет:
On 6/12/19 7:30 AM, Dmitry Osipenko wrote:
11.06.2019 13:51, Bitan Biswas пишет:
Fix expression for residual bytes(less tha
Hi Uffe,
Thanks for the review. Please find my comments below.
> -Original Message-
> From: Ulf Hansson
> Sent: Monday, June 17, 2019 8:29 PM
> To: Michal Simek
> Cc: Manish Narani ; Rob Herring
> ; Mark Rutland ; Adrian
> Hunter ; Rajan Vaja ; Jolly
> Shah ; Nava kishore Manne ; Olof
>
On Wed, 12 Jun 2019 21:59:03 -0700 Nadav Amit wrote:
> For efficient search of resources, as needed to determine the memory
> type for dax page-faults, introduce a cache of the most recently used
> top-level resource. Caching the top-level should be safe as ranges in
> that level do not overlap (
On 14-06-19, 15:20, Srinivas Kandagatla wrote:
> For some reason arguments to most of the circular buffers
> macros are used in reverse, tail is used for head and vice versa.
>
> This leads to bam thinking that there is an extra descriptor at the
> end and leading to retransmitting descriptor whic
This adds an x86-specific test for pinned cr4 bits. A successful test
will validate pinning and check the ROP-style call-middle-of-function
defense, if needed. For example, in the case of native_write_cr4()
looking like this:
8171bce0 :
8171bce0: 48 8b 35 79 46 f2 00mov
With sensitive CR4 bits pinned now, it's possible that the WP bit for
CR0 might become a target as well. Following the same reasoning for
the CR4 pinning, this pins CR0's WP bit (but this can be done with a
static value).
Suggested-by: Peter Zijlstra
Signed-off-by: Kees Cook
---
arch/x86/includ
Hi,
This updates the cr pinning series to allow for no silent papering-over
of pinning bugs (thanks to tglx to pointing out where I needed to poke
cr4 harder). I've tested with under normal boot and hibernation.
-Kees
Kees Cook (3):
lkdtm: Check for SMEP clearing protections
x86/asm: Pin sen
Several recent exploits have used direct calls to the native_write_cr4()
function to disable SMEP and SMAP before then continuing their exploits
using userspace memory access. This pins bits of CR4 so that they cannot
be changed through a common function. This is not intended to be general
ROP prot
Hello John,
On (06/07/19 18:29), John Ogness wrote:
[..]
> + struct prb_reserved_entry e;
> + char *s;
> +
> + s = prb_reserve(&e, &rb, 32);
> + if (s) {
> + sprintf(s, "Hello, world!");
> + prb_commit(&e);
> + }
A nit: snprintf().
sprintf() is tricky,
On 6/13/2019 11:54 PM, Vidya Sagar wrote:
On 6/7/2019 6:43 PM, Vidya Sagar wrote:
On 5/27/2019 4:39 PM, Vidya Sagar wrote:
On 5/7/2019 12:25 PM, Vidya Sagar wrote:
On 5/7/2019 11:19 AM, Vidya Sagar wrote:
On 5/3/2019 4:53 PM, Lorenzo Pieralisi wrote:
On Thu, May 02, 2019 at 10:34:25PM +0530,
On 17-06-19, 12:37, Sameer Pujar wrote:
>
> On 6/13/2019 10:13 AM, Vinod Koul wrote:
> > On 06-06-19, 09:19, Sameer Pujar wrote:
> >
> > > > you are really going other way around about the whole picture. FWIW that
> > > > is how *other* folks do audio with dmaengine!
> > > I discussed this intern
The usage of BUG() macro is generally discouraged in kernel, unless
it's a problem that results in a physical damage or loss of data.
This patch removes unnecessary BUG() macros and replaces the rest
with warning.
Signed-off-by: Bitan Biswas
---
drivers/i2c/busses/i2c-tegra.c | 49 ++
On 6/17/19 12:28 PM, Dmitry Osipenko wrote:
17.06.2019 21:41, Bitan Biswas пишет:
On 6/17/19 5:13 AM, Dmitry Osipenko wrote:
17.06.2019 8:09, Bitan Biswas пишет:
Remove BUG, BUG_ON as it makes system usable:
- Remove redundant BUG_ON calls or replace with WARN_ON_ONCE
as needed.
do_dabr() was renamed with do_break() long ago. But I still see
some comments mentioning do_dabr(). Replace it.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 2 +-
arch/powerpc/kernel/ptrace.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/
Watchpoint match range is always doubleword(8 bytes) aligned on
powerpc. If the given range is crossing doubleword boundary, we
need to increase the length such that next doubleword also get
covered. Ex,
address len = 6 bytes
|=.
|v--|--v-
Remove unnecessary comments. Code itself is self explanatory.
And, ISA already talks about MRD field. I Don't think we need
to re-describe it.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/process.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/arc
Move feature availability check at the start of the function.
Rearrange comment to it's associated code. Use hw->address and
hw->len in the 512 bytes boundary check(to write if statement
in a single line). Add spacing between code blocks.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_b
patch 1-3: Code refactor
patch 4: Speedup disabling breakpoint
patch 5: Fix length calculation for unaligned targets
Ravi Bangoria (5):
Powerpc/hw-breakpoint: Replace stale do_dabr() with do_break()
Powerpc/hw-breakpoint: Refactor hw_breakpoint_arch_parse()
Powerpc/hw-breakpoint: Refactor se
Directly setting dawr and dawrx with 0 should be enough to
disable watchpoint. No need to reset individual bits in
variable and then set in hw.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 3 ++-
arch/powerpc/kernel/process.c| 12
2 files
On Wed, 12 Jun 2019 21:59:01 -0700 Nadav Amit wrote:
> Since resources can be removed, locking should ensure that the resource
> is not removed while accessing it. However, find_next_iomem_res() does
> not hold the lock while copying the data of the resource.
Looks right to me.
> Keep holding t
+Uwe who had interest in 4bit block protection support
On 12-Jun-19 4:17 PM, Sagar Shrikant Kadam wrote:
> Implement a locking scheme for ISSI devices based on stm_lock mechanism.
> The is25x devices have 4 bits for selecting the range of blocks to
> be locked/protected from erase/write opera
On Mon, Jun 17, 2019 at 7:11 PM Kai Huang wrote:
>
> On Mon, 2019-06-17 at 18:50 -0700, Andy Lutomirski wrote:
> > On Mon, Jun 17, 2019 at 5:48 PM Kai Huang wrote:
> > >
> > >
> > > >
> > > > > And another silly argument: if we had /dev/mktme, then we could
> > > > > possibly get away with avoidi
Add initial version of device tree for Facebook Minipack ast2500 BMC.
Signed-off-by: Tao Ren
---
arch/arm/boot/dts/Makefile| 1 +
.../boot/dts/aspeed-bmc-facebook-minipack.dts | 429 ++
2 files changed, 430 insertions(+)
create mode 100644 arch/arm/boot/dts
Callers of hrtimer_forward_now() should save the return value in u64.
function rtc_pie_update_irq() stores it in variable 'count' of type int
change type of count from unsigned long to u64 to solve the issue.
Signed-off-by: Puranjay Mohan
---
RESEND - Added required mailing lists in CC
drivers/
On Mon, Jun 17, 2019 at 6:45 PM Andrew Morton wrote:
>
> On Mon, 17 Jun 2019 06:23:07 -0700 Shakeel Butt wrote:
>
> > > Here is a patch to use CSS_TASK_ITER_PROCS.
> > >
> > > From 415e52cf55bc4ad931e4f005421b827f0b02693d Mon Sep 17 00:00:00 2001
> > > From: Tetsuo Handa
> > > Date: Mon, 17 Jun
> > Right, but regardless of the spec we have to consider that the
> > behaviour of XFS comes from it's Irix heritage (actually from EFS,
> > the predecessor of XFS from the late 1980s)
>
> Sure. And as I mentioned, I think it's technically the nicer guarantee.
>
> That said, it's a pretty *expensi
Callers of hrtimer_forward_now() should save the return value in u64.
change type of missed from unsigned long to u64.
Signed-off-by: Puranjay Mohan
---
RESEND - Added required mailing lists in CC
drivers/media/pci/cx88/cx88-input.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
On Mon, Jun 17, 2019 at 6:40 PM Andy Lutomirski wrote:
>
> On Mon, Jun 17, 2019 at 6:34 PM Lendacky, Thomas
> wrote:
> >
> > On 6/17/19 6:59 PM, Kai Huang wrote:
> > > On Mon, 2019-06-17 at 11:27 -0700, Dave Hansen wrote:
>
> > >
> > > And yes from my reading (better to have AMD guys to confirm)
On Mon, 2019-06-17 at 23:36 +0200, Takashi Iwai wrote:
> On Mon, 17 Jun 2019 22:51:42 +0200,
> Ranjani Sridharan wrote:
> >
> > On Mon, 2019-06-17 at 13:36 +0200, Amadeusz Sławiński wrote:
> > > When we unload Skylake driver we may end up calling
> > > hdac_component_master_unbind(), it uses acomp
From: Saravana Kannan
From: Saravana Kannan
Many CPU architectures have caches that can scale independent of the CPUs.
Frequency scaling of the caches is necessary to make sure the cache is not
a performance bottleneck that leads to poor performance and power. The same
idea applies for RAM/DDR.
From: Hsin-Yi Wang
This is based on mediatek's devfreq patches[1].
In MT8183 SoC, CCI and little core cluster share same regulator. In original
implementation, CCI frequency depends on regulator voltage, which results in
bad memory access performance if tasks are loaded on other cpus other than
From: Hsin-Yi Wang
This series uses cpufreq-map governor for mt8183-cci to improve performance.
Hsin-Yi Wang (1):
devfreq: mt8183-cci: using cpufreq-map governor in cci dvfs driver
Saravana Kannan (1):
PM / devfreq: Generic CPU frequency to device frequency mapping
governor
.../bindin
Fix CRAMFS_BLK_FLAG_UNCOMPRESSED to use "U" cast to avoid shifting signed
32-bit value by 31 bits problem. This isn't a problem for kernel builds
with gcc.
This could be problem since this header is part of public API which
could be included for builds using compilers that don't handle this
condit
On Mon, Jun 17, 2019 at 12:26:01AM +0200, Thomas Gleixner wrote:
> Nah. The straight forward approach is to do right when the secondary CPU
> comes into life, before it does any cr4 write (except for the code in
> entry_64.S), something like the below.
Okay, will do; thanks! :) I'll respin things
On Mon, Jun 17, 2019 at 9:28 PM Andrew Lunn wrote:
>
> On Mon, Jun 17, 2019 at 09:49:27AM +0530, Yash Shah wrote:
...
> > static const struct macb_config at91sam9260_config = {
> > .caps = MACB_CAPS_USRIO_HAS_CLKEN |
> > MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII,
> > .clk_init = macb_clk_i
Hi Linus,
Please pull this fix for what I'm calling "meminit" (the compiler-based
variable-init stuff) for v5.2-rc6. This is a small update to the stack
auto-initialization self-test code to deal with the Clang initialization
pattern. It's been in linux-next for a couple weeks; I had waited a bit
Hi Jiada
> From: Nilkanth Ahirrao
>
> commit 7e4f3419ebfe ("ASoC: rsnd: add .get_id/.get_id_sub")
> introduces rsnd_ctu_id which calcualates and gives
> the main Device id of the CTU by dividing the id by 4.
> rsnd_mod_id uses this interface to get the CTU main
> Device id. But this commit for
Hello Joe,
Thanks for reviewing the patch.
On Tue, Jun 18, 2019 at 5:55 AM Joe Perches wrote:
>
> On Mon, 2019-06-17 at 21:10 +0530, Sagar Kadam wrote:
> > On Sun, Jun 16, 2019 at 6:35 PM Vignesh Raghavendra wrote:
> []
> > > > +static int issi_unlock(struct spi_nor *nor, loff_t ofs, uint64_t l
On Wed, Jun 05, 2019 at 02:58:32PM -0700, Dan Williams wrote:
>Given there are no more usages of is_dev_zone() outside of 'ifdef
>CONFIG_ZONE_DEVICE' protection, kill off the compilation helper.
>
>Cc: Michal Hocko
>Cc: Logan Gunthorpe
>Acked-by: David Hildenbrand
>Reviewed-by: Oscar Salvador
>
On 6/17/19 5:35 PM, Douglas Gilbert wrote:
For sg3_utils:
$ find . -name '*.c' -exec grep "/proc/scsi" {} \; -print
static const char * proc_allow_dio = "/proc/scsi/sg/allow_dio";
./src/sg_read.c
static const char * proc_allow_dio = "/proc/scsi/sg/allow_dio";
./src/sgp_dd.c
static const char * p
On Mon, 17 Jun 2019, Alistair Francis wrote:
> > The legacy M-mode U-boot handles the phy reset already, and I’ve been
> > able to load upstream S-mode uboot as a payload via TFTP, and then
> > load and boot a 4.19 kernel.
> >
> > It would be nice to get this all working with 5.x, however there
On Mon, Jun 17, 2019 at 08:01:52PM -0700, Alexei Starovoitov wrote:
> On Mon, Jun 17, 2019 at 6:54 PM Kris Van Hees
> wrote:
> >
> > It is not hypothetical. The folowing example works fine:
> >
> > static int noinline bpf_action(void *ctx, long fd, long buf, long count)
> > {
> > int
After commit ad67b74d2469d9b8 ("printk: hash addresses printed with %p"),
it will print "ptrval" instead of actual addresses when mbigen
create domain fails,
Hisilicon MBIGEN-V2 HISI0152:00: Failed to create mbi-gen@(ptrval)
irqdomain
Hisilicon MBIGEN-V2: probe of HISI0152:00
From: Wanpeng Li
On a machine, cpu 0 is used for housekeeping, other 39 cpus are in
nohz_full mode. We can observe huge time burn in the loop for seaching
nearest busy housekeeper cpu by ftrace.
2) |get_nohz_timer_target() {
2) 0.240 us|
+Rafael
On 17-06-19, 17:02, Peter Zijlstra wrote:
> On Thu, Jun 06, 2019 at 08:22:04AM +0530, Viresh Kumar wrote:
> > Hmm, even if the values are same currently I am not sure if we want
> > the same for ever. I will write a patch for it though, if Peter/Rafael
> > feel the same as you.
>
> Is it
Linux kernel tolerates C++ style comments these days. Actually, the
SPDX License tags for .c files start with //.
On the other hand, uapi headers are written in more strict C, where
the C++ comment style is forbidden.
I simply dropped these lines instead of fixing the comment style.
This code ha
On 6/17/2019 11:32 AM, Xiaoyao Li wrote:
On 6/16/2019 5:55 PM, Tao Xu wrote:
UMWAIT and TPAUSE instructions use IA32_UMWAIT_CONTROL at MSR index E1H
to determines the maximum time in TSC-quanta that the processor can
reside
in either C0.1 or C0.2.
This patch emulates MSR IA32_UMWAIT_CONTROL
On Mon, Jun 17, 2019 at 6:54 PM Kris Van Hees wrote:
>
> It is not hypothetical. The folowing example works fine:
>
> static int noinline bpf_action(void *ctx, long fd, long buf, long count)
> {
> int cpu = bpf_get_smp_processor_id();
> struct data {
>
From: Nilkanth Ahirrao
commit 7e4f3419ebfe ("ASoC: rsnd: add .get_id/.get_id_sub")
introduces rsnd_ctu_id which calcualates and gives
the main Device id of the CTU by dividing the id by 4.
rsnd_mod_id uses this interface to get the CTU main
Device id. But this commit forgets to revert the main
De
On Mon, Jun 17, 2019 at 05:19:02PM -0700, Andy Lutomirski wrote:
> On Mon, Jun 17, 2019 at 5:09 PM Fenghua Yu wrote:
> But you're already using a mutex and a comment. And you're hoping
> that the syscore resume callback reads something sensible despite the
> lack of READ_ONCE / WRITE_ONCE. The c
On 6/17/2019 11:50 PM, Radim Krčmář wrote:
2019-06-17 14:31+0800, Xiaoyao Li:
On 6/17/2019 11:32 AM, Xiaoyao Li wrote:
On 6/16/2019 5:55 PM, Tao Xu wrote:
+ if (vmx->msr_ia32_umwait_control != host_umwait_control)
+ add_atomic_switch_msr(vmx, MSR_IA32_UMWAIT_CONTROL,
+
Remove function ODM_ConfigMACWithHeaderFile as trace is not necessary
and as it is getting called only once and call direct function
"ODM_ReadAndConfig_MP_8723B_MAC_REG"
Issue identified by coccicheck
Signed-off-by: Hariprasad Kelam
changes v2: fixed typo in commit message
changes v3: Remov
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/hpet
head: e68a1d0fce032346dbfeca0140d90da75796bab9
commit: 64cdfa23aeb4a6be1a3c0d84bc3fd269581767e5 [14/29] x86/hpet: Remove not
required includes
config: i386-randconfig-n004-201924 (attached as .config)
compiler: gcc-
When building with clang, the following modpost warning occurs:
WARNING: vmlinux.o(.text+0x974dbc): Section mismatch in reference from
the function imx6q_obtain_fixed_clk_hw() to the function
.init.text:imx_obtain_fixed_clock_hw()
The function imx6q_obtain_fixed_clk_hw() references
the function __
The supported formats are S16_LE and S24_LE now. However, S24_LE is
not supported when TDM is 0 and it is not in the right justified mode.
We should remove 24-bit format in that situation to avoid triggering
error.
Signed-off-by: Yu-Hsuan Hsu
---
Changed the order of the conditional.
Remove the s
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