The device mapper may map over devices that have inline encryption
capabilities, and to make use of those capabilities, the DM device must
itself advertise those inline encryption capabilities. One way to do this
would be to have the DM device set up a keyslot manager with a
"sufficiently large" nu
On 9/9/2020 4:29 PM, Dave Hansen wrote:
On 9/9/20 4:25 PM, Yu, Yu-cheng wrote:
On 9/9/2020 4:11 PM, Dave Hansen wrote:
On 9/9/20 4:07 PM, Yu, Yu-cheng wrote:
What if a writable mapping is passed to madvise(MADV_SHSTK)? Should
that be rejected?
It doesn't matter to me. Even if it's readable
From: Eric Biggers
dm-linear and dm-flakey obviously can pass through inline crypto support.
dm-zero should declare that it passes through inline crypto support, since
any reads from dm-zero should return zeroes, and blk-crypto should not
attempt to decrypt data returned from dm-zero.
Signed-of
mem_cgroup_from_obj() checks the lowest bit of the page->mem_cgroup
pointer to determine if the page has an attached obj_cgroup vector
instead of a regular memcg pointer. If it's not set, it simple returns
the page->mem_cgroup value as a struct mem_cgroup pointer.
The commit 10befea91b61 ("mm: mem
@Thomas Gleixner, any more comments for v2 patch? Can we merge it? Thanks.
Best Regards,
Jiafei.
> -Original Message-
> From: Jiafei Pan
> Sent: Friday, August 14, 2020 12:55 PM
> To: pet...@infradead.org; mi...@kernel.org; t...@linutronix.de;
> rost...@goodmis.org; romain.per...@gmail.c
On Tue, Sep 8, 2020 at 3:32 PM Matthew Garrett wrote:
>
> On Tue, Sep 8, 2020 at 1:35 PM Andy Lutomirski wrote:
>
> > Undervolting is a bit different. It’s a genuinely useful configuration that
> > can affect system stability. In general, I think it should be allowed, and
> > it should have a
On Fri, Sep 04, 2020 at 01:47:40PM -0700, Paul E. McKenney wrote:
> On Tue, Sep 01, 2020 at 12:46:41PM +0200, Frederic Weisbecker wrote:
> > Hi,
> >
> > I'm currently working on making nohz_full/nohz_idle runtime toggable
> > and some other people seem to be interested as well. So I've dumped
> >
Patch generated with
./scripts/documentation-file-ref-check --fix
Signed-off-by: Federico Vaga
---
.../bindings/display/tilcdc/tilcdc.txt | 2 +-
.../devicetree/bindings/media/i2c/tvp5150.txt| 2 +-
.../bindings/soc/qcom/qcom,smd-rpm.yaml | 2 +-
Documentation/sche
With !CONFIG_OF and SCSI_UFS_EXYNOS selected, the below
warning is given:
WARNING: unmet direct dependencies detected for PHY_SAMSUNG_UFS
Depends on [n]: OF [=n] && (ARCH_EXYNOS || COMPILE_TEST [=y])
Selected by [y]:
- SCSI_UFS_EXYNOS [=y] && SCSI_LOWLEVEL [=y] && SCSI [=y] &&
SCSI_UFSHCD_P
On Tue, Sep 08, 2020 at 12:32:48PM -0400, Jim Quinlan wrote:
> The Kconfig is modified so that the pcie_bus_config setting can be done at
> build time in the same manner as the CONFIG_PCIEASPM_ choice. The
> pci_bus_config setting may still be overridden by the bootline param.
I guess... I r
t.git
81365af13a5630673c49bfad9b24cf415e9576f6
config: arm-randconfig-r036-20200909 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
8893d0816ccdf8998d2e21b5430e9d6abe7ef465)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/
Randy,
> I am still seeing this in linux-next of 20200909.
> Was there a patch posted that I missed and is not applied anywhere yet?
This patch became a victim of dropping the Exynos changes in 5.9. I have
added it back in.
--
Martin K. Petersen Oracle Linux Engineering
On 9/9/20 7:11 PM, Andrew Jeffery wrote:
> Enable runtime debug control of whether the PEC byte is exchanged with
> the PMBus device.
>
> Some manufacturers have asked for the PEC to be disabled as part of
> debugging driver communication issues with devices.
>
> Signed-off-by: Andrew Jeffery
A
On Tue, Sep 08 2020, Jeff Layton wrote:
> On Tue, 2020-09-08 at 13:27 +0200, Jan Kara wrote:
>> Added Jeff to CC since he has written the code...
>>
>> On Mon 07-09-20 09:11:06, Michael Kerrisk (man-pages) wrote:
>> > [Widening the CC to include Andrew and linux-fsdevel@]
>> > [Milan: thanks for
On Wed, 2020-09-09 at 19:36 -0300, Jason Gunthorpe wrote:
> On Wed, Sep 09, 2020 at 01:06:39PM -0700, Joe Perches wrote:
> > fallthrough to a separate case/default label break; isn't very readable.
> >
> > Convert pseudo-keyword fallthrough; statements to a simple break; when
> > the next label is
Add minidump id for modem in sm8150 chipset.
Signed-off-by: Rishabh Bhatnagar
Signed-off-by: Gurbir Arora
Signed-off-by: Siddharth Gupta
---
drivers/remoteproc/qcom_q6v5_pas.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c
b/drivers/remoteproc/qcom_q6v5
On 9/9/20 4:25 PM, Yu, Yu-cheng wrote:
> On 9/9/2020 4:11 PM, Dave Hansen wrote:
>> On 9/9/20 4:07 PM, Yu, Yu-cheng wrote:
>>> What if a writable mapping is passed to madvise(MADV_SHSTK)? Should
>>> that be rejected?
>>
>> It doesn't matter to me. Even if it's readable, it _stops_ being even
>> d
The phy mode pertains to the phy itself, i.e. 'struct qmp_phy', not the
wrapper, i.e. 'struct qcom_qmp'. Move the phy mode into the phy
structure to more accurately reflect what is going on. This also cleans
up 'struct qcom_qmp' so that it can eventually be the place where qmp
wrapper wide data is
On 9/9/20 4:07 PM, Yu, Yu-cheng wrote:
> What if a writable mapping is passed to madvise(MADV_SHSTK)? Should
> that be rejected?
It doesn't matter to me. Even if it's readable, it _stops_ being even
directly readable after it's a shadow stack, right? I don't think
writes are special in any way.
The serdes I/O region is where the PLL for the phy is controlled.
Sometimes the PLL is shared between multiple phys, for example in the
PCIe case where there are three phys inside the same wrapper. Other
times the PLL is for a single phy, i.e. some USB3 phys. To complete the
trifecta we have the US
On Thu, 3 Sep 2020 13:10:02 -0400
Matthew Rosato wrote:
> On 9/3/20 12:41 PM, Bjorn Helgaas wrote:
> > On Wed, Sep 02, 2020 at 03:46:34PM -0400, Matthew Rosato wrote:
> >> Per the PCIe spec, VFs cannot implement the MSE bit
> >> AKA PCI_COMMAND_MEMORY, and it must be hard-wired to 0.
> >> Use a
The dp_com resource is always at index 1 according to the dts files in
the kernel. Get this resource by index so that we don't need to make
future additions to the DT binding use 'reg-names'.
Cc: Jeykumar Sankaran
Cc: Chandan Uddaraju
Cc: Vara Reddy
Cc: Tanmay Shah
Cc: Bjorn Andersson
Cc: Man
On Thu, Sep 10, 2020 at 1:49 AM Rob Herring wrote:
>
> On Wed, Sep 9, 2020 at 3:24 AM Cheng-yi Chiang wrote:
> >
> > On Wed, Sep 9, 2020 at 4:34 AM Rob Herring wrote:
> > >
> > > On Mon, Sep 07, 2020 at 06:00:38PM +0800, Cheng-Yi Chiang wrote:
> > > > Add devicetree bindings documentation file f
On Wed, 09 Sep 2020 14:54:36 -0700 Vinicius Costa Gomes wrote:
> > Vinicius, could you please take a look at all the syzbot reports which
> > point to your commit? I know syzbot bisection is not super reliable,
> > but at least 3 reports point to your commit now, so something's
> > probably going o
Currently if hitting block req error, block layer only prints error
log with a rate limitation. Then agent has to parse kernel log to
record what happens.
In this patch, add read/write/discard/flush stat counter to record
io errors.
Signed-off-by: zhenwei pi
---
block/blk-core.c | 14 +
amdgpu_dc_rreg and amdgpu_dc_wreg are very similar, for this reason,
this commits abstract these two events by using DECLARE_EVENT_CLASS and
create an instance of it for each one of these events.
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/amdgpu_dm/amdgpu_dm_trace.h | 55 -
On 9/9/2020 3:59 PM, Dave Hansen wrote:
On 9/9/20 3:08 PM, Yu, Yu-cheng wrote:
After looking at this more, I found the changes are more similar to
mprotect() than madvise(). We are going to change an anonymous mapping
to a read-only mapping, and add the VM_SHSTK flag to it. Would an
x86-specif
Hi,
On Thu, 10 Sep 2020 at 09:59, Bjorn Helgaas wrote:
>
> On Thu, Sep 10, 2020 at 09:54:02AM +0800, Jiang Biao wrote:
> > Hi,
> >
> > On Thu, 10 Sep 2020 at 09:25, Bjorn Helgaas wrote:
> > >
> > > On Mon, Aug 24, 2020 at 01:20:25PM +0800, Jiang Biao wrote:
> > > > From: Jiang Biao
> > > >
> >
Make the necessary changes to the DP driver to use the qmp phy from the
common phy framework instead of rolling our own in the drm subsystem.
This also removes the PLL code and adds proper includes so things build.
Cc: Jeykumar Sankaran
Cc: Chandan Uddaraju
Cc: Vara Reddy
Cc: Tanmay Shah
Cc: B
- Original Message -
> Hi Jason
>
> On Wed, Sep 09, 2020 at 04:34:32PM +0800, Jason Wang wrote:
> > Commit 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses
> > page aligned address.") disables ATS for device that can do unaligned
> > page request.
>
> Did you take a look a
On 9/9/2020 4:11 PM, Dave Hansen wrote:
On 9/9/20 4:07 PM, Yu, Yu-cheng wrote:
What if a writable mapping is passed to madvise(MADV_SHSTK)? Should
that be rejected?
It doesn't matter to me. Even if it's readable, it _stops_ being even
directly readable after it's a shadow stack, right? I do
Daniel,
> The first crash we observed is due memory corruption in the srb memory
> pool. Unforuntatly, I couldn't find the source of the problem but the
> workaround by resetting the cleanup callbacks 'fixes' this problem
> (patch #1). I think as intermeditate step this should be merged until
>
Jing,
> Fix to return error code PTR_ERR() from the error handling case instead
> of 0.
Applied to 5.10/scsi-staging. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
On 9/9/20 3:08 PM, Yu, Yu-cheng wrote:
> After looking at this more, I found the changes are more similar to
> mprotect() than madvise(). We are going to change an anonymous mapping
> to a read-only mapping, and add the VM_SHSTK flag to it. Would an
> x86-specific mprotect(PROT_SHSTK) make more s
Enable runtime debug control of whether the PEC byte is exchanged with
the PMBus device.
Some manufacturers have asked for the PEC to be disabled as part of
debugging driver communication issues with devices.
Signed-off-by: Andrew Jeffery
---
drivers/hwmon/pmbus/pmbus_core.c | 39 ++
On Thu, 10 Sep 2020, at 11:22, Joel Stanley wrote:
> On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery wrote:
> >
> > When displaying which pinconf register and field is being touched, format
> > the
> > field mask so that it's consistent with the way the pinmux portion
> > formats the mask.
> >
> >
Hi Hiff,
On Wed, Sep 9, 2020 at 9:45 AM Hillf Danton wrote:
>
>
> Tue, 08 Sep 2020 17:19:17 -0700
> > syzbot found the following issue on:
> >
> > HEAD commit:59126901 Merge tag 'perf-tools-fixes-for-v5.9-2020-09-03' ..
> > git tree: upstream
> > console output: https://syzkaller.appspo
Stanley,
> Fix build warnings with make W=1 as below,
Applied to 5.10/scsi-staging. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
On Tue, Sep 08 2020, Jeff Layton wrote:
>
> Yep.
>
> My only comment is that there is nothing special about EIO and ENOSPC.
There are two type of errors that fsync can return.
EBADF EROFS EINVAL - these are usage errors.
EIO ENOSPC EDQUOT - these are functional failures.
So I would say ther
Each remoteproc might have different requirements for coredumps and might
want to choose the type of dumps it wants to collect. This change allows
remoteproc drivers to specify their own custom dump function to be executed
in place of rproc_coredump. If the coredump op is not specified by the
remot
On Thu, 10 Sep 2020, at 01:01, Guenter Roeck wrote:
> On 9/9/20 6:24 AM, Andrew Jeffery wrote:
> > Enable runtime debug control of whether the PEC byte is exchanged with
> > the PMBus device.
> >
> > Some manufacturers have asked for the PEC to be disabled as part of
> > debugging driver commun
We can use the wrapper API here to save some lines and remove the need
for the 'base' and 'res' local variable.
Suggested-by: Bjorn Andersson
Cc: Jeykumar Sankaran
Cc: Chandan Uddaraju
Cc: Vara Reddy
Cc: Tanmay Shah
Cc: Bjorn Andersson
Cc: Manu Gautam
Cc: Sandeep Maheswaram
Cc: Douglas And
Add support for the USB3 + DisplayPort (DP) "combo" phy to the qmp phy
driver. We already have support for the USB3 part of the combo phy, so
most additions are for the DP phy.
Split up the qcom_qmp_phy{enable,disable}() functions into the phy init,
power on, power off, and exit functions that the
In fnction is_cr_done & is_ch_eq_done, when done = false
happened once, no need to circle left ln_count.
This change is to make the code run a bit fast.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 14 +-
1 file changed, 5 insertions(+), 9 deleti
On Tue, 1 Sep 2020 16:57:10 +0900
Masami Hiramatsu wrote:
> Support perf-style return probe ("SYMBOL%return") in kprobe events.
> This will allow boot-time tracing user to define a return probe event.
>
Hmm, I think I should add this for uprobe event too.
I'll update the series.
Thank you,
>
On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery wrote:
>
> These were skipped in the original patches adding pinconf support for
> the AST2600.
>
> Cc: Johnny Huang
> Signed-off-by: Andrew Jeffery
Reviewed-by: Joel Stanley
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 17 +
Got it. I misunderstood that is some residue of trying to implement
softirq context decompression. :)
2020년 9월 9일 (수) 오후 4:15, Chao Yu 님이 작성:
>
> Hi Daeho,
>
> On 2020/9/9 12:43, Daeho Jeong wrote:
> > Hi Chao,
> >
> > I have a question about the below flag for decompression.
> >
> > STEP_DECOMPRE
On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery wrote:
>
> The Aspeed pinconf data structures are split into 'conf' and 'map'
> types, where the 'conf' struct defines which register and bitfield to
> manipulate, while the 'map' struct defines what value to write to
> the register and bitfield.
>
> Bot
Hi,
On Thu, 10 Sep 2020 at 09:25, Bjorn Helgaas wrote:
>
> On Mon, Aug 24, 2020 at 01:20:25PM +0800, Jiang Biao wrote:
> > From: Jiang Biao
> >
> > pci_read_config() could block several ms in kernel space, mainly
> > caused by the while loop to call pci_user_read_config_dword().
> > Singel pci_u
[+cc Saheed]
On Fri, Aug 21, 2020 at 08:32:20PM +0800, Kai-Heng Feng wrote:
> New Intel laptops with VMD cannot reach deeper power saving state,
> renders very short battery time.
>
> As BIOS may not be able to program the config space for devices under
> VMD domain, ASPM needs to be programmed m
On Wed, 9 Sep 2020, Alexander Duyck wrote:
> On Tue, Sep 8, 2020 at 4:41 PM Hugh Dickins wrote:
> > [PATCH v18 28/32] mm/compaction: Drop locked from isolate_migratepages_block
> > Most of this consists of replacing "locked" by "lruvec", which is good:
> > but please fold those changes back into 2
From: kernel test robot
drivers/hwmon/k10temp.c:548:1-3: WARNING: PTR_ERR_OR_ZERO can be used
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: scripts/coccinelle/api/ptr_ret.cocci
Fixes: 11ba5c19102a ("hwmon: (k10temp) Take out debugfs code")
Signed-off-by: kernel test
Unregister_pm_notifier is a blocking call so suspend tasks should be
cleared beforehand. Otherwise, the notifier will wait for completion
before returning (and we encounter a 2s timeout on resume).
Fixes: 0e9952804ec9c8 (Bluetooth: Clear suspend tasks on unregister)
Signed-off-by: Abhishek Pandit-
Hi all,
Today's linux-next merge of the m68knommu tree got a conflict in:
arch/m68k/Kconfig
between commit:
dc072012bc94 ("m68k: Sort selects in main Kconfig")
from the m68k tree and commit:
ef03e4545eac ("m68knommu: switch to using asm-generic/uaccess.h")
from the m68knommu tree.
I f
The difference between hard_header_len and needed_headroom has long been
confusing to driver developers. Let's clarify it.
The understanding of the difference in this patch is based on the
following reasons:
1.
In this file, the function packet_snd first reserves a headroom of
length (dev->hard_
Fix build warnings with make W=1 as below,
1.
>> drivers/scsi/ufs/ufs-mediatek.c:116:22: warning: format '%d' expects
>> argument of type 'int', but argument 4 has type 'long int'
2.
CC [M] drivers/scsi/ufs/ufs-mediatek.o
../drivers/scsi/ufs/ufs-mediatek.c:749: error: Cannot parse struct or un
On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery wrote:
>
> When displaying which pinconf register and field is being touched, format the
> field mask so that it's consistent with the way the pinmux portion
> formats the mask.
>
> Signed-off-by: Andrew Jeffery
> ---
> drivers/pinctrl/aspeed/pinctrl-a
On 2020-08-31 18:19, Bao D. Nguyen wrote:
UFS version 3.0 and later devices require Vcc and Vccq power supplies
with Vccq2 being optional. While earlier UFS version 2.0 and 2.1
devices, the Vcc and Vccq2 are required with Vccq being optional.
Check the required power supplies used by the device
a
The pull request you sent on Wed, 9 Sep 2020 17:52:01 +:
> git://git.linux-nfs.org/projects/trondmy/linux-nfs.git tags/nfs-for-5.9-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/ab29a807a7ddaa7c84d2f4cb8d29e74e33759072
Thank you!
--
Deet-doot-dot, I am a bot.
发件人: Waiman Long
发送时间: 2020年9月9日 2:23
收件人: Zhang, Qiang; t...@linutronix.de; mi...@kernel.org; el...@google.com
抄送: linux-kernel@vger.kernel.org
主题: Re: [PATCH v3] debugobjects: install CPU hotplug callback
On 9/8/20 2:27 AM, qiang.zh...@windriver.com wr
Hi all,
Today's linux-next merge of the vfs tree got a conflict in:
arch/m68k/Kconfig
between commit:
dc072012bc94 ("m68k: Sort selects in main Kconfig")
from the m68k tree and commit:
5e6e9852d6f7 ("uaccess: add infrastructure for kernel builds with set_fs()")
from the vfs tree.
I fi
On 9/9/20 8:25 AM, Andrew Jones wrote:
>> * Provide a KVM-specific method to extract the tags from guest memory.
>>This might also have benefits in terms of providing an easy way to
>>read bulk tag data from guest memory (since the LDGM instruction
>>isn't available at EL0).
>
> Maybe
Translation for the following patches
commit 68e4cd17e218 ("docs: deprecated.rst: Add zero-length and one-element
arrays")
commit 5429ef62bcf3 ("compiler/gcc: Raise minimum GCC version for kernel builds
to 4.8")
commit 5b5bbb8cc51b ("docs: process: Add an example for creating a fixes tag")
commi
Hi Linus:
This push fixes a regression in padata.
The following changes since commit c195d66a8a75c60515819b101975f38b7ec6577f:
crypto: af_alg - Work around empty control messages without MSG_MORE
(2020-08-27 23:20:36 +1000)
are available in the Git repository at:
git://git.kernel.org/pub/
Unregister_pm_notifier is a blocking call so suspend tasks should be
cleared beforehand. Otherwise, the notifier will wait for completion
before returning (and we encounter a 2s timeout on resume).
Fixes: 0e9952804ec9c8 (Bluetooth: Clear suspend tasks on unregister)
Signed-off-by: Abhishek Pandit-
On Wed, 9 Sep 2020, Geert Uytterhoeven wrote:
>
> Thanks for your patch!
>
Thanks for your review.
> > --- a/arch/m68k/mac/config.c +++ b/arch/m68k/mac/config.c
>
> > @@ -940,6 +941,50 @@ static const struct resource mac_scsi_ccl_rsrc[]
> > __initconst = {
> > },
> > };
> >
> > +sta
This patch adds support for collecting minidump in the event of remoteproc
crash. Parse the minidump table based on remoteproc's unique minidump-id,
read all memory regions from the remoteproc's minidump table entry and
expose the memory to userspace. The remoteproc platform driver can choose
to co
On Thu, 2020-09-10 at 08:35 +1000, Herbert Xu wrote:
> On Wed, Sep 09, 2020 at 02:09:32PM -0700, Joe Perches wrote:
> > On Wed, 2020-09-09 at 13:55 -0700, Keith Busch wrote:
> > > On Wed, Sep 09, 2020 at 01:06:39PM -0700, Joe Perches wrote:
> > > > diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c
> >
On Wed, Sep 9, 2020 at 8:46 AM Sami Tolvanen wrote:
>
> On Sun, Sep 06, 2020 at 09:24:38AM +0900, Masahiro Yamada wrote:
> > On Fri, Sep 4, 2020 at 5:30 AM Sami Tolvanen
> > wrote:
> > >
> > > This patch series adds support for building x86_64 and arm64 kernels
> > > with Clang's Link Time Optim
From: Tejas Patel
Validate IOCTL ID for ZynqMP and Versal before calling
zynqmp_pm_invoke_fn().
Signed-off-by: Tejas Patel
Signed-off-by: Amit Sunil Dhamne
---
drivers/firmware/xilinx/zynqmp.c | 117 +++
1 file changed, 95 insertions(+), 22 deletions(-)
di
Add support to get last reset reason for Xilinx Versal platform.
Tejas Patel (3):
firmware: xilinx: Add validation check for IOCTL
firmware: xilinx: Add support for GET_LAST_RESET_REASON IOCTL
firmware: xilinx: Add sysfs to get last reset reason
.../ABI/stable/sysfs-driver-firmware-zynqmp
On Mon, Aug 24, 2020 at 01:20:25PM +0800, Jiang Biao wrote:
> From: Jiang Biao
>
> pci_read_config() could block several ms in kernel space, mainly
> caused by the while loop to call pci_user_read_config_dword().
> Singel pci_user_read_config_dword() loop could consume 130us+,
> |
The cros ec lightbar driver has a check in probe to fail early if the ec
device isn't the cros_ec one or if it can't read the lightbar version
from the EC. Let's move this check to the place where the lightbar
device is registered. This way we don't expose devices that aren't
actually there on devi
> They are in /sys/class/net/eth0/phydev/leds by default, because they
> are children of the PHY device and are of `leds` class, and the PHY
> subsystem creates a symlink `phydev` when PHY is attached to the
> interface.
> They are in /sys/class/leds/ as symlinks, because AFAIK everything in
> /sys
On Thu, Sep 03, 2020 at 03:52:00PM -0300, Marcelo Tosatti wrote:
> On Thu, Sep 03, 2020 at 02:36:36PM -0400, Phil Auld wrote:
> > exclusive cpusets is used now to control scheduler load balancing on
> > a group of cpus. It seems to me that this is the same idea and is part
> > of the isolation con
Looks good. Thanks Daniel.
For the series:
Reviewed-by: Arun Easi
Regards,
-Arun
On Tue, 8 Sep 2020, 1:15am, Daniel Wagner wrote:
> External Email
>
> --
> The first crash we observed is due memory corruption in the srb mem
On Wed, Sep 09, 2020 at 01:06:39PM -0700, Joe Perches wrote:
> fallthrough to a separate case/default label break; isn't very readable.
>
> Convert pseudo-keyword fallthrough; statements to a simple break; when
> the next label is case or default and the only statement in the next
> label block is
Hi, Andrzej & Neil:
Enric Balletbo i Serra 於 2020年8月26日 週三 下午4:53寫道：
>
> Convert mtk_dpi to a bridge driver with built-in encoder support for
> compatibility with existing component drivers.
>
This is a DRM-bridge related patch, how do you think about it?
Regards,
Chun-Kuang.
> Reviewed-by: C
On Wed, Sep 09, 2020 at 02:09:32PM -0700, Joe Perches wrote:
> On Wed, 2020-09-09 at 13:55 -0700, Keith Busch wrote:
> > On Wed, Sep 09, 2020 at 01:06:39PM -0700, Joe Perches wrote:
> > > diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c
> > > index eea0f453cfb6..8aac5bc60f4c 100644
> > > --- a/crypto
On Thu, Sep 03, 2020 at 03:23:59PM -0300, Marcelo Tosatti wrote:
> On Tue, Sep 01, 2020 at 12:46:41PM +0200, Frederic Weisbecker wrote:
> > == Unbound affinity ==
> >
> > Restore kernel threads, workqueue, timers, etc... wide affinity. But take
> > care of cpumasks that have been set through othe
Hi, Andrzej & Neil:
Enric Balletbo i Serra 於 2020年8月26日 週三 下午4:53寫道：
>
> This is really a cosmetic change just to make a bit more readable the
> code after convert the driver to drm_bridge. The bridge variable name
> will be used by the encoder drm_bridge, and the chained bridge will be
> named n
> if ((parser->global.usage_page << 16) != HID_UP_GOOGLEVENDOR)
> return;
I'm a bit worried about adding an early return, as it may cause issues
if someone doesn't notice when adding another case. Looking at this again
I can easily remove the second line break now that I've changed the group
From: Brad Bishop
The trailing - 8 bytes of transfer data in this size range is no
longer ignored.
Fixes: bbb6b2f9865b ("spi: Add FSI-attached SPI controller driver")
Signed-off-by: Brad Bishop
Signed-off-by: Eddie James
Reviewed-by: Joel Stanley
Signed-off-by: Joel Stanley
---
drivers/spi
The SPI controllers are not accessible if the mux isn't set. Therefore,
check the mux status before starting a transfer and fail out if it isn't
set.
Signed-off-by: Eddie James
Signed-off-by: Joel Stanley
---
drivers/spi/spi-fsi.c | 40 +++-
1 file changed, 2
From: Brad Bishop
Use a clock divider tuned to a 200MHz FSI bus frequency (the maximum). Use
of the previous divider at 200MHz results in corrupt data from endpoint
devices. Ideally the clock divider would be calculated from the FSI clock,
but that would require some significant work on the FSI d
Add a compatible string for the restricted version of the SPI controller.
The restricted version cannot process sequence loop operations and
therefore has a smaller transfer size.
Signed-off-by: Eddie James
---
Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml | 1 +
1 file changed, 1 inser
From: Brad Bishop
All of the switches in N2_count_control in the counter configuration are
required to make the branch if not equal and increment command work.
Set them when using bneq+.
A side effect of this mode requires a dummy write to TDR when both
transmitting and receiving otherwise the c
Some of the FSI-attached SPI controllers cannot use the loop command in
programming the sequencer due to security requirements. Check the
devicetree compatibility that indicates this condition and restrict the
size for these controllers. Also, add more transfers directly in the
sequence up to the l
This series implements a number of fixes for the FSI-attached SPI
controller driver.
Changes since v1:
- Switch to a new compatible string for the restricted version of the
SPI controller, rather than a new boolean parameter.
Brad Bishop (3):
spi: fsi: Handle 9 to 15 byte transfers lengths
Hi Greg,
On Wed, 9 Sep 2020 20:12:51 +0200 Greg Kroah-Hartman
wrote:
>
> I'll go revert both patches from my tree in the morning, which should
> clear these issues up.
I have reverted them from linux-next today.
--
Cheers,
Stephen Rothwell
pgpiQBPntxJ9d.pgp
Description: OpenPGP digital sign
On Thu 2020-09-10 00:15:26, Marek Behun wrote:
> On Wed, 9 Sep 2020 23:40:09 +0200
> Pavel Machek wrote:
>
> > > >
> > > > 80 columns :-) (and please fix that globally, at least at places where
> > > > it is easy, like comments).
> > > >
> > >
> > > Linux is at 100 columns now since commit b
On Wed, 9 Sep 2020 23:40:09 +0200
Pavel Machek wrote:
> > >
> > > 80 columns :-) (and please fix that globally, at least at places where
> > > it is easy, like comments).
> > >
> >
> > Linux is at 100 columns now since commit bdc48fa11e46, commited by
> > Linus. See
> > https://git.kernel.or
On 9/9/20 11:52 PM, Matthew Wilcox wrote:
> On Wed, Sep 09, 2020 at 10:47:24PM +0100, Chris Down wrote:
>> Vlastimil Babka writes:
>> > - Exit also on other signals such as SIGABRT, SIGTERM? If I write to
>> > drop_caches
>> > and think it's too long, I would prefer to kill it by ctrl-c and not ju
On Wed, 9 Sep 2020 23:42:59 +0200
Andrew Lunn wrote:
> On Wed, Sep 09, 2020 at 06:25:45PM +0200, Marek Behún wrote:
> > Hello Andrew and Pavel,
> >
> > please review these patches adding support for HW controlled LEDs.
> > The main difference from previous version is that the API is now generali
On Wed, 2020-09-09 at 15:03 -0700, Sean O'Brien wrote:
> Add vivaldi HID driver. This driver allows us to read and report the top
> row layout of keyboards which provide a vendor-defined (Google) HID
> usage.
[]
> diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
[]
> @@ -814,6 +814,13 @
+android kernel team
On 2020-09-09 10:27, risha...@codeaurora.org wrote:
On 2020-09-04 15:02, Mathieu Poirier wrote:
On Thu, Sep 03, 2020 at 06:59:44PM -0500, Bjorn Andersson wrote:
On Tue 01 Sep 17:05 CDT 2020, Mathieu Poirier wrote:
> Hi Rishabh,
>
> On Thu, Aug 27, 2020 at 12:48:48PM -0700
On 9/8/2020 11:25 AM, Yu, Yu-cheng wrote:
On 9/8/2020 10:57 AM, Dave Hansen wrote:
On 9/8/20 10:50 AM, Yu, Yu-cheng wrote:
What about this:
- Do not add any new syscall or arch_prctl for creating a new shadow
stack.
- Add a new arch_prctl that can turn an anonymous mapping to a shadow
stack
-Original Message-
Date: Wed, 19 Aug 2020 12:40:57 +0200
From: Ulf Hansson
To: "Rafael J . Wysocki" , Kevin Hilman
, linux...@vger.kernel.org
Cc: Sudeep Holla , Lorenzo Pieralisi
, Daniel Lezcano ,
Lina Iyer , Lukasz Luba , Vincent
Guittot , Stephen Boyd , Bjorn
Andersson , Benjamin G
Add vivaldi HID driver. This driver allows us to read and report the top
row layout of keyboards which provide a vendor-defined (Google) HID
usage.
Signed-off-by: Sean O'Brien
---
drivers/hid/Kconfig | 9 +++
drivers/hid/Makefile | 1 +
drivers/hid/hid-core.c| 7 ++
drivers
On Wed, 9 Sep 2020 15:15:52 -0600
Rob Herring wrote:
> On Wed, Sep 09, 2020 at 06:25:46PM +0200, Marek Behún wrote:
> > Document binding for LEDs connected to and controlled by various chips
> > (such as ethernet PHY chips).
>
> If they are h/w controlled, then why are they in DT?
The idea is
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