On Tue, Feb 9, 2021, at 5:51 PM, nnet wrote:
> On Tue, Feb 9, 2021, at 5:31 PM, nnet wrote:
> > On Tue, Feb 9, 2021, at 3:26 PM, Marek Behún wrote:
> > > On Tue, 09 Feb 2021 15:16:45 -0800
> > > nnet wrote:
> > >
> > > > I've two of these and I've just swapped them (and re-pasted the heat
> >
On Tue, Feb 09, 2021 at 05:40:49PM +0100, Michael Walle wrote:
> Registers >= 16 are paged. Be sure to set the page. It seems this was
> working for now, because the default is correct for the registers used
> in the driver at the moment. But this will also assume, nobody will
> change the page sel
On a Sapphire Rapids server, it failed to inject correctable errors
to the RCiEP device e8:02.0 which was associated with the RCEC device
e8:00.4. See the following error log before applying the patch:
aer-inject -s e8:02.0 examples/correctable
Error: Failed to write, No such device
This was beca
On Tue, Feb 09, 2021 at 05:40:48PM +0100, Michael Walle wrote:
> This bit is reserved as 'always-write-1'. While this is not a particular
> error, because we are only setting it, guard it by checking the model to
> prevent errors in the future.
>
> Signed-off-by: Michael Walle
Reviewed-by: Andre
On Tue, Feb 09, 2021 at 05:40:46PM +0100, Michael Walle wrote:
> The PHY core already resets the PHY before .config_init() if a
> .soft_reset() op is registered. Drop the open-coded ip1xx_reset().
>
> Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
Andrew
Quoting Pali Rohár (2021-01-14 04:40:28)
> When CPU frequency is at 250 MHz and set_rate() is called with 500 MHz (L1)
> quickly followed by a call with 1 GHz (L0), the CPU does not necessarily
> stay in L1 for at least 20ms as is required by Marvell errata.
>
> This situation happens frequently w
Excerpts from Christophe Leroy's message of February 10, 2021 3:03 am:
>
>
> Le 09/02/2021 à 15:31, David Laight a écrit :
>> From: Segher Boessenkool
>>> Sent: 09 February 2021 13:51
>>>
>>> On Tue, Feb 09, 2021 at 12:36:20PM +1000, Nicholas Piggin wrote:
What if you did this?
>>>
+sta
Quoting Pali Rohár (2021-01-14 04:40:27)
> It was observed that the workaround introduced by commit 61c40f35f5cd
> ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to
> 1.2GHz") when base CPU frequency is 1.2 GHz is also required when base
> CPU frequency is 1 GHz. Otherwise swi
Quoting Pali Rohár (2021-01-14 04:40:25)
> From: Marek Behún
>
> Remove the .set_parent method in clk_pm_cpu_ops.
>
> This method was supposed to be needed by the armada-37xx-cpufreq driver,
> but was never actually called due to wrong assumptions in the cpufreq
> driver. After this was fixed in
Excerpts from Christophe Leroy's message of February 10, 2021 12:31 am:
>
>
> Le 09/02/2021 à 03:02, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> For book3s/64, FULL_REGS() is 'true' at all time, so the test voids.
>>> For others, non vola
On Tue, Feb 09, 2021 at 05:40:45PM +0100, Michael Walle wrote:
> Don't sometimes use the address operator and sometimes not. Drop it and
> make the code look uniform.
>
> Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
Andrew
On Tue, Feb 9, 2021 at 5:40 PM Roman Gushchin wrote:
>
> On Tue, Feb 09, 2021 at 05:25:16PM -0800, Yang Shi wrote:
> > On Tue, Feb 9, 2021 at 5:10 PM Roman Gushchin wrote:
> > >
> > > On Tue, Feb 09, 2021 at 09:46:42AM -0800, Yang Shi wrote:
> > > > Currently the number of deferred objects are pe
On Tue, Feb 09, 2021 at 05:40:44PM +0100, Michael Walle wrote:
> According to the datasheet of the IP101A/G there is no revision field
> and MII_PHYSID2 always reads as 0x0c54. Use PHY_ID_MATCH_EXACT() then.
>
> Signed-off-by: Michael Walle
Lets hope the datasheet is correct and up to date, beca
Excerpts from Christophe Leroy's message of February 10, 2021 2:13 am:
>
>
> Le 09/02/2021 à 02:55, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> When r3 is not modified, reload it from regs->orig_r3 to free
>>> volatile registers. This avo
On Tue, Feb 9, 2021 at 5:34 PM Roman Gushchin wrote:
>
> On Tue, Feb 09, 2021 at 05:12:51PM -0800, Yang Shi wrote:
> > On Tue, Feb 9, 2021 at 4:39 PM Roman Gushchin wrote:
> > >
> > > On Tue, Feb 09, 2021 at 09:46:41AM -0800, Yang Shi wrote:
> > > > Currently registered shrinker is indicated by n
On Tue, Feb 09, 2021 at 05:40:43PM +0100, Michael Walle wrote:
> Simpify the initializations of the structures. There is no functional
> change.
>
> Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
Andrew
On Tue, Feb 09, 2021 at 05:38:52PM +0100, Michael Walle wrote:
> At the moment, PORT_MII is reported in the ethtool ops. This is odd
> because it is an interface between the MAC and the PHY and no external
> port. Some network card drivers will overwrite the port to twisted pair
> or fiber, though.
On Tue, Feb 9, 2021 at 5:27 PM Roman Gushchin wrote:
>
> On Tue, Feb 09, 2021 at 09:46:43AM -0800, Yang Shi wrote:
> > Use per memcg's nr_deferred for memcg aware shrinkers. The shrinker's
> > nr_deferred
> > will be used in the following cases:
> > 1. Non memcg aware shrinkers
> > 2. !C
On Tue, Feb 9, 2021, at 5:31 PM, nnet wrote:
> On Tue, Feb 9, 2021, at 3:26 PM, Marek Behún wrote:
> > On Tue, 09 Feb 2021 15:16:45 -0800
> > nnet wrote:
> >
> > > I've two of these and I've just swapped them (and re-pasted the heat
> > > sinks).
> > >
> > > The second one ran under load for aw
> @@ -1552,6 +1552,7 @@ static int marvell_read_status_page(struct phy_device
> *phydev, int page)
> phydev->asym_pause = 0;
> phydev->speed = SPEED_UNKNOWN;
> phydev->duplex = DUPLEX_UNKNOWN;
> + phydev->port = fiber ? PORT_FIBRE : PORT_TP;
>
> if (phydev->autoneg ==
l-dvb tree from next-20210209 for today.
--
Cheers,
Stephen Rothwell
pgpMGzEs9n9ZT.pgp
Description: OpenPGP digital signature
On Tue, Feb 09, 2021 at 05:25:16PM -0800, Yang Shi wrote:
> On Tue, Feb 9, 2021 at 5:10 PM Roman Gushchin wrote:
> >
> > On Tue, Feb 09, 2021 at 09:46:42AM -0800, Yang Shi wrote:
> > > Currently the number of deferred objects are per shrinker, but some
> > > slabs, for example,
> > > vfs inode/de
While this is done for all bitmaps, the original use case in mind was
for CPU masks and cpulist_parse() as described below.
It seems that a common configuration is to use the 1st couple cores for
housekeeping tasks. This tends to leave the remaining ones to form a
pool of similarly configured cor
The basic objective here was to add support for "nohz_full=8-N" and/or
"rcu_nocbs="4-N" -- essentially introduce "N" as a portable reference
to the last core, evaluated at boot for anything using a CPU list.
The thinking behind this, is that people carve off a few early CPUs to
support housekeepin
On Tue, Feb 09, 2021 at 05:12:51PM -0800, Yang Shi wrote:
> On Tue, Feb 9, 2021 at 4:39 PM Roman Gushchin wrote:
> >
> > On Tue, Feb 09, 2021 at 09:46:41AM -0800, Yang Shi wrote:
> > > Currently registered shrinker is indicated by non-NULL
> > > shrinker->nr_deferred.
> > > This approach is fine
It makes sense to do all the checks in check_region() and not 1/2
in check_region and 1/2 in set_region.
Since set_region is called immediately after check_region, the net
effect on runtime is zero, but it gets rid of an if (...) return...
Cc: Yury Norov
Cc: Rasmus Villemoes
Cc: Andy Shevchenko
As of [1], we no longer want EXT4_KUNIT_TESTS and others to `select`
their deps. This means it can get harder to get all the right things
selected as we gain more tests w/ more deps over time.
This patch (and [2]) proposes we store kunitconfig fragments in-tree to
represent sets of tests. (N.B. ri
On Tue, Feb 09, 2021 at 05:07:07PM -0800, Yang Shi wrote:
> On Tue, Feb 9, 2021 at 4:22 PM Roman Gushchin wrote:
> >
> > On Tue, Feb 09, 2021 at 09:46:40AM -0800, Yang Shi wrote:
> > > The shrinker_info is dereferenced in a couple of places via
> > > rcu_dereference_protected
> > > with different
These are copies of existing tests, with just 31 --> N. This ensures
the recently added "N" alias transparently works in any normally
numeric fields of a region specification.
Cc: Yury Norov
Cc: Rasmus Villemoes
Cc: Andy Shevchenko
Signed-off-by: Paul Gortmaker
---
lib/test_bitmap.c | 10 +++
On Tue, Feb 9, 2021, at 3:26 PM, Marek Behún wrote:
> On Tue, 09 Feb 2021 15:16:45 -0800
> nnet wrote:
>
> > I've two of these and I've just swapped them (and re-pasted the heat sinks).
> >
> > The second one ran under load for awhile and now has frozen as well.
> >
> > Under a moderate load `w
On Mon, Feb 08, 2021 at 03:59:47PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.10.15 release.
> There are 120 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me kno
On Tue, Feb 9, 2021 at 5:10 PM Roman Gushchin wrote:
>
> On Tue, Feb 09, 2021 at 09:46:42AM -0800, Yang Shi wrote:
> > Currently the number of deferred objects are per shrinker, but some slabs,
> > for example,
> > vfs inode/dentry cache are per memcg, this would result in poor isolation
> > amo
On Tue, Feb 09, 2021 at 09:46:43AM -0800, Yang Shi wrote:
> Use per memcg's nr_deferred for memcg aware shrinkers. The shrinker's
> nr_deferred
> will be used in the following cases:
> 1. Non memcg aware shrinkers
> 2. !CONFIG_MEMCG
> 3. memcg is disabled by boot parameter
>
> Signed
On Mon, Feb 08, 2021 at 01:55:54PM -0500, Jonathan Marek wrote:
> The cleanup patch broke a6xx_gmu_clear_oob, fix it by adding the missing
> bitshift operation.
>
> Fixes: 555c50a4a19b ("drm/msm: Clean up GMU OOB set/clear handling")
> Signed-off-by: Jonathan Marek
Thanks. I feel silly that I m
Hello,
syzbot found the following issue on:
HEAD commit:dd86e7fa Merge tag 'pci-v5.11-fixes-2' of git://git.kernel..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=105930c4d0
kernel config: https://syzkaller.appspot.com/x/.config?x=266a5362c89c8127
das
On Tue, 09 Feb 2021 16:58:12 -0600
Tom Zanussi wrote:
> Did you apply '[PATCH v7 5/6] selftests/ftrace: Update synthetic event
> syntax errors' before you ran the test? It actually removes the test
> that failed. Here's what I get with all patches applied:
I thought I did, but I forgot that I
On Tue, Feb 09, 2021 at 09:46:44AM -0800, Yang Shi wrote:
> Now nr_deferred is available on per memcg level for memcg aware shrinkers, so
> don't need
> allocate shrinker->nr_deferred for such shrinkers anymore.
>
> The prealloc_memcg_shrinker() would return -ENOSYS if !CONFIG_MEMCG or memcg
> i
On Mon, Feb 08, 2021 at 04:00:32PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.4.97 release.
> There are 65 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
On Tue, Feb 09, 2021 at 09:46:45AM -0800, Yang Shi wrote:
> Now shrinker's nr_deferred is per memcg for memcg aware shrinkers, add to
> parent's
> corresponding nr_deferred when memcg offline.
>
> Acked-by: Vlastimil Babka
> Acked-by: Kirill Tkhai
> Signed-off-by: Yang Shi
Acked-by: Roman Gus
From: Peter Shier
Fixes: 678e90a349a4 ("KVM: selftests: Test IPI to halted vCPU in xAPIC while
backing page moves")
Cc: Andrew Jones
Cc: Jim Mattson
Signed-off-by: Peter Shier
Signed-off-by: Sean Christopherson
---
Delta patch taken verbatim from Peter's original submission. Applying the
o
On Tue, Feb 9, 2021 at 1:43 AM Mike Rapoport wrote:
>
> This a small cleanup in memblock for 5.12 merge window.
If it's going to make Andrew's patches easier to apply during the 5.12
timeframe, I'm happy to pull this early.
Yes/No?
Linus
On Mon, Feb 08, 2021 at 04:00:47PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.175 release.
> There are 38 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me kno
On Tue, 2021-02-09 at 19:44 +, Song Liu wrote:
> > On Feb 9, 2021, at 10:59 AM, Joe Perches wrote:
> > On Tue, 2021-02-09 at 10:33 -0800, Song Liu wrote:
> > > BPF programs explicitly initialise global variables to 0 to make sure
> > > clang (v10 or older) do not put the variables in the commo
On Tue, Feb 9, 2021 at 4:39 PM Roman Gushchin wrote:
>
> On Tue, Feb 09, 2021 at 09:46:41AM -0800, Yang Shi wrote:
> > Currently registered shrinker is indicated by non-NULL
> > shrinker->nr_deferred.
> > This approach is fine with nr_deferred at the shrinker level, but the
> > following
> > pat
On Tue, Feb 09, 2021 at 09:46:42AM -0800, Yang Shi wrote:
> Currently the number of deferred objects are per shrinker, but some slabs,
> for example,
> vfs inode/dentry cache are per memcg, this would result in poor isolation
> among memcgs.
>
> The deferred objects typically are generated by __
As it turns out, vendor HDMI PHY driver for H6 has a pretty big table
of predefined values for various pixel clocks. However, most of them are
not useful/tested because they come from reference driver code. Vendor
PHY driver is concerned with only few of those, namely 27 MHz, 74.25
MHz, 148.5 MHz,
This patch fixes a warning, of the line ending with a '(',
generated by checkpatch.pl.
Signed-off-by: Mukul Mehar
---
Changes since v1:
- Fixed indentation.
---
drivers/staging/most/sound/sound.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/most/soun
On Tue, Feb 9, 2021 at 4:22 PM Roman Gushchin wrote:
>
> On Tue, Feb 09, 2021 at 09:46:40AM -0800, Yang Shi wrote:
> > The shrinker_info is dereferenced in a couple of places via
> > rcu_dereference_protected
> > with different calling conventions, for example, using mem_cgroup_nodeinfo
> > help
On Tue, Feb 09, 2021 at 09:13:43PM +0100, Uladzislau Rezki wrote:
> On Thu, Feb 04, 2021 at 01:46:48PM -0800, Paul E. McKenney wrote:
> > On Fri, Jan 29, 2021 at 09:05:04PM +0100, Uladzislau Rezki (Sony) wrote:
> > > To stress and test a single argument of kfree_rcu() call, we
> > > should to have
On Tue, Feb 9, 2021 at 4:54 PM Stephen Boyd wrote:
>
> Quoting tudor.amba...@microchip.com (2021-02-08 01:49:45)
> > Hi, Michael, Stephen,
> >
> > Do you plan to take this patch for v5.12?
> > If fw_devlink will remain set to ON for v5.12, some of our boards will
> > no longer boot without this pa
From: Thomas Gleixner
There is no reason to have this as a seperate function for a single caller.
Signed-off-by: Thomas Gleixner
Reviewed-by: Kees Cook
---
V2: Adopt to the new header file.
---
arch/x86/include/asm/irq_stack.h |3 +--
arch/x86/include/asm/softirq_stack.h | 11 ++
Quoting Tudor Ambarus (2021-02-03 07:43:32)
> These are all "early clocks" that require initialization just at
> of_clk_init() time. Use CLK_OF_DECLARE() to declare them.
>
> This also fixes a problem that was spotted when fw_devlink was
> set to 'on' by default: the boards failed to boot. The rea
To avoid include recursion hell move the do_softirq_own_stack() related
content into a generic asm header and include it from all places in arch/
which need the prototype.
This allows architectures to provide an inline implementation of
do_softirq_own_stack() without introducing a lot of #ifdeffer
From: Thomas Gleixner
To avoid yet another macro implementation reuse the existing
run_sysvec_on_irqstack_cond() and move the set_irq_regs() handling into the
called function. Makes the code even simpler.
Signed-off-by: Thomas Gleixner
Reviewed-by: Kees Cook
---
arch/x86/entry/common.c | 1
To prepare for inlining do_softirq_own_stack() replace
__ARCH_HAS_DO_SOFTIRQ with a Kconfig switch and select it in the affected
architectures.
This allows in the next step to move the function prototype and the inline
stub into a seperate asm-generic header file which is required to avoid
include
From: Thomas Gleixner
To inline the stack switching and to prepare for enabling
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK provide a macro template for system
vectors and device interrupts and convert the system vectors over to it.
Signed-off-by: Thomas Gleixner
Reviewed-by: Kees Cook
---
V2: Adopt to
Quoting tudor.amba...@microchip.com (2021-02-08 01:49:45)
> Hi, Michael, Stephen,
>
> Do you plan to take this patch for v5.12?
> If fw_devlink will remain set to ON for v5.12, some of our boards will
> no longer boot without this patch.
Is fw_devlink defaulted to on for v5.12?
From: Thomas Gleixner
sysvec_spurious_apic_interrupt() calls into the handling body of
__spurious_interrupt() which is not obvious as that function is declared
inside the DEFINE_IDTENTRY_IRQ(spurious_interrupt) macro.
As __spurious_interrupt() is currently always inlined this ends up with two
co
Hello,
syzbot found the following issue on:
HEAD commit:dd86e7fa Merge tag 'pci-v5.11-fixes-2' of git://git.kernel..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=13e43f90d0
kernel config: https://syzkaller.appspot.com/x/.config?x=e83e68d0a6aba5f6
das
From: Thomas Gleixner
Now that all invocations of irq_exit_rcu() happen on the irq stack, turn on
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK which causes the core code to invoke
__do_softirq() directly without going through do_softirq_own_stack().
That means do_softirq_own_stack() is only invoked from ta
From: Thomas Gleixner
Embracing a callout into instrumentation_begin() / instrumentation_begin()
does not really make sense. Make the latter instrumentation_end().
Fixes: 2f6474e4636b ("x86/entry: Switch XEN/PV hypercall entry to IDTENTRY")
Signed-off-by: Thomas Gleixner
Reviewed-by: Kees Cook
This is the second version of this series. V1 is available here:
https://lore.kernel.org/r/20210204204903.350275...@linutronix.de
The recent effort to make the ASM entry code slim and unified moved
the irq stack switching out of the low level ASM code so that the
whole return from interrupt wor
From: Thomas Gleixner
Convert device interrupts to inline stack switching by replacing the
existing macro implementation with the new inline version. Tweak the
function signature of the actual handler function to have the vector
argument as u32. That allows the inline macro to avoid extra interme
From: Thomas Gleixner
Use the new inline stack switching and remove the old ASM indirect call
implementation.
Signed-off-by: Thomas Gleixner
Reviewed-by: Kees Cook
---
arch/x86/entry/entry_64.S| 39 -
arch/x86/include/asm/irq_stack.h | 52 -
From: Thomas Gleixner
The effort to make the ASM entry code slim and unified moved the irq stack
switching out of the low level ASM code so that the whole return from
interrupt work and state handling can be done in C and the ASM code just
handles the low level details of entry and exit.
This en
From: Thomas Gleixner
The per CPU hardirq_stack_ptr contains the pointer to the irq stack in the
form that it is ready to be assigned to [ER]SP so that the first push ends
up on the top entry of the stack.
But the stack switching on 64 bit has the following rules:
1) Store the current stack
From: Thomas Gleixner
The recursion protection for hard interrupt stacks is an unsigned int per
CPU variable initialized to -1 named __irq_count.
The irq stack switching is only done when the variable is -1, which creates
worse code than just checking for 0. When the stack switching happens it
A region is a standalone entity to some degree, but it needs to
be paired with a bitmap width in order to set context and determine
if the region even fits into the width of the bitmap.
This will reduce parameter passing and enable using nbits as part
of future dynamic region parameter parsing.
C
Most a6xx targets have security issues that were fixed with new versions
of the microcode(s). Make sure that we are booting with a safe version of
the microcode for the target and print a message and error if not.
v2: Add more informative error messages and fix typos
Signed-off-by: Jordan Crouse
With the core bitmap support now accepting "N" as a placeholder for
the end of the bitmap, "all" can be represented as "0-N" and has the
advantage of not being specific to RCU (or any other subsystem).
So deprecate the use of "all" by removing documentation references
to it. The support itself ne
On Tue, 9 Feb 2021 02:51:31 +
Jianlin Lv wrote:
>
>
> > -Original Message-
> > From: Masami Hiramatsu
> > Sent: Monday, February 8, 2021 8:33 PM
> > To: Jianlin Lv
> > Cc: pet...@infradead.org; mi...@redhat.com; a...@kernel.org; Mark
> > Rutland ; alexander.shish...@linux.intel.co
This block of tests was meant to find/flag incorrect use of the ":"
and "/" separators (syntax errors) and invalid (zero) group len.
However they were specified with an 8 bit width and 32 bit operations,
so they really contained two errors (EINVAL and ERANGE).
Promote them to 32 bit so it is clea
There are inputs to bitmap_parselist() that would probably never
be entered manually by a person, but might result from some kind of
automated input generator. Things like ranges of length 1, or group
lengths longer than nbits, overlaps, or offsets of zero.
Adding these tests serve two purposes:
ath10k_mac_get_rate_flags_ht() floods dmesg with the following messages,
when it fails to find a match for mcs=7 and rate=1440.
supported_ht_mcs_rate_nss2:
{7, {1300, 2700, 1444, 3000} }
ath10k_pci :02:00.0: invalid ht params rate 1440 100kbps nss 2 mcs 7
dev_warn_ratelimited() isn't helpin
ath10k_drain_tx() must not be called with conf_mutex held as workers can
use that also. Add check to detect conf_mutex held calls.
Signed-off-by: Shuah Khan
---
drivers/net/wireless/ath/ath10k/mac.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/wireless/ath/ath10k/mac.c
b/driv
Based on the comment block in this function and the FIXME for this, peer
being present for the offchannel tx is unlikely. Peer is deleted once tx
is complete. Change peer present msg to a warn to detect this condition.
Signed-off-by: Shuah Khan
---
drivers/net/wireless/ath/ath10k/mac.c | 5 ++---
On 2/9/21 7:27 PM, Waiman Long wrote:
On 2/9/21 5:25 PM, Guenter Roeck wrote:
On Tue, Feb 09, 2021 at 04:46:02PM -0500, Waiman Long wrote:
On 2/9/21 3:39 PM, Guenter Roeck wrote:
On Tue, Feb 02, 2021 at 10:57:12AM -0800, Ben Gardon wrote:
rwlocks do not currently have any facility to detect c
Add tests that specify a valid range, but one that is outside the
width of the bitmap for which it is to be applied to. These should
trigger an -ERANGE response from the code.
Cc: Yury Norov
Cc: Rasmus Villemoes
Cc: Andy Shevchenko
Signed-off-by: Paul Gortmaker
---
lib/test_bitmap.c | 2 ++
ieee80211_find_sta_by_ifaddr() must be called under the RCU lock and
the resulting pointer is only valid under RCU lock as well.
Fix ath10k_wmi_tlv_parse_peer_stats_info() to hold RCU lock before it
calls ieee80211_find_sta_by_ifaddr() and release it when the resulting
pointer is no longer needed.
ath10k_debug_fw_stats_request() is called ath10k_sta_statistics()
without holding conf_mutex. ath10k_debug_fw_stats_request() simply
returns when CONFIG_ATH10K_DEBUGFS is disabled.
When CONFIG_ATH10K_DEBUGFS is enabled, ath10k_debug_fw_stats_request()
code path isn't protected. This assert is trig
I have been seeing lockdep asserts for a couple of months and finally
found time to debug and fix the problems. The dmesg looks clean with
these fixes.
Enabling LOCKDEP and ATH10K_DEBUGFS triggers the lockdep assert and
RCU warns.
The first two patches in this series are fixes to lockdep assert a
On Tue, Feb 09, 2021 at 09:46:41AM -0800, Yang Shi wrote:
> Currently registered shrinker is indicated by non-NULL shrinker->nr_deferred.
> This approach is fine with nr_deferred at the shrinker level, but the
> following
> patches will move MEMCG_AWARE shrinkers' nr_deferred to memcg level, so th
Amazon NVMe controllers do not support 64-bit DMA addresses; they are
limited to 48-bit DMA addresses. Let's add a quirk to ensure that we
make use of 48-bit DMA addresses to avoid misbehavior.
This affects all Amazon NVMe controllers that expose EBS volumes
(0x0061, 0x0065, 0x8061) and local ins
> -Original Message-
> From: Finn Thain [mailto:fth...@telegraphics.com.au]
> Sent: Wednesday, February 10, 2021 1:29 PM
> To: Song Bao Hua (Barry Song)
> Cc: tanxiaofei ; j...@linux.ibm.com;
> martin.peter...@oracle.com; linux-s...@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux
-20210209 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
c9439ca36342fb6013187d0a69aef92736951476)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin
> Right at the beginning - we implemented PP function into the Kernel
> driver like the SDMA operation (This is the RX/TX DMA engine).
> We do plan to port more and more PP functions as Kernel drivers
> along the way.
It will be interesting to see how well you manage to handle the 'split
brain' p
On Tue, 9 Feb 2021, Song Bao Hua (Barry Song) wrote:
> > On Tue, 9 Feb 2021, Song Bao Hua (Barry Song) wrote:
> >
> > > > On Sun, 7 Feb 2021, Xiaofei Tan wrote:
> > > >
> > > > > Replace spin_lock_irqsave with spin_lock in hard IRQ of SCSI
> > > > > drivers. There are no function changes, but ma
On 2/9/21 5:25 PM, Guenter Roeck wrote:
On Tue, Feb 09, 2021 at 04:46:02PM -0500, Waiman Long wrote:
On 2/9/21 3:39 PM, Guenter Roeck wrote:
On Tue, Feb 02, 2021 at 10:57:12AM -0800, Ben Gardon wrote:
rwlocks do not currently have any facility to detect contention
like spinlocks do. In order t
On 2/8/2021 7:37 PM, Jason Wang wrote:
On 2021/2/6 下午8:29, Si-Wei Liu wrote:
While virtq is stopped, get_vq_state() is supposed to
be called to get sync'ed with the latest internal
avail_index from device. The saved avail_index is used
to restate the virtq once device is started. Co
On Fri, Feb 05, 2021 at 12:25:22PM -0600, Timur Tabi wrote:
> I can extend make-printk-non-secret to %pK if everyone agrees.
Let's just leave those alone. There is already a toggle for that in
/proc.
--
Kees Cook
On Tue, Feb 09, 2021 at 09:46:40AM -0800, Yang Shi wrote:
> The shrinker_info is dereferenced in a couple of places via
> rcu_dereference_protected
> with different calling conventions, for example, using mem_cgroup_nodeinfo
> helper
> or dereferencing memcg->nodeinfo[nid]->shrinker_info. And th
On Wed, Feb 10, 2021 at 02:17:57AM +0300, Andrey Rybainin wrote:
> Subject: ubsan: Require GCC-8+ or Clang to use UBSAN
>
> Just like how we require GCC-8.2 for KASAN due to compiler bugs, require
> a sane version of GCC for UBSAN.
>
> Specifically, before GCC-8 UBSAN
On Wed, Feb 10, 2021 at 02:23:48AM +0300, Andrey Ryabinin wrote:
> Since GCC 8.0 -fsanitize=signed-integer-overflow doesn't work with -fwrapv.
> -fwrapv makes signed overflows defines and GCC essentially disables
> ubsan checks. On GCC < 8.0 -fwrapv doesn't have influence on
> -fsanitize=signed-int
On Tue, Feb 09, 2021 at 03:33:56PM -0800, Yang Shi wrote:
> On Tue, Feb 9, 2021 at 12:50 PM Roman Gushchin wrote:
> >
> > On Tue, Feb 09, 2021 at 09:46:39AM -0800, Yang Shi wrote:
> > > The following patch is going to add nr_deferred into shrinker_map, the
> > > change will
> > > make shrinker_ma
On 2/9/21 2:59 PM, Josh Poimboeuf wrote:
> On Mon, Feb 08, 2021 at 01:39:03PM -0800, Randy Dunlap wrote:
>> On 2/8/21 1:21 PM, Josh Poimboeuf wrote:
>>> On Mon, Feb 08, 2021 at 11:30:59AM -0800, Randy Dunlap wrote:
On 2/8/21 4:52 AM, Stephen Rothwell wrote:
> Hi all,
>
> Changes si
I am getting some compilation error on when using CONFIG_X86_32 kernel
configuration
arch/x86/entry/vdso/vdso32/../vclock_gettime.c:29:1:
error: ‘-mindirect-branch’ and ‘-fcf-protection’ are not compatible
add -fcf-protection=none when CONFIG_RETPOLINE=y
Signed-off-by: Tong Zhang
---
arch/x86
Cc: Dan Williams
Cc: Vishal Verma
Cc: Ira Weiny
Cc: Alison Schofield
Signed-off-by: Ben Widawsky
---
MAINTAINERS | 11 +++
1 file changed, 11 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6eff4f720c72..93c8694a8f04 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -,6 +4
Add initial set of formal commands beyond basic identify and command
enumeration.
Of special note is the Get Log Command which is only specified to return
2 log types, CEL and VENDOR_DEBUG. Given that VENDOR_DEBUG is already a
large catch all for vendor specific information there is no known reaso
CXL devices identified by the memory-device class code must implement
the Device Command Interface (described in 8.2.9 of the CXL 2.0 spec).
While the driver already maintains a list of commands it supports, there
is still a need to be able to distinguish between commands that the
driver knows abou
The CXL memory device send interface will have a number of supported
commands. The raw command is not such a command. Raw commands allow
userspace to send a specified opcode to the underlying hardware and
bypass all driver checks on the command. This is useful for a couple of
usecases, mainly:
1. U
201 - 300 of 1488 matches
Mail list logo
