Hello Hermes,
> Hermes Zhang hat am 24.03.2021 03:48 geschrieben:
>
>
> From: Hermes Zhang
>
> Document the device tree bindings of the multiple GPIOs LED driver
> Documentation/devicetree/bindings/leds/leds-multi-gpio.yaml.
>
> Signed-off-by: Hermes Zhang
> ---
>
> Notes:
> Add
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 7acac4b3196caee5e21fb5ea53f8bc124e6a16fc
commit: a9c56721d6ae99b22e983d0722e6b1b53a11dd59 dmaengine: dw: platform: Use
devm_platform_ioremap_resource()
date: 1 year, 7 months ago
config:
Hi Shawn,
ping, do this patches need some ACK from some one?
Regards,
Oleksij
On Tue, Mar 09, 2021 at 12:26:08PM +0100, Oleksij Rempel wrote:
> changes v2:
> - rebase against latest kernel
> - fix networking on RIoTBoard
>
> This patch series tries to remove most of the imx6 and imx7 board
>
On Tue, Mar 23, 2021 at 10:58:18PM +0100, Heiko Carstens wrote:
> Li Wang reported that clock_gettime(CLOCK_MONOTONIC_RAW, ...) returns
> incorrect values when time is provided via vdso instead of system call:
>
> vdso_ts_nsec = 4484351380985507, vdso_ts.tv_sec = 4484351, vdso_ts.tv_nsec =
>
s/unconditonally/unconditionally/
s/gaurantees/guarantees/
Signed-off-by: Bhaskar Chowdhury
---
arch/arc/kernel/signal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c
index a78d8f745a67..cf1788fd3812 100644
---
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0.
Changes:
v1 --> v2:
Suggested by Lucas, don't use the boolean property to specify the
different power supplies to PCIe PHY.
Use one regulator to power up PCIe PHY, and the regulator APIs to
get the voltage of it.
[PATCH v2 1/3] dt-bindings: imx6q-pcie: add one regulator used to
[PATCH v2 2/3]
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0.
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0.
Sure, here it is:
snow / # lspci -vxxx -s 7.0
00:07.0 ISA bridge: Contaq Microsystems 82c693
Flags: bus master, medium devsel, latency 0
Kernel modules: pata_cypress
00: 80 10 93 c6 47 00 80 02 00 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00
From: Zhichao Cai
Fixes coccicheck warning:
drivers/staging/media/atomisp/pci/sh_css_params.c:4652:24-26: WARNING !A || A
&& B is equivalent to !A || B
Signed-off-by: Zhichao Cai
---
drivers/staging/media/atomisp/pci/sh_css_params.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
The section "19) Editor modelines and other cruft" in
Documentation/process/coding-style.rst clearly says,
"Do not include any of these in source files."
I recently receive a patch to explicitly add a new one.
Let's do treewide cleanups, otherwise some people follow the existing
code and attempt
On Wed, Mar 24, 2021 at 04:34:34AM +, Matthew Wilcox wrote:
> On Tue, Mar 23, 2021 at 08:31:31PM -0700, Minchan Kim wrote:
> > On Wed, Mar 24, 2021 at 03:02:24AM +, Matthew Wilcox wrote:
> > > On Tue, Mar 23, 2021 at 12:50:50PM -0700, Minchan Kim wrote:
> > > > + /* the number of CMA
On Tue, Mar 23, 2021 at 09:47:27PM -0700, John Hubbard wrote:
> On 3/23/21 8:27 PM, Minchan Kim wrote:
> ...
> > > > +static int __init cma_sysfs_init(void)
> > > > +{
> > > > + unsigned int i;
> > > > +
> > > > + cma_kobj_root = kobject_create_and_add("cma", mm_kobj);
> > > > +
On 2021/3/24 12:04, Namhyung Kim wrote:
On Wed, Mar 24, 2021 at 12:47 PM Like Xu wrote:
Hi Namhyung,
On 2021/3/24 9:32, Namhyung Kim wrote:
Hello,
On Mon, Mar 22, 2021 at 3:14 PM Like Xu wrote:
+void reserve_lbr_buffers(struct perf_event *event)
+{
+ struct kmem_cache *kmem_cache =
fill fw version info into smem to be printed as part of
soc info.
Signed-off-by: Dikshita Agarwal
---
drivers/media/platform/qcom/venus/hfi_msgs.c | 36 ++--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/qcom/venus/hfi_msgs.c
Commit 0cd39f4600ed ("locking/seqlock, headers: Untangle the spaghetti monster")
introduces 'struct ww_acquire_ctx' again, remove the repeated declaration and
move
the pre-declarations to the top.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Will Deacon
Cc: Waiman Long
Cc: Boqun Feng
Acked-by:
Update fpga Kconfig/Makefile and add Kconfig/Makefile for new drivers.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
MAINTAINERS| 11 +++
drivers/Makefile | 1 +
drivers/fpga/Kconfig | 2 ++
Add DDR calibration driver. DDR calibration is a hardware function
discovered by walking firmware metadata. A platform device node will
be created for it. Hardware provides DDR calibration status through
this function.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
Add clock frequency counter driver. Clock frequency counter is
a hardware function discovered by walking xclbin metadata. A platform
device node will be created for it. Other part of driver can read the
actual clock frequency through clock frequency counter driver.
Signed-off-by: Sonal Santan
Add partition isolation platform driver. partition isolation is
a hardware function discovered by walking firmware metadata.
A platform device node will be created for it. Partition isolation
function isolate the different fpga regions
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Add devctl driver. devctl is a type of hardware function which only has
few registers to read or write. They are discovered by walking firmware
metadata. A platform device node will be created for them.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
Add clock driver. Clock is a hardware function discovered by walking
xclbin metadata. A platform device node will be created for it. Other
part of driver configures clock through clock driver.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
Add User Clock Subsystem (UCS) driver. UCS is a hardware function
discovered by walking xclbin metadata. A platform device node will be
created for it. UCS enables/disables the dynamic region clocks.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
ICAP stands for Hardware Internal Configuration Access Port. ICAP is
discovered by walking firmware metadata. A platform device node will be
created for it. FPGA bitstream is written to hardware through ICAP.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
Add VSEC driver. VSEC is a hardware function discovered by walking
PCI Express configure space. A platform device node will be created
for it. VSEC provides board logic UUID and few offset of other hardware
functions.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
fpga-mgr and region implementation for xclbin download which will be
called from main platform driver
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/mgmt/fmgr-drv.c| 191 +++
drivers/fpga/xrt/mgmt/fmgr.h| 19 ++
The PCIE device driver which attaches to management function on Alveo
devices. It instantiates one or more group drivers which, in turn,
instantiate platform drivers. The instantiation of group and platform
drivers is completely dtb driven.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
platform driver that handles IOCTLs, such as hot reset and xclbin download.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/include/xmgmt-main.h | 34 ++
drivers/fpga/xrt/mgmt/main.c | 670 ++
Helper functions for char device node creation / removal for platform
drivers. This is part of platform driver infrastructure.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/lib/cdev.c | 232
1 file
Contains common code for all root drivers and handles root calls from
platform drivers. This is part of root driver infrastructure.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/include/events.h | 45 +++
drivers/fpga/xrt/include/xroot.h
Infrastructure code providing APIs for managing leaf driver instance
groups, facilitating inter-leaf driver calls and root calls.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/lib/subdev.c | 865 ++
1 file
xrt-lib kernel module infrastructure code to register and manage all
leaf driver modules.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/include/subdev_id.h | 38
drivers/fpga/xrt/include/xleaf.h | 264 +
group driver that manages life cycle of a bunch of leaf driver instances
and bridges them with root.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/include/group.h | 25 +++
drivers/fpga/xrt/lib/group.c | 286
XRT drivers use device tree as metadata format to discover HW subsystems
behind PCIe BAR. Thus libfdt functions are called for the driver to parse
device tree blob.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
drivers/fpga/xrt/include/metadata.h | 233
Alveo FPGA firmware and partial reconfigure file are in xclbin format. This
code enumerates and extracts sections from xclbin files. xclbin.h is cross
platform and used across all platforms and OS.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
Describe XRT driver architecture and provide basic overview of
Xilinx Alveo platform.
Signed-off-by: Sonal Santan
Signed-off-by: Max Zhen
Signed-off-by: Lizhi Hou
---
Documentation/fpga/index.rst | 1 +
Documentation/fpga/xrt.rst | 844 +++
2 files changed,
Hello,
This is V4 of patch series which adds management physical function driver
for Xilinx Alveo PCIe accelerator cards.
https://www.xilinx.com/products/boards-and-kits/alveo.html
This driver is part of Xilinx Runtime (XRT) open source stack.
The V4 patch series do not include bus_type
On Wed, Mar 24, 2021 at 05:09:59AM +, Al Viro wrote:
> On Mon, Mar 22, 2021 at 03:49:01PM +0100, Miklos Szeredi wrote:
> Umm... No equivalents of
> /*
> * Prevent copy up if immutable and has no CAP_LINUX_IMMUTABLE
> * capability.
> */
> ret =
On Mon, Mar 22, 2021 at 03:49:01PM +0100, Miklos Szeredi wrote:
> +int ovl_miscattr_set(struct user_namespace *mnt_userns,
> + struct dentry *dentry, struct miscattr *ma)
> +{
> + struct inode *inode = d_inode(dentry);
> + struct dentry *upperdentry;
> + const struct
Hello Chanwoo, Greg,
Thanks for the review.
On Wed, 2021-03-24 at 11:09 +0900, Chanwoo Choi wrote:
> Hi,
>
> Need to fix the work as following:
> s/extconn/extcon
>
> And I'd like you to use the more correct patch title like the
> following example:
> "extcon: Use resource-managed function for
On 2021-03-22 14:55, Daejun Park wrote:
This patch supports the HPB 2.0.
The HPB 2.0 supports read of varying sizes from 4KB to 512KB.
In the case of Read (<= 32KB) is supported as single HPB read.
In the case of Read (36KB ~ 512KB) is supported by as a combination of
write buffer command and
On Mon, Mar 22, 2021 at 03:48:59PM +0100, Miklos Szeredi wrote:
minor nit: copy_fsxattr_{to,from}_user() might be better.
> +int fsxattr_copy_to_user(const struct miscattr *ma, struct fsxattr __user
> *ufa)
> +{
> + struct fsxattr fa = {
> + .fsx_xflags = ma->fsx_xflags,
> +
On 3/23/21 8:27 PM, Minchan Kim wrote:
...
+static int __init cma_sysfs_init(void)
+{
+ unsigned int i;
+
+ cma_kobj_root = kobject_create_and_add("cma", mm_kobj);
+ if (!cma_kobj_root)
+ return -ENOMEM;
+
+ for (i = 0; i < cma_area_count; i++) {
+
On 3/22/21 8:56 PM, Andre Przywara wrote:
>> I'm sending this patch as an RFC because it raises questions about how
>> we handle firmware versioning. How far back does (or should) our support
>> for old TF-A and Crust versions go?
>>
>> cpuidle has a problem that without working firmware support,
On Mon, 2021-03-22 at 12:36 -0700, Randy Dunlap wrote:
> On 3/22/21 6:02 AM, Bhaskar Chowdhury wrote:
> >
> > s/configed/configured/
> > s/registed/registered/
> > s/defintions/definitions/
> >
> > Signed-off-by: Bhaskar Chowdhury
>
> Acked-by: Randy Dunlap
[]
> > diff --git
allnoconfig
x86_64 randconfig-a002-20210323
x86_64 randconfig-a003-20210323
x86_64 randconfig-a006-20210323
x86_64 randconfig-a001-20210323
x86_64 randconfig-a004-20210323
x86_64 randconfig-a005
On Tue, Mar 23, 2021 at 05:12:00PM -0600, Shuah Khan wrote:
> On 3/23/21 6:55 AM, Hongren Zheng (Zenithal) wrote:
> > The commit e0546fd8b748 ("usbip: tools: Start using VUDC backend in
> > usbip tools") implemented device mode for user space tools, however the
> > corresponding options are not
On 3/22/21 8:27 PM, Athira Rajeev wrote:
Performance Monitoring Unit (PMU) registers in powerpc provides
information on cycles elapsed between different stages in the
pipeline. This can be used for application tuning. On ISA v3.1
platform, this information is exposed by sampling registers.
On Tue, Mar 23, 2021 at 08:31:31PM -0700, Minchan Kim wrote:
> On Wed, Mar 24, 2021 at 03:02:24AM +, Matthew Wilcox wrote:
> > On Tue, Mar 23, 2021 at 12:50:50PM -0700, Minchan Kim wrote:
> > > + /* the number of CMA page successful allocations */
> > > + atomic64_t nr_pages_succeeded;
> >
>
> On Mar 23, 2021, at 4:13 PM, Jason Gunthorpe wrote:
>
> On Tue, Mar 23, 2021 at 12:41:51PM -0700, Aruna Ramakrishna wrote:
>> There is a far greater possibility of an order-8 allocation failing,
>> esp. with the addition of __GFP_NORETRY , and the code would have to
>> fall back to a
On 03/24, Chao Yu wrote:
> On 2021/3/24 2:39, Jaegeuk Kim wrote:
> > On 03/23, Chao Yu wrote:
> > > This reverts commit 938a184265d75ea474f1c6fe1da96a5196163789.
> > >
> > > Because that commit fails generic/050 testcase which expect failure
> > > during mount a recoverable readonly partition.
>
On 23-03-21, 22:19, Jie Deng wrote:
> +static int virtio_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
> int num)
> +{
> + struct virtio_i2c *vi = i2c_get_adapdata(adap);
> + struct virtqueue *vq = vi->vq;
> + struct virtio_i2c_req *reqs;
> + unsigned long time_left;
>
On Tue, Mar 23, 2021 at 11:04 PM Muchun Song wrote:
>
> The pages aren't accounted at the root level, so we cannot uncharge the
> page to the memsw counter for the root memcg. Fix this.
>
> Fixes: 1f47b61fb407 ("mm: memcontrol: fix swap counter leak on swapout from
> offline cgroup")
>
powerpc allnoconfig
x86_64 randconfig-a002-20210323
x86_64 randconfig-a003-20210323
x86_64 randconfig-a006-20210323
x86_64 randconfig-a001-20210323
x86_64 randconfig-a004-20210323
x86_64
Hi Lorenzo,
> -Original Message-
> From: Lorenzo Pieralisi
> Sent: 2021年3月23日 19:15
> To: Z.q. Hou
> Cc: linux-...@vger.kernel.org; devicet...@vger.kernel.org;
> linux-kernel@vger.kernel.org; bhelg...@google.com; robh...@kernel.org;
> shawn...@kernel.org; Leo Li ;
>
After KASAN_VMALLOC works in arm64, we can randomize module region
into vmalloc area now.
Test:
VMALLOC area ffc01000 fffdf000
before the patch:
module_alloc_base/end ffc008b8 ffc01000
after the patch:
Linux support KAsan for VMALLOC since commit 3c5c3cfb9ef4da9
("kasan: support backing vmalloc space with real shadow memory")
Like how the MODULES_VADDR does now, just not to early populate
the VMALLOC_START between VMALLOC_END.
Before:
MODULE_VADDR: no mapping, no zero shadow at init
Before this patch, someone who wants to use VMAP_STACK when
KASAN_GENERIC enabled must explicitly select KASAN_VMALLOC.
>From Will's suggestion [1]:
> I would _really_ like to move to VMAP stack unconditionally, and
> that would effectively force KASAN_VMALLOC to be set if KASAN is in use
Linux supports KAsan for VMALLOC since commit 3c5c3cfb9ef4da9
("kasan: support backing vmalloc space with real shadow memory")
Acroding to how x86 ported it [1], they early allocated p4d and pgd,
but in arm64 I just simulate how KAsan supports MODULES_VADDR in arm64
by not to populate the
Arm64 provides defined macro for KERNEL_START and KERNEL_END,
thus replace them by the abstration instead of using _text and _end.
Signed-off-by: Lecopzer Chen
Acked-by: Andrey Konovalov
Tested-by: Andrey Konovalov
Tested-by: Ard Biesheuvel
---
arch/arm64/mm/kasan_init.c | 6 +++---
1 file
We can backed shadow memory in vmalloc area after vmalloc area
isn't populated at kasan_init(), thus make KASAN_VMALLOC selectable.
Signed-off-by: Lecopzer Chen
Acked-by: Andrey Konovalov
Tested-by: Andrey Konovalov
Tested-by: Ard Biesheuvel
---
arch/arm64/Kconfig | 1 +
1 file changed, 1
On Wed, Mar 24, 2021 at 12:47 PM Like Xu wrote:
>
> Hi Namhyung,
>
> On 2021/3/24 9:32, Namhyung Kim wrote:
> > Hello,
> >
> > On Mon, Mar 22, 2021 at 3:14 PM Like Xu wrote:
> >> +void reserve_lbr_buffers(struct perf_event *event)
> >> +{
> >> + struct kmem_cache *kmem_cache =
On 24-03-21, 12:00, Jie Deng wrote:
>
> On 2021/3/24 11:52, Viresh Kumar wrote:
> > On 24-03-21, 08:53, Jie Deng wrote:
> > > On 2021/3/23 17:38, Viresh Kumar wrote:
> > > > On 23-03-21, 14:31, Viresh Kumar wrote:
> > > > > On 23-03-21, 22:19, Jie Deng wrote:
> > > > > > +static int
On 24-03-21, 09:17, Jie Deng wrote:
> I didn't see the "struct virtio_driver" has a member "struct dev_pm_ops *pm"
>
> It defines its own hooks (freeze and restore) though it includes "struct
> device_driver"
>
> which has a "struct dev_pm_ops *pm".
>
> I just follow other virtio drivers to
On 2021/3/24 11:52, Viresh Kumar wrote:
On 24-03-21, 08:53, Jie Deng wrote:
On 2021/3/23 17:38, Viresh Kumar wrote:
On 23-03-21, 14:31, Viresh Kumar wrote:
On 23-03-21, 22:19, Jie Deng wrote:
+static int virtio_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int
num)
+{
+
On 2021-03-24 11:31, Zang Leigang wrote:
On Mon, Mar 22, 2021 at 10:10:36AM +0200, Avri Altman wrote:
In device control mode, the device may recommend the host to either
activate or inactivate a region, and the host should follow. Meaning
those are not actually recommendations, but more of
On 3/23/21 8:29 PM, Xiaofeng Cao wrote:
> change 'vodeo' to 'video'
> change 'nevery'to 'never'
> change 'is'to 'it'
> change 'connevted' to 'connected'
> change 'swichers' to 'switchers'
> change 'strucure' to 'structure'
> change 'unblanced' to 'unbalanced'
> change
On 24-03-21, 08:53, Jie Deng wrote:
>
> On 2021/3/23 17:38, Viresh Kumar wrote:
> > On 23-03-21, 14:31, Viresh Kumar wrote:
> > > On 23-03-21, 22:19, Jie Deng wrote:
> > > > +static int virtio_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg
> > > > *msgs, int num)
> > > > +{
> > > > +
I like this, it reminds me of the changes I proposed a few years ago to try
to automatically map read-only text regions of appropriate sizes and
alignment with THPs.
My concern had always been whether commercial software and distro vendors
would buy into supplying the appropriate linker flags
On 3/22/21 9:18 AM, Daniel Lezcano wrote:
> On 22/03/2021 05:47, Samuel Holland wrote:
>> In preparation for adding CPU idle states, hook up the sun4i timer.
>> Having a non-c3stop clockevent source available is necessary for all
>> CPUs to simultaneously enter a local-timer-stop idle state.
>
>
Hi Namhyung,
On 2021/3/24 9:32, Namhyung Kim wrote:
Hello,
On Mon, Mar 22, 2021 at 3:14 PM Like Xu wrote:
+void reserve_lbr_buffers(struct perf_event *event)
+{
+ struct kmem_cache *kmem_cache = x86_get_pmu()->task_ctx_cache;
+ struct cpu_hw_events *cpuc;
+ int cpu;
+
+
On 23/03/21 5:33 pm, Chris Packham wrote:
> The "meat" of this series is in the last patch which is the change that
> actually starts making use of the interrupts to drive a state machine.
> The dt-bindings patches can probably go in at any time. The rest of the
> series isn't dependent on them.
Hi Qais,
On 3/23/2021 3:22 PM, Qais Yousef wrote:
> Hi Alexander
>
> On 03/22/21 18:02, Alexander Sverdlin wrote:
>> Hi Qais,
>>
>> On 22/03/2021 17:32, Qais Yousef wrote:
>>> Yes you're right. I was a bit optimistic on CONFIG_DYNAMIC_FTRACE will imply
>>> CONFIG_ARM_MODULE_PLTS is enabled too.
allnoconfig
x86_64 randconfig-a002-20210323
x86_64 randconfig-a003-20210323
x86_64 randconfig-a006-20210323
x86_64 randconfig-a001-20210323
x86_64 randconfig-a004-20210323
x86_64 randconfig-a005-20210323
i386
powerpc allmodconfig
powerpc allnoconfig
x86_64 randconfig-a002-20210323
x86_64 randconfig-a003-20210323
x86_64 randconfig-a006-20210323
x86_64 randconfig-a001-20210323
x86_64
On 24/03/21 10:59 am, Chris Packham wrote:
>
> On 24/03/21 10:15 am, Rob Herring wrote:
>> On Tue, Mar 23, 2021 at 05:33:27PM +1300, Chris Packham wrote:
>>> Convert i2c-mpc to YAML.
>>>
>>> Signed-off-by: Chris Packham
>>> ---
>>> --- /dev/null
>>> +++
On 2021/3/24 5:49, Peter Zijlstra wrote:
On Mon, Mar 22, 2021 at 02:06:34PM +0800, Like Xu wrote:
The Architecture LBR does not have MSR_LBR_TOS (0x01c9). KVM will
generate #GP for this MSR access, thereby preventing the initialization
of the guest LBR.
Fixes: 47125db27e47
Hi Arnd,
Thanks for your patch.
It would be good to improve the patch's head line to something like:
drm/imx: imx-ldb: fix out of bounds array access warning
Regards,
Liu Ying
On Tue, 2021-03-23 at 14:05 +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> When CONFIG_OF is disabled,
On Mon, Mar 22, 2021 at 10:10:36AM +0200, Avri Altman wrote:
> In device control mode, the device may recommend the host to either
> activate or inactivate a region, and the host should follow. Meaning
> those are not actually recommendations, but more of instructions.
>
> On the contrary, in
On Wed, Mar 24, 2021 at 03:02:24AM +, Matthew Wilcox wrote:
> On Tue, Mar 23, 2021 at 12:50:50PM -0700, Minchan Kim wrote:
> > + /* the number of CMA page successful allocations */
> > + atomic64_t nr_pages_succeeded;
>
> > +void cma_sysfs_alloc_pages_count(struct cma *cma, size_t count)
Quoting Sandeep Maheswaram (2021-03-23 12:27:32)
> This patch adds a shutdown callback to USB DWC core driver to ensure that
> it is properly shutdown in reboot/shutdown path. This is required
> where SMMU address translation is enabled like on SC7180
> SoC and few others. If the hardware is still
On 3/18/2021 10:29 PM, Uladzislau Rezki wrote:
> On Thu, Mar 18, 2021 at 03:38:25PM +0530, vji...@codeaurora.org wrote:
>> From: Vijayanand Jitta
>>
>> A potential use after free can occur in _vm_unmap_aliases
>> where an already freed vmap_area could be accessed, Consider
>> the following
change 'vodeo' to 'video'
change 'nevery'to 'never'
change 'is'to 'it'
change 'connevted' to 'connected'
change 'swichers' to 'switchers'
change 'strucure' to 'structure'
change 'unblanced' to 'unbalanced'
change 'fonctionality' to 'functionality'
Signed-off-by: Xiaofeng Cao
On 2021/3/24 6:59, Jaegeuk Kim wrote:
On 03/19, Chao Yu wrote:
On 2021/3/19 1:17, Jaegeuk Kim wrote:
On 02/20, Chao Yu wrote:
In cp disabling mode, there could be a condition
- target segment has 128 ckpt valid blocks
- GC migrates 128 valid blocks to other segment (segment is still in
dirty
On Tue, Mar 23, 2021 at 07:34:12PM -0700, John Hubbard wrote:
> On 3/23/21 6:05 PM, Minchan Kim wrote:
> ...> diff --git a/mm/cma_sysfs.c b/mm/cma_sysfs.c
> > new file mode 100644
> > index ..c3791a032dc5
> > --- /dev/null
> > +++ b/mm/cma_sysfs.c
> > @@ -0,0 +1,107 @@
> > +//
In the case of expanding pinned file, map.m_lblk and map.m_len
will update in each round of section allocation, so in error
path, last i_size will be calculated with wrong m_lblk and m_len,
fix it.
Fixes: f5a53edcf01e ("f2fs: support aligned pinned file")
Signed-off-by: Chao Yu
---
Support power domain function for RK3568 Soc.
Change in V3:
[PATCH v3 1/3]: No change.
[PATCH v3 2/3]: Fix up the code styles and add rk3568 base on:
https://patchwork.kernel.org/project/linux-rockchip/patch/20210225102643.653095-1-enric.balle...@collabora.com/
[PATCH v3 3/3]: No change.
Change
Add power-domains found on rk3568 socs.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 54eb6cfc5d5b..a2c19c845cf2
Convert the soc/rockchip/power_domain.txt binding document to
json-schema and move to the power bindings directory.
Add RK3568 SoCs for rockchip power binding document.
Signed-off-by: Enric Balletbo i Serra
Signed-off-by: Elaine Zhang
---
.../power/rockchip,power-controller.yaml | 286
According to a description from TRM, add all the power domains
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3568-power.h | 32
1 file changed, 32 insertions(+)
create mode 100644 include/dt-bindings/power/rk3568-power.h
diff --git
In CP disabling mode, there are two issues when using LFS or SSR | AT_SSR
mode to select victim:
1. LFS is set to find source section during GC, the victim should have
no checkpointed data, since after GC, section could not be set free for
reuse.
Previously, we only check valid chpt blocks in
On 3/24/2021 5:01 AM, Len Brown wrote:
I have an obnoxious question: do we really want to use the XFD mechanism?
Obnoxious questions are often the most valuable! :-)
[...]
cheers,
Len Brown, Intel Open Source Technology Center
ps. I agree that un-necessary XINUSE=1 is possible.
Hi Quanyang,
Thank you for the patch.
On Tue, Mar 23, 2021 at 10:55:01AM +0800, quanyang.w...@windriver.com wrote:
> From: Quanyang Wang
>
> When insmod zynqmp-dpsub.ko after rmmod it, system will hang with the
> error log as below:
>
> root@xilinx-zynqmp:~# insmod zynqmp-dpsub.ko
> [
From: Jian Dong
fixes coccicheck warning:
drivers/regulator/mt6360-regulator.c:384:3-10: line 384 is
redundant because platform_get_irq() already prints an error
in fact it is not platform_get_irq but platform_get_irq_byname print error
Signed-off-by: Jian Dong
---
On Mon, Mar 22, 2021 at 06:14:08PM +0300, Dan Carpenter wrote:
On Wed, Mar 10, 2021 at 08:21:37AM +0800, Coiby Xu wrote:
Hi Dan,
Thanks for finding this issue! I'll submit all the patches including the
one for the previous issue reported by you ("[bug report] staging: qlge:
Initialize devlink
Hi Stephen,
Thank you for the patch.
On Tue, Mar 23, 2021 at 07:55:34PM -0700, Stephen Boyd wrote:
> We should indicate that we're not using the HPD pin on this device, per
> the binding document. Otherwise if code in the future wants to enable
> HPD in the bridge when this property is absent
negative_advice handler is only called when dst is non-NULL hence the
'if (rt)' check can be removed. 'if' and 'else if' can be merged together.
And use container_of() instead of (struct rtable *).
Signed-off-by: Yejune Deng
---
net/ipv4/route.c | 16 ++--
1 file changed, 6
On Tue, Mar 23, 2021 at 8:22 PM Mickaël Salaün wrote:
> On 23/03/2021 18:49, Jann Horn wrote:
> > On Tue, Mar 23, 2021 at 4:54 PM Mickaël Salaün wrote:
> >> On 23/03/2021 01:13, Jann Horn wrote:
> >>> On Tue, Mar 16, 2021 at 9:43 PM Mickaël Salaün wrote:
> Using Landlock objects and
Add likely() statements in ipv4_confirm_neigh() for 'rt->rt_gw_family
== AF_INET'.
Signed-off-by: Yejune Deng
---
net/ipv4/route.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index fa68c2612252..5762d9bc671c 100644
---
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