The pull request you sent on Wed, 14 Apr 2021 22:28:04 -0700:
> git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input.git for-linus
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/1df01322f00a0aedd4a589597ce9c0b680ae6068
Thank you!
--
Deet-doot-dot, I am a bot.
ht
> From: Jakub Kicinski
> Sent: Thursday, April 15, 2021 10:44 AM
> ...
> On Wed, 14 Apr 2021 22:45:19 -0700 Dexuan Cui wrote:
> > + buf = dma_alloc_coherent(gmi->dev, length, &dma_handle,
> > +GFP_KERNEL | __GFP_ZERO);
>
> No need for GFP_ZERO, dma_alloc_coherent()
On Wed, 2021-04-14 at 07:26 +0200, Dmitry Vyukov wrote:
>
> > [ 15.428008]
> > ==
> > [ 15.428011] BUG: KASAN: vmalloc-out-of-bounds in
> > crash_setup_memmap_entries+0x17e/0x3a0
>
> This looks like a genuine kernel bug on first
On Thu, Apr 15, 2021 at 01:08:29PM -0400, Waiman Long wrote:
> On 4/15/21 12:50 PM, Johannes Weiner wrote:
> > On Tue, Apr 13, 2021 at 09:20:25PM -0400, Waiman Long wrote:
> > > Before the new slab memory controller with per object byte charging,
> > > charging and vmstat data update happen only wh
On Wed, Apr 14, 2021 at 10:49:37AM -0400, Tianyu Lan wrote:
> From: Tianyu Lan
>
> Hyper-V provides GHCB protocol to write Synthetic Interrupt
> Controller MSR registers and these registers are emulated by
> Hypervisor rather than paravisor.
What is paravisor? Is that the VMPL0 to borrow AMD spe
On Thu, Apr 15, 2021 at 12:35:45PM -0400, Waiman Long wrote:
> On 4/15/21 12:30 PM, Johannes Weiner wrote:
> > On Tue, Apr 13, 2021 at 09:20:24PM -0400, Waiman Long wrote:
> > > In memcg_slab_free_hook()/pcpu_memcg_free_hook(), obj_cgroup_uncharge()
> > > is followed by mod_objcg_state()/mod_memcg_
Em qui, 2021-04-15 às 18:14 +0100, Matthew Wilcox escreveu:
> On Thu, Apr 15, 2021 at 02:08:19PM -0300, Aline Santana Cordeiro
> wrote:
> > -const struct atomisp_format_bridge
> > *get_atomisp_format_bridge_from_mbus(
> > - u32 mbus_code);
> > +const struct atomisp_format_bridge*
> > +get_atomis
On 14/04/21 20:23, Ruifeng Zhang wrote:
> From: Ruifeng Zhang
>
> The arm topology still parse from the MPIDR, but it is incomplete. When
> the armv8.2 or above cpu runs kernel in EL1 with aarch32 mode, it will
> parse out the wrong topology.
>
Per my other email, isn't the problem that MPIDR ca
On 4/15/21 12:03 PM, Borislav Petkov wrote:
> On Wed, Mar 24, 2021 at 12:04:08PM -0500, Brijesh Singh wrote:
>> diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
> Also, why is all this SNP stuff landing in this file instead of in sev.c
> or so which is AMD-specific?
>
I don't ha
On 14/04/21 20:23, Ruifeng Zhang wrote:
> From: Ruifeng Zhang
>
> In Unisoc, the sc9863a SoC which using cortex-a55, it has two software
> version, one of them is the kernel running on EL1 using aarch32.
> user(EL0) kernel(EL1)
> sc9863a_go aarch32 aa
On Thu, Apr 15, 2021 at 08:26:21AM +, David Laight wrote:
> ...
> > Besides just FP, 128-bit, etc, I remain concerned about just basic
> > math operations. C has no way to describe the intent of integer
> > overflow, so the kernel was left with the only "predictable" result:
> > wrap around. Un
On Wed, 14 Apr 2021 21:56:39 +
David Laight wrote:
> From: Matthew Wilcox
> > Sent: 14 April 2021 22:36
> >
> > On Wed, Apr 14, 2021 at 09:13:22PM +0200, Jesper Dangaard Brouer wrote:
> > > (If others want to reproduce). First I could not reproduce on ARM32.
> > > Then I found out that en
Hi Boris,
On 4/15/21 11:57 AM, Borislav Petkov wrote:
> On Wed, Mar 24, 2021 at 12:04:08PM -0500, Brijesh Singh wrote:
>> The lookup_page_in_rmptable() can be used by the host to read the RMP
>> entry for a given page. The RMP entry format is documented in PPR
>> section 2.1.5.2.
> I see
>
> Tabl
On Tue, Apr 13, 2021 at 1:15 PM Peter Xu wrote:
>
> On Mon, Apr 12, 2021 at 10:17:19PM -0700, Axel Rasmussen wrote:
> > Currently, the context (fds, mmap-ed areas, etc.) are global. Each test
> > mutates this state in some way, in some cases really "clobbering it"
> > (e.g., the events test mremap
On Wed, Apr 14, 2021 at 5:43 PM Miguel Ojeda
wrote:
>
> On Thu, Apr 15, 2021 at 1:19 AM Nick Desaulniers
> wrote:
> >
> > -Oz in clang typically generates larger kernel code than -Os; LLVM
> > seems to aggressively emit libcalls even when the setup for a call
> > would be larger than the inlined
First thanks to you both, Alex and Bjorn!
I am in no way an expert on this topic, so I have to fully rely on your
feedback, concerning this issue.
If you should have any other solution approach, in form of patch-set, I
would be glad to test it out. Just let me know, what you think might
make sens
Wesley Cheng wrote:
>
>
> On 4/14/2021 11:26 PM, Felipe Balbi wrote:
>> Wesley Cheng writes:
>>
>>> If an error is received when issuing a start or update transfer
>>> command, the error handler will stop all active requests (including
>>> the current USB request), and call dwc3_gadget_giveback(
Many other resource flag parsers already add this flag when the input
has bits 24 & 25 set, so update this one to do the same.
Some devices (like virtio-net) have more than one memory resource
(like MMIO32 and MMIO64) and without this flag it would be needed to
verify the address range to know whi
On Wed, Mar 24, 2021 at 12:04:09PM -0500, Brijesh Singh wrote:
> diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
> index 06394b6d56b2..7a0138cb3e17 100644
> --- a/arch/x86/mm/mem_encrypt.c
> +++ b/arch/x86/mm/mem_encrypt.c
> @@ -644,3 +644,44 @@ rmpentry_t *lookup_page_in_rmptabl
Le 4/15/21 à 12:54 AM, Alex Ghiti a écrit :
Le 4/15/21 à 12:20 AM, Palmer Dabbelt a écrit :
On Sun, 11 Apr 2021 09:41:44 PDT (-0700), a...@ghiti.fr wrote:
This is a preparatory patch for relocatable kernel and sv48 support.
The kernel used to be linked at PAGE_OFFSET address therefore we
coul
Consider the following topology:
DIE [ ]
MC [][]
0 1 2 3
capacity_orig_of(x \in {0-1}) < capacity_orig_of(x \in {2-3})
w/ CPUs 2-3 idle and CPUs 0-1 running CPU hogs (util_avg=1024).
When CPU2 goes through load_balance() (via periodic / NOHZ balance), it
should
Consider the following (hypothetical) asymmetric CPU capacity topology,
with some amount of capacity pressure (RT | DL | IRQ | thermal):
DIE [ ]
MC [][]
0 1 2 3
| CPU | capacity_orig | capacity |
|-+---+--|
| 0 | 870 |
Hi folks,
This is the misfit-specific bits I tore out of [1] and that I've been further
chewing on.
o Patch 1 pays attention to group vs CPU capacity checks. It's removing some
safeguard we had against downmigrations, so it had to grow fatter to
compensate for it.
o Patch 2 aligns running and
This patch provides counters for SRv6 Behaviors as defined in [1],
section 6. For each SRv6 Behavior instance, counters defined in [1] are:
- the total number of packets that have been correctly processed;
- the total amount of traffic in bytes of all packets that have been
correctly processe
x86/crash: fix crash_setup_memmap_entries() KASAN vmalloc-out-of-bounds gripe
[ 15.428011] BUG: KASAN: vmalloc-out-of-bounds in
crash_setup_memmap_entries+0x17e/0x3a0
[ 15.428018] Write of size 8 at addr c9426008 by task kexec/1187
(gdb) list *crash_setup_memmap_entries+0x17e
0xf
On Wed, Aug 23, 2017 at 3:31 PM Jeff Mahoney wrote:
>
> On 8/15/14 5:29 AM, Al Viro wrote:
> > On Thu, Aug 14, 2014 at 07:58:56PM -0700, Luis R. Rodriguez wrote:
> >
> >> Christoph had noted that this seemed associated to the problem
> >> that the btrfs uses different assignments for st_dev than s
On Tue, Apr 13, 2021 at 09:20:27PM -0400, Waiman Long wrote:
> Most kmem_cache_alloc() calls are from user context. With instrumentation
> enabled, the measured amount of kmem_cache_alloc() calls from non-task
> context was about 0.01% of the total.
>
> The irq disable/enable sequence used in this
On 4/14/2021 11:26 PM, Felipe Balbi wrote:
> Wesley Cheng writes:
>
>> If an error is received when issuing a start or update transfer
>> command, the error handler will stop all active requests (including
>> the current USB request), and call dwc3_gadget_giveback() to notify
>> function drive
On Tue, 13 Apr 2021 17:08:04 -0700, Nathan Chancellor wrote:
> After commit 2decad92f473 ("arm64: mte: Ensure TIF_MTE_ASYNC_FAULT is
> set atomically"), LLVM's integrated assembler fails to build entry.S:
>
> :5:7: error: expected assembly-time absolute expression
> .org . - (664b-663b) + (662b-6
Andrii suggested to remove this abstraction layer and have the percpu
handling more explicit[1].
This patch also updates the tests that relied on the macros.
[1]
https://lore.kernel.org/bpf/caef4bzymj_zpdq8zi4dbntbojkrpu2tvopysbnrdd9fohtf...@mail.gmail.com/
Suggested-by: Andrii Nakryiko
Signed
Follows the same logic as the hashtable tests.
Signed-off-by: Pedro Tammela
---
.../bpf/map_tests/array_map_batch_ops.c | 104 +-
1 file changed, 75 insertions(+), 29 deletions(-)
diff --git a/tools/testing/selftests/bpf/map_tests/array_map_batch_ops.c
b/tools/testing/sel
Uses the already in-place infrastructure provided by the
'generic_map_*_batch' functions.
No tweak was needed as it transparently handles the percpu variant.
As arrays don't have delete operations, let it return a error to
user space (default behaviour).
Suggested-by: Jamal Hadi Salim
Signed-of
This patchset introduces batched operations for the per-cpu variant of
the array map.
It also removes the percpu macros from 'bpf_util.h'. This change was
suggested by Andrii in a earlier iteration of this patchset.
The tests were updated to reflect all the new changes.
v3 -> v4:
- Prefer 'callo
On 4/15/21 1:27 PM, Ali Saidi wrote:
While this code is executed with the wait_lock held, a reader can
acquire the lock without holding wait_lock. The writer side loops
checking the value with the atomic_cond_read_acquire(), but only truly
acquires the lock when the compare-and-exchange is compl
On Wed, 14 Apr 2021 22:45:19 -0700 Dexuan Cui wrote:
> + buf = dma_alloc_coherent(gmi->dev, length, &dma_handle,
> + GFP_KERNEL | __GFP_ZERO);
No need for GFP_ZERO, dma_alloc_coherent() zeroes the memory these days.
> +static int mana_gd_register_irq(struct gdma_q
On 4/15/21 1:10 PM, Matthew Wilcox wrote:
On Tue, Apr 13, 2021 at 09:20:22PM -0400, Waiman Long wrote:
With memory accounting disable, the run time was 2.848s. With memory
accounting enabled, the run times with the application of various
patches in the patchset were:
Applied patches Run ti
On 2021-04-14 14:22, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2021-04-14 14:02:50)
Initialize audio_comp when audio starts and wait for audio_comp at
dp_display_disable(). This will take care of both dongle unplugged
and display off (suspend) cases.
Changes in v2:
-- add dp_display_start_audio
> On Apr 15, 2021, at 10:00 AM, Dave Hansen wrote:
>
> On 4/15/21 9:24 AM, Andy Lutomirski wrote:
>> In the patches, *as submitted*, if you trip the XFD #NM *once* and you
>> are the only thread on the system to do so, you will eat the cost of a
>> WRMSR on every subsequent context switch.
>
On 2021-04-14 14:09, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2021-04-13 16:11:44)
Make sure main link is in connection state before start aux
read/write operation to avoid unnecessary long delay due to
main link had been unplugged.
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_a
Make include/config/foo/bar.h fake deps files generation simpler.
* delete .h suffix
those aren't header files, shorten filenames,
* delete tolower()
Linux filesystems can deal with both upper and lowercase
filenames very well,
* put everything in 1 directory
Pres
While this code is executed with the wait_lock held, a reader can
acquire the lock without holding wait_lock. The writer side loops
checking the value with the atomic_cond_read_acquire(), but only truly
acquires the lock when the compare-and-exchange is completed
successfully which isn’t ordered.
On Wed, Apr 14, 2021 at 2:53 PM Andy Shevchenko
wrote:
>
> We have open coded dev_set_name() implementation, replace that
> with a direct call.
>
> Signed-off-by: Andy Shevchenko
> ---
> drivers/base/power/wakeup_stats.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/dr
On Thu, Apr 15, 2021 at 04:56:00PM +, codrin.ciubota...@microchip.com wrote:
> Are there any plans for refactoring DPCM? any ideas ongoing? I also have
> some changes for PCM dmaengine, in the same 'style', similar to what I
> sent some time ago...
> I can adjust to different ideas, if there
On 4/15/21 8:07 AM, Igor Matheus Andrade Torrente wrote:
Fixes a race condition - for lack of a more precise term - between
em28xx_v4l2_open and em28xx_v4l2_init, by detaching the v4l2_dev,
media_pad and vdev structs from the em28xx_v4l2, and managing the
lifetime of those objects more dynamicaly
Before attempting of starting a new batch a "monitor_todo" var.
is set to "false" and set back to "true" when a previous RCU
batch is still in progress.
Drop it to "false" only when a new batch has been successfully
queued, if not, it stays active anyway. There is no reason in
setting it force and
To queue a new batch we have a kfree_rcu_monitor() function that
checks "monitor_todo" var. and invokes kfree_rcu_drain_unlock()
to start a new batch after a GP. Get rid of open-coded case by
switching it to the separate function.
Signed-off-by: Uladzislau Rezki (Sony)
---
kernel/rcu/tree.c | 8
RCU_SCHEDULER_RUNNING is set when a scheduling is available.
That signal is used in order to check and queue a "monitor work"
to reclaim freed objects(if they are) during a boot-up phase.
We have it because, the main path of the kvfree_rcu() call can
not queue the work untill the scheduler is up a
nr_bkv_objs represents the counter of objects in the page-cache.
Accessing to it requires taking the lock. Switch to READ_ONCE()
WRITE_ONCE() macros to provide an atomic access to that counter.
A shrinker is one of the user of it.
Signed-off-by: Uladzislau Rezki (Sony)
---
kernel/rcu/tree.c | 14
From: Zhang Qiang
Add a drain_page_cache() function to drain a per-cpu page cache.
The reason behind of it is a system can run into a low memory
condition, in that case a page shrinker can ask for its users
to free their caches in order to get extra memory available for
other needs in a system.
This is a v2 of a small series. See the changelog below:
V1 -> V2:
- document the rcu_delay_page_cache_fill_msec parameter;
- drop the "kvfree_rcu: introduce "flags" variable" patch;
- reword commit messages;
- in the patch [1], do not use READ_ONCE() instances in
get_cached_bnode()/put_cached_b
Hiya,
On 15/04/2021 17:45, Will Deacon wrote:
On Thu, Apr 15, 2021 at 04:26:46PM +, Ali Saidi wrote:
On Thu, 15 Apr 2021 16:02:29 +0100, Will Deacon wrote:
On Thu, Apr 15, 2021 at 02:25:52PM +, Ali Saidi wrote:
While this code is executed with the wait_lock held, a reader can
acqui
On Thu, Apr 15, 2021 at 8:10 PM Vaibhav Jain wrote:
>
>
> Thanks for the patch Andy,
>
> Unfortunately ran into a compilation issue due to missing "#include
> " that provides definition for
> get_unaligned_le64(). Gcc reported following error:
>
> error: implicit declaration of function ‘get_unali
In order to support large pages on powerpc, notepage()
needs to know the page size of the page.
Add a page_size argument to notepage().
Signed-off-by: Christophe Leroy
---
arch/arm64/mm/ptdump.c | 2 +-
arch/riscv/mm/ptdump.c | 2 +-
arch/s390/mm/dump_pagetables.c | 3 ++-
ar
CC mm/ptdump.o
In file included from :
mm/ptdump.c: In function 'ptdump_pte_entry':
././include/linux/compiler_types.h:320:38: error: call to
'__compiletime_assert_207' declared with attribute error: Unsupported access
size for {READ,WRITE}_ONCE().
Align line break to match with the open parenthesis.
Issue detected by checkpatch.pl.
Signed-off-by: Aline Santana Cordeiro
---
Changes since v1:
- Move short argument to the previous line in function call
since it didn't exceeded 80 characters in line
drivers/staging/media/tegra-video/vi.
Which hugepd, page table entries can be at any level
and can be of any size.
Add support for them.
Signed-off-by: Christophe Leroy
---
mm/ptdump.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/mm/ptdump.c b/mm/ptdump.c
index 61cd16afb1c8..6efdb8c15a7d 10
This patch converts powerpc to the generic PTDUMP implementation.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig | 2 +
arch/powerpc/Kconfig.debug| 30 --
arch/powerpc/mm/Makefile | 2 +-
arch/powerpc/mm/mmu_decl.h| 2 +-
arch/powerpc/mm
Pagewalk ignores hugepd entries and walk down the tables
as if it was traditionnal entries, leading to crazy result.
Add walk_hugepd_range() and use it to walk hugepage tables.
Signed-off-by: Christophe Leroy
---
mm/pagewalk.c | 54 +--
1 file cha
This series converts powerpc to generic PTDUMP.
For that, we first need to add missing hugepd support
to pagewalk and ptdump.
Christophe Leroy (5):
mm: pagewalk: Fix walk for hugepage tables
mm: ptdump: Fix build failure
mm: ptdump: Provide page size to notepage()
mm: ptdump: Support huge
On Fri, Apr 16, 2021 at 01:01:17AM +0800, Xu, Yanfei wrote:
>
>
> On 4/16/21 12:18 AM, Xu, Yanfei wrote:
> >
> >
> > On 4/15/21 11:43 PM, Paul E. McKenney wrote:
> > > [Please note: This e-mail is from an EXTERNAL e-mail address]
> > >
> > > On Thu, Apr 15, 2021 at 11:04:05PM +0800, Xu, Yanfei
On Thu, Apr 15, 2021 at 02:08:19PM -0300, Aline Santana Cordeiro wrote:
> -const struct atomisp_format_bridge *get_atomisp_format_bridge_from_mbus(
> -u32 mbus_code);
> +const struct atomisp_format_bridge*
> +get_atomisp_format_bridge_from_mbus(u32 mbus_code);
No, this does not match coding st
Currently when using "W=1" with UML builds, there are over 700 warnings
like so:
CC arch/um/drivers/stderr_console.o
cc1: warning: ./arch/um/include/uapi: No such file or directory
[-Wmissing-include-dirs]
but arch/um/ does not have include/uapi/ at all, so add that
subdir and put one Kbu
On Tue, Apr 13, 2021 at 09:20:22PM -0400, Waiman Long wrote:
> With memory accounting disable, the run time was 2.848s. With memory
> accounting enabled, the run times with the application of various
> patches in the patchset were:
>
> Applied patches Run time Accounting overhead Overhead
Thanks for the patch Andy,
Unfortunately ran into a compilation issue due to missing "#include
" that provides definition for
get_unaligned_le64(). Gcc reported following error:
error: implicit declaration of function ‘get_unaligned_le64’
After including the necessary header file, kernel comp
Hi Dillon,
STM32MP151 is mono-core, but both STM32MP153 and STM32MP157 are
dual-core (see
https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-arm-cortex-mpus.html).
So your point is fully relevant, thanks.
ST already fixed the same issue in st-asc.c driver in
On 4/15/21 12:50 PM, Johannes Weiner wrote:
On Tue, Apr 13, 2021 at 09:20:25PM -0400, Waiman Long wrote:
Before the new slab memory controller with per object byte charging,
charging and vmstat data update happen only when new slab pages are
allocated or freed. Now they are done with every kmem_
Change line break to avoid an open parenthesis at the end of the line.
It consequently removed spaces at the start of the subsequent line.
Both issues detected by checkpatch.pl.
Signed-off-by: Aline Santana Cordeiro
---
Changes since v1:
- Keep the * with the function return type
instead of
On Fri, Apr 16, 2021 at 12:18:42AM +0800, Xu, Yanfei wrote:
>
>
> On 4/15/21 11:43 PM, Paul E. McKenney wrote:
> > [Please note: This e-mail is from an EXTERNAL e-mail address]
> >
> > On Thu, Apr 15, 2021 at 11:04:05PM +0800, Xu, Yanfei wrote:
> > > Hi experts,
> > >
> > > I am learning rcu me
On 15/04/2021 17:29, Rob Herring wrote:
+codec {
+compatible = "qcom,wcd9380-codec";
+reset-gpios = <&tlmm 32 0>;
+#sound-dai-cells = <1>;
+qcom,tx-device = <&wcd938x_tx>;
+qcom,rx-device = <&wcd938x_rx>;
+qcom,micbias1-microvolt = <180>;
On Thu, Apr 15, 2021 at 2:43 AM zhaoxiao wrote:
>
> In preparation for x86 supporting ftrace built on other compiler
> options, let's have the x86 Makefiles remove the $(CC_FLAGS_FTRACE)
> flags, whatever these may be, rather than assuming '-pg'.
>
> There should be no functional change as a resul
On Wed, Mar 24, 2021 at 12:04:08PM -0500, Brijesh Singh wrote:
> diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
Also, why is all this SNP stuff landing in this file instead of in sev.c
or so which is AMD-specific?
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/n
On Thu, 15 Apr 2021 14:59:49 +0800 jin yiting wrote:
> From 71e63af579edd15ad7f7395760a19f67d9a1d7d3 Mon Sep 17 00:00:00 2001
> From: jin yiting
> Date: Wed, 31 Mar 2021 20:38:40 +0800
> Subject: [PATCH] bonding: 3ad: update slave arr after initialize
> MIME-Version: 1.0
> Content-Type: text/plai
On 4/16/21 12:18 AM, Xu, Yanfei wrote:
On 4/15/21 11:43 PM, Paul E. McKenney wrote:
[Please note: This e-mail is from an EXTERNAL e-mail address]
On Thu, Apr 15, 2021 at 11:04:05PM +0800, Xu, Yanfei wrote:
Hi experts,
I am learning rcu mechanism and its codes. When looking at the
rcu_blo
On 4/15/21 9:24 AM, Andy Lutomirski wrote:
> In the patches, *as submitted*, if you trip the XFD #NM *once* and you
> are the only thread on the system to do so, you will eat the cost of a
> WRMSR on every subsequent context switch.
I think you're saying: If a thread trips XFD #NM *once*, every sw
On 4/15/21 12:40 PM, Johannes Weiner wrote:
On Tue, Apr 13, 2021 at 09:20:23PM -0400, Waiman Long wrote:
The caller of mod_memcg_lruvec_state() has both memcg and lruvec readily
available. So both of them are now passed to mod_memcg_lruvec_state()
and __mod_memcg_lruvec_state(). The __mod_memcg_
On Thu, 15 Apr 2021 15:07:36 +0200 Oleksij Rempel wrote:
> With this patch FEC on iMX will able to run generic net selftests
>
> Signed-off-by: Oleksij Rempel
allmodconfig build fails starting from this patch and still fails
after patch 7:
net/core/selftests.o: In function `net_selftest':
self
On Wed, 2021-04-14 at 11:49 +0300, Alexandru Ardelean wrote:
> During commit 067fda1c065ff ("iio: hid-sensors: move triggered buffer
> setup into hid_sensor_setup_trigger"), the
> iio_triggered_buffer_{setup,cleanup}() functions got moved under the
> hid-sensor-trigger module.
>
> The above change
On 15/04/2021 17:39, Rob Herring wrote:
On Wed, Apr 14, 2021 at 04:48:40PM +0100, Srinivas Kandagatla wrote:
Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC
connected over SoundWire. This device has two SoundWire devices RX and
TX respectively. This bindings is for those s
On Thu, Apr 15, 2021 at 08:50:25AM -0700, Sami Tolvanen wrote:
> On Thu, Apr 15, 2021 at 7:02 AM Catalin Marinas
> wrote:
> >
> > On Thu, Apr 15, 2021 at 06:25:57AM -0700, Nathan Chancellor wrote:
> > > On Thu, Apr 15, 2021 at 10:17:43AM +0100, Catalin Marinas wrote:
> > > > On Tue, Apr 13, 2021
On Tue, Apr 13, 2021 at 09:20:26PM -0400, Waiman Long wrote:
> The object stock data stored in struct memcg_stock_pcp are independent
> of the other page based data stored there. Separating them out into
> their own struct to highlight the independency.
>
> Signed-off-by: Waiman Long
> Acked-by:
On Wed, Mar 24, 2021 at 12:04:08PM -0500, Brijesh Singh wrote:
> The lookup_page_in_rmptable() can be used by the host to read the RMP
> entry for a given page. The RMP entry format is documented in PPR
> section 2.1.5.2.
I see
Table 15-36. Fields of an RMP Entry
in the APM.
Which PPR do you me
On 15.04.2021 19:17, Mark Brown wrote:
> On Wed, Apr 14, 2021 at 02:58:10PM +, codrin.ciubota...@microchip.com
> wrote:
>
>> How about using a different API for ASoC only, since that's the place of
>> DPCM. Only drivers that do not involve DSPs would have to to be changed
>> to call the new s
Balance braces around conditional statements.
Issue detected by checkpatch.pl.
It happens in if-else statements where one of the commands
uses braces around a block of code and the other command
does not since it has just a single line of code.
Signed-off-by: Aline Santana Cordeiro
---
drivers/s
Balance braces around conditional statements.
Issue detected by checkpatch.pl.
It happens in if-else statements where one of the commands
uses braces around a block of code and the other command
does not since it has just a single line of code.
Signed-off-by: Aline Santana Cordeiro
---
drivers/s
Balance braces around conditional statements.
Issue detected by checkpatch.pl.
It happens in if-else statements where one of the commands
uses braces around a block of code and the other command
does not since it has just a single line of code.
Signed-off-by: Aline Santana Cordeiro
---
drivers/s
Balance braces around conditional statements.
Issue detected by checkpatch.pl.
It happens in if-else statements where one of the commands
uses braces around a block of code and the other command
does not since it has just a single line of code.
Signed-off-by: Aline Santana Cordeiro
---
drivers/s
Thanks Rob for quick review,
On 15/04/2021 17:29, Rob Herring wrote:
On Wed, Apr 14, 2021 at 04:48:37PM +0100, Srinivas Kandagatla wrote:
Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC
connected over SoundWire. This device has two SoundWire device RX and
TX respectively, su
On Thu, Apr 15, 2021 at 02:25:57PM +0200, Jacopo Mondi wrote:
> Define a new vendor property in the maxim,max9286 binding schema.
>
> The new property allows to declare that the remote camera
> power-over-coax is controlled by one of the MAX9286 gpio lines.
>
> As it is currently not possible to
On 4/15/21 12:45 PM, Will Deacon wrote:
With that in mind, it would probably be a good idea to eyeball the qspinlock
slowpath as well, as that uses both atomic_cond_read_acquire() and
atomic_try_cmpxchg_relaxed().
It seems plausible that the same thing could occur here in qspinlock:
On Thu, Apr 15, 2021 at 6:31 AM Vincenzo Frascino
wrote:
>
>
>
> On 4/14/21 10:45 PM, Nick Desaulniers wrote:
> > Clang can assemble these files just fine; this is a relic from the top
> > level Makefile conditionally adding this. We no longer need --prefix,
> > --gcc-toolchain, or -Qunused-argume
On 4/9/2021 3:07 PM, Dan Carpenter wrote:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 2d743660786ec51f5c1fefd5782bbdee7b227db0
commit: 5785dd7a8ef0de8049f40a1a109de6a1bf17b479 drm/msm: Fix duplicate gpu
node in icc summary
config: arm64-randconfig-
On Wed, Apr 14, 2021 at 03:00:48AM +, Al Viro wrote:
> Ugh... So when dput() drives the refcount down to 0 you hit lock_parent()
> and only then bother to check if the sucker had been negative in the first
^
On Tue, Apr 13, 2021 at 09:20:25PM -0400, Waiman Long wrote:
> Before the new slab memory controller with per object byte charging,
> charging and vmstat data update happen only when new slab pages are
> allocated or freed. Now they are done with every kmem_cache_alloc()
> and kmem_cache_free(). Th
Hi Laurent,
On Thu, Apr 15, 2021 at 4:47 PM Laurent Pinchart
wrote:
> On Thu, Apr 15, 2021 at 02:25:59PM +0200, Jacopo Mondi wrote:
> > Declare port@0 in the csi40 device node and leave it un-connected.
> > Each board .dts file will connect the port as it requires.
> >
> > Signed-off-by: Jacopo M
On Wed, Apr 14 2021 at 11:49, Lorenzo Colitti wrote:
> On Wed, Apr 14, 2021 at 2:14 AM Greg KH wrote:
>> To give context, the commit is now 46eb1701c046 ("hrtimer: Update
>> softirq_expires_next correctly after __hrtimer_get_next_event()") and is
>> attached below.
>>
>> The f_ncm.c driver is doin
On Thu, Apr 15, 2021 at 04:26:46PM +, Ali Saidi wrote:
>
> On Thu, 15 Apr 2021 16:02:29 +0100, Will Deacon wrote:
> > On Thu, Apr 15, 2021 at 02:25:52PM +, Ali Saidi wrote:
> > > While this code is executed with the wait_lock held, a reader can
> > > acquire the lock without holding wait_l
On Thu, 15 Apr 2021 14:25:56 +0200, Jacopo Mondi wrote:
> The dt-bindings examples are usually indented with 4 spaces.
>
> The maxim,max9286 schema has the example indented with only
> 2 spaces, re-indent it.
>
> Cosmetic change only.
>
> Signed-off-by: Jacopo Mondi
> ---
> .../bindings/media/
On Tue, Apr 13, 2021 at 09:20:23PM -0400, Waiman Long wrote:
> The caller of mod_memcg_lruvec_state() has both memcg and lruvec readily
> available. So both of them are now passed to mod_memcg_lruvec_state()
> and __mod_memcg_lruvec_state(). The __mod_memcg_lruvec_state() is
> updated to allow eith
On Thu, Apr 15, 2021 at 11:58:46AM +0300, Eugen Hristev wrote:
> Add bindings for the Microchip eXtended Image Sensor Controller.
> Based on the atmel,isc.yaml binding.
>
> Signed-off-by: Eugen Hristev
> ---
> .../bindings/media/microchip,xisc.yaml| 129 ++
> 1 file chang
On Wed, Apr 14, 2021 at 04:48:40PM +0100, Srinivas Kandagatla wrote:
> Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC
> connected over SoundWire. This device has two SoundWire devices RX and
> TX respectively. This bindings is for those slave devices on WCD9380/WCD9385.
>
> Si
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