This allows reserving regions of physical memory from the device tree.
See Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
for more details.
Signed-off-by: Alvaro Gamez Machado
---
arch/microblaze/mm/init.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch
Hi Michal
On Wed, Oct 23, 2019 at 09:59:40AM +0200, Michal Simek wrote:
> Hi,
>
>
> On 22. 10. 19 10:19, Alvaro Gamez Machado wrote:
> > Signed-off-by: Alvaro Gamez Machado
>
> please put there reasonable description to commit message.
Ok, will use
Signed-off-by: Alvaro Gamez Machado
---
arch/microblaze/mm/init.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
index a015a951c8b7..928c5c2816e4 100644
--- a/arch/microblaze/mm/init.c
+++ b/arch/microblaze/mm/init.c
@@ -17,6 +17,8
On Wed, Dec 12, 2018 at 11:42:41AM +0100, Thierry Reding wrote:
> Did any discussion regarding the above-mentioned issues ever ensue? How
> do you want to proceed? At the very least we'll need some sort of device
> tree binding for this driver, so perhaps start with a DT binding
> proposal and take
n pwm-outputs is different than 1.
We could use a boolean, but future versions of this IP core could implement
several PWM and counters, so when (if) this happens, we would only have to
adjust the pwm-outputs comparison to allow more than one PWM devices.
Signed-off-by: Alvaro Gamez Machado
---
Th
On Thu, Jul 06, 2017 at 11:13:44AM +0200, Thierry Reding wrote:
> On Tue, Jun 27, 2017 at 12:05:22PM +0200, Alvaro Gamez Machado wrote:
> > a) Changing "xlnx,axi-timer-2.0" compatible string for this device to
> > something
> >different like xlnx,axi-pwm-2.0?
&g
Keep supporting proprietary "xlnx,phy-type" attribute and add support for
MII connectivity to the PHY.
Reviewed-by: Andrew Lunn
Signed-off-by: Alvaro Gamez Machado
---
Changes from v2:
* Replaced u32 phy_mode -> phy_interface_t phy_mode
* Fix bug we introduced PHY_INTERFA
On Fri, Jul 07, 2017 at 10:16:31AM -0700, Florian Fainelli wrote:
> On 07/06/2017 11:50 PM, Alvaro Gamez Machado wrote:
> > Keep supporting proprietary "xlnx,phy-type" attribute and add support for
> > MII connectivity to the PHY.
> >
> > Signed-off-by: A
Keep supporting proprietary "xlnx,phy-type" attribute and add support for
MII connectivity to the PHY.
Signed-off-by: Alvaro Gamez Machado
---
Changes since v1:
* Renamed phy_type to phy_mode. No other instances of this struct
member were found except for those we
Keep supporting proprietary "xlnx,phy-type" attribute and add support for
MII connectivity to the PHY.
Signed-off-by: Alvaro Gamez Machado
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 48 +--
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git
On Wed, Jul 05, 2017 at 04:34:36PM +0200, Andrew Lunn wrote:
> So the only property which is currently wrong is xlnx,phy-type. As you
> said, all the others are garbage. So i would suggest something like:
>
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> b/drivers/net/ethernet/
On Tue, Jul 04, 2017 at 09:24:03AM -0700, Florian Fainelli wrote:
> On July 2, 2017 3:19:14 AM PDT, Alvaro Gamez Machado
> wrote:
> >On Fri, Jun 30, 2017 at 10:30:38AM -0700, Florian Fainelli wrote:
> >> On 06/30/2017 02:25 AM, Alvaro Gamez Machado wrote:
> >&g
On Fri, Jun 30, 2017 at 10:30:38AM -0700, Florian Fainelli wrote:
> On 06/30/2017 02:25 AM, Alvaro Gamez Machado wrote:
> > if (lp->phy_node) {
> > - if (lp->phy_type == XAE_PHY_TYPE_GMII) {
> > + if (lp->phy_type == XAE_PHY_TYPE_MII) {
This IP core has support for mii connectivity to the phy, so be ready to
connect to it when this is the case.
Signed-off-by: Alvaro Gamez Machado
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet
This patch adds support for the IP core provided by Xilinx.
This IP core can function as a two independent timers, but can also use
both counters as values for period and duty cycle of a PWM output.
Signed-off-by: Alvaro Gamez Machado
---
Hi!
AXI timer IP core is also used on Microblaze based
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