Nitpick: subject prefix should be "mtd: spinand" not
"mtd: nand: spi" :-).
On Thu, 8 Nov 2018 08:32:11 +
Schrempf Frieder wrote:
> Add minimal support for the Toshiba TC58CVG2S0H SPI NAND chip.
>
> Signed-off-by: Frieder Schrempf
> ---
> drivers/mtd/nand/spi/Makefile | 2 +-
>
Nitpick: subject prefix should be "mtd: spinand" not
"mtd: nand: spi" :-).
On Thu, 8 Nov 2018 08:32:11 +
Schrempf Frieder wrote:
> Add minimal support for the Toshiba TC58CVG2S0H SPI NAND chip.
>
> Signed-off-by: Frieder Schrempf
> ---
> drivers/mtd/nand/spi/Makefile | 2 +-
>
Hi Mark,
On Wed, 7 Nov 2018 15:18:36 +
Mark Brown wrote:
> On Wed, Nov 07, 2018 at 03:03:27PM +, Mark Brown wrote:
> > The patch
> >
> >spi: Add QuadSPI driver for Atmel SAMA5D2
> >
> > has been applied to the spi tree at
> >
> >
Hi Mark,
On Wed, 7 Nov 2018 15:18:36 +
Mark Brown wrote:
> On Wed, Nov 07, 2018 at 03:03:27PM +, Mark Brown wrote:
> > The patch
> >
> >spi: Add QuadSPI driver for Atmel SAMA5D2
> >
> > has been applied to the spi tree at
> >
> >
On Wed, 7 Nov 2018 15:43:20 +0100
Frieder Schrempf wrote:
> From: Frieder Schrempf
>
> Adjust the documentation of the new SPI memory interface based
> driver to reflect the new drivers settings.
>
> The "old" driver was using the "fsl,qspi-has-second-chip" property to
> select one of two
On Wed, 7 Nov 2018 15:43:20 +0100
Frieder Schrempf wrote:
> From: Frieder Schrempf
>
> Adjust the documentation of the new SPI memory interface based
> driver to reflect the new drivers settings.
>
> The "old" driver was using the "fsl,qspi-has-second-chip" property to
> select one of two
On Wed, 7 Nov 2018 15:43:19 +0100
Frieder Schrempf wrote:
> From: Frieder Schrempf
>
> Move the documentation of the old SPI NOR driver to the place of the new
> SPI memory interface based driver.
>
> Signed-off-by: Frieder Schrempf
> ---
> .../devicetree/bindings/mtd/fsl-quadspi.txt |
On Wed, 7 Nov 2018 15:43:19 +0100
Frieder Schrempf wrote:
> From: Frieder Schrempf
>
> Move the documentation of the old SPI NOR driver to the place of the new
> SPI memory interface based driver.
>
> Signed-off-by: Frieder Schrempf
> ---
> .../devicetree/bindings/mtd/fsl-quadspi.txt |
On Wed, 7 Nov 2018 16:36:13 +
Schrempf Frieder wrote:
> Hi Olof,
>
> On 07.11.18 17:20, Olof Johansson wrote:
> > On Wed, Nov 7, 2018 at 6:44 AM Frieder Schrempf
> > wrote:
> >>
> >> From: Frieder Schrempf
> >>
> >> The new driver at spi/spi-fsl-qspi.c replaces the old SPI NOR driver
>
On Wed, 7 Nov 2018 16:36:13 +
Schrempf Frieder wrote:
> Hi Olof,
>
> On 07.11.18 17:20, Olof Johansson wrote:
> > On Wed, Nov 7, 2018 at 6:44 AM Frieder Schrempf
> > wrote:
> >>
> >> From: Frieder Schrempf
> >>
> >> The new driver at spi/spi-fsl-qspi.c replaces the old SPI NOR driver
>
On Wed, 7 Nov 2018 12:08:58 +0100
Christophe Kerello wrote:
> >> +
> >> +write_8bit:
> >> + for (i = 0; i < len; i++)
> >> + writeb_relaxed(p[i], io_addr_w);
> >
> > Is 8bit access really enforced by the byte accessor? In this case, how
> > can you be sure 32-bit accesses are doing
On Wed, 7 Nov 2018 12:08:58 +0100
Christophe Kerello wrote:
> >> +
> >> +write_8bit:
> >> + for (i = 0; i < len; i++)
> >> + writeb_relaxed(p[i], io_addr_w);
> >
> > Is 8bit access really enforced by the byte accessor? In this case, how
> > can you be sure 32-bit accesses are doing
Hello Michael,
On Thu, 01 Nov 2018 21:18:28 +1100
Michael Ellerman wrote:
> Mark Brown writes:
>
> > On Fri, Oct 26, 2018 at 12:36:14PM -0500, Rob Herring wrote:
> >> On Thu, Oct 25, 2018 at 9:14 AM Linus Torvalds
> >> wrote:
> >
> >> > Are there other situations where you might want
Hello Michael,
On Thu, 01 Nov 2018 21:18:28 +1100
Michael Ellerman wrote:
> Mark Brown writes:
>
> > On Fri, Oct 26, 2018 at 12:36:14PM -0500, Rob Herring wrote:
> >> On Thu, Oct 25, 2018 at 9:14 AM Linus Torvalds
> >> wrote:
> >
> >> > Are there other situations where you might want
On Tue, 6 Nov 2018 23:19:14 +0100
Geert Uytterhoeven wrote:
> Hi Boris,
>
> On Tue, Nov 6, 2018 at 10:58 PM Boris Brezillon
> wrote:
> > On Tue, 6 Nov 2018 22:44:16 +0100
> > Geert Uytterhoeven wrote:
> > > On Toshiba RBTX4927, where map_probe is supposed
On Tue, 6 Nov 2018 23:19:14 +0100
Geert Uytterhoeven wrote:
> Hi Boris,
>
> On Tue, Nov 6, 2018 at 10:58 PM Boris Brezillon
> wrote:
> > On Tue, 6 Nov 2018 22:44:16 +0100
> > Geert Uytterhoeven wrote:
> > > On Toshiba RBTX4927, where map_probe is supposed
On Tue, 6 Nov 2018 22:44:16 +0100
Geert Uytterhoeven wrote:
> On Toshiba RBTX4927, where map_probe is supposed to fail:
>
> Creating 2 MTD partitions on "physmap-flash.0":
> 0x00c0-0x0100 : "boot"
> 0x-0x00c0 : "user"
> physmap-flash
On Tue, 6 Nov 2018 22:44:16 +0100
Geert Uytterhoeven wrote:
> On Toshiba RBTX4927, where map_probe is supposed to fail:
>
> Creating 2 MTD partitions on "physmap-flash.0":
> 0x00c0-0x0100 : "boot"
> 0x-0x00c0 : "user"
> physmap-flash
On Tue, 6 Nov 2018 19:08:27 +0800
Liang Yang wrote:
> On 2018/11/6 18:22, Boris Brezillon wrote:
> > On Tue, 6 Nov 2018 18:00:37 +0800
> > Liang Yang wrote:
> >
> >> On 2018/11/6 17:28, Boris Brezillon wrote:
> >>> On Tue, 6 Nov 2
On Tue, 6 Nov 2018 19:08:27 +0800
Liang Yang wrote:
> On 2018/11/6 18:22, Boris Brezillon wrote:
> > On Tue, 6 Nov 2018 18:00:37 +0800
> > Liang Yang wrote:
> >
> >> On 2018/11/6 17:28, Boris Brezillon wrote:
> >>> On Tue, 6 Nov 2
On Mon, 5 Nov 2018 08:58:35 +0100
Boris Brezillon wrote:
> Enabling -Wvla found another variable-length array with randconfig
> testing:
>
> drivers/mtd/maps/sa1100-flash.c: In function 'sa1100_setup_mtd':
> drivers/mtd/maps/sa1100-flash.c:224:10: error: ISO C90 forbids var
On Mon, 5 Nov 2018 08:58:35 +0100
Boris Brezillon wrote:
> Enabling -Wvla found another variable-length array with randconfig
> testing:
>
> drivers/mtd/maps/sa1100-flash.c: In function 'sa1100_setup_mtd':
> drivers/mtd/maps/sa1100-flash.c:224:10: error: ISO C90 forbids var
On Tue, 6 Nov 2018 18:00:37 +0800
Liang Yang wrote:
> On 2018/11/6 17:28, Boris Brezillon wrote:
> > On Tue, 6 Nov 2018 17:08:00 +0800
> > Liang Yang wrote:
> >
> >> On 2018/11/5 23:53, Boris Brezillon wrote:
> >>> On Fri, 2 Nov 20
On Tue, 6 Nov 2018 18:00:37 +0800
Liang Yang wrote:
> On 2018/11/6 17:28, Boris Brezillon wrote:
> > On Tue, 6 Nov 2018 17:08:00 +0800
> > Liang Yang wrote:
> >
> >> On 2018/11/5 23:53, Boris Brezillon wrote:
> >>> On Fri, 2 Nov 20
On Tue, 6 Nov 2018 17:08:00 +0800
Liang Yang wrote:
> On 2018/11/5 23:53, Boris Brezillon wrote:
> > On Fri, 2 Nov 2018 00:42:21 +0800
> > Jianxin Pan wrote:
> >
> >> +#define NFC_REG_CMD 0x00
> >> +#define NFC_CMD_DRD
On Tue, 6 Nov 2018 17:08:00 +0800
Liang Yang wrote:
> On 2018/11/5 23:53, Boris Brezillon wrote:
> > On Fri, 2 Nov 2018 00:42:21 +0800
> > Jianxin Pan wrote:
> >
> >> +#define NFC_REG_CMD 0x00
> >> +#define NFC_CMD_DRD
On Tue, 16 Oct 2018 09:13:46 +0200
Christophe JAILLET wrote:
> We return 0 unconditionally in 'cqspi_direct_read_execute()'.
> However, 'ret' is set to some error codes in several error handling paths.
>
> Return 'ret' instead to propagate the error code.
>
> Fixes: ffa639e069fb ("mtd:
On Tue, 16 Oct 2018 09:13:46 +0200
Christophe JAILLET wrote:
> We return 0 unconditionally in 'cqspi_direct_read_execute()'.
> However, 'ret' is set to some error codes in several error handling paths.
>
> Return 'ret' instead to propagate the error code.
>
> Fixes: ffa639e069fb ("mtd:
gt; 'mtd' description in 'panic_nand_wait'
>
> Fixes: f1d46942e823 ("mtd: rawnand: Pass a nand_chip object to
> chip->waitfunc()")
>
> Signed-off-by: Randy Dunlap
> Cc: Boris Brezillon
> Cc: Miquel Raynal
> Cc: Richard Weinberger
Queued to the fixes branch.
Thanks,
gt; 'mtd' description in 'panic_nand_wait'
>
> Fixes: f1d46942e823 ("mtd: rawnand: Pass a nand_chip object to
> chip->waitfunc()")
>
> Signed-off-by: Randy Dunlap
> Cc: Boris Brezillon
> Cc: Miquel Raynal
> Cc: Richard Weinberger
Queued to the fixes branch.
Thanks,
On Thu, 11 Oct 2018 13:06:16 +0200
Arnd Bergmann wrote:
> I noticed during the creation of another bugfix that the BCH_CONST_PARAMS
> option that is set by DOCG3 breaks setting variable parameters for any
> other users of the BCH library code.
>
> The only other user we have today is the
On Thu, 11 Oct 2018 13:06:16 +0200
Arnd Bergmann wrote:
> I noticed during the creation of another bugfix that the BCH_CONST_PARAMS
> option that is set by DOCG3 breaks setting variable parameters for any
> other users of the BCH library code.
>
> The only other user we have today is the
Hi Christophe,
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
A few more comments.
> +/* Sequencer read/write configuration */
> +static void stm32_fmc2_rw_page_init(struct nand_chip *chip, int page,
> + int raw, bool write_data)
> +{
> + struct stm32_fmc2 *fmc2 =
Hi Christophe,
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
A few more comments.
> +/* Sequencer read/write configuration */
> +static void stm32_fmc2_rw_page_init(struct nand_chip *chip, int page,
> + int raw, bool write_data)
> +{
> + struct stm32_fmc2 *fmc2 =
On Fri, 2 Nov 2018 00:42:21 +0800
Jianxin Pan wrote:
> +#define NFC_REG_CMD 0x00
> +#define NFC_CMD_DRD (0x8 << 14)
> +#define NFC_CMD_IDLE (0xc << 14)
> +#define NFC_CMD_DWR (0x4 << 14)
> +#define NFC_CMD_CLE (0x5 << 14)
> +#define NFC_CMD_ALE
On Fri, 2 Nov 2018 00:42:21 +0800
Jianxin Pan wrote:
> +#define NFC_REG_CMD 0x00
> +#define NFC_CMD_DRD (0x8 << 14)
> +#define NFC_CMD_IDLE (0xc << 14)
> +#define NFC_CMD_DWR (0x4 << 14)
> +#define NFC_CMD_CLE (0x5 << 14)
> +#define NFC_CMD_ALE
e waiting
>
> Piotr Bugalski (6):
> mtd: spi-nor: atmel-quaspi: Typo fix
> mtd: spi-nor: atmel-quadspi: Add spi-mem support to atmel-quadspi
> mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi
> driver
> mtd: spi-nor: atmel-quadspi: Remove unused co
e waiting
>
> Piotr Bugalski (6):
> mtd: spi-nor: atmel-quaspi: Typo fix
> mtd: spi-nor: atmel-quadspi: Add spi-mem support to atmel-quadspi
> mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi
> driver
> mtd: spi-nor: atmel-quadspi: Remove unused co
On Mon, 5 Nov 2018 08:58:35 +0100
Boris Brezillon wrote:
> Enabling -Wvla found another variable-length array with randconfig
> testing:
>
> drivers/mtd/maps/sa1100-flash.c: In function 'sa1100_setup_mtd':
> drivers/mtd/maps/sa1100-flash.c:224:10: error: ISO C90 forbids var
On Mon, 5 Nov 2018 08:58:35 +0100
Boris Brezillon wrote:
> Enabling -Wvla found another variable-length array with randconfig
> testing:
>
> drivers/mtd/maps/sa1100-flash.c: In function 'sa1100_setup_mtd':
> drivers/mtd/maps/sa1100-flash.c:224:10: error: ISO C90 forbids var
to mtd_concat_create()
instead of using a VLA.
Reported-by: Arnd Bergmann
Signed-off-by: Boris Brezillon
Cc: Kees Cook
Cc: Olof Johansson
---
Changes in v2:
- Allocate cdev dynamically instead of having a fixed-size array
Hello,
I'm planning to queue this patch to the mtd/fixes PR. Arnd, Kees
to mtd_concat_create()
instead of using a VLA.
Reported-by: Arnd Bergmann
Signed-off-by: Boris Brezillon
Cc: Kees Cook
Cc: Olof Johansson
---
Changes in v2:
- Allocate cdev dynamically instead of having a fixed-size array
Hello,
I'm planning to queue this patch to the mtd/fixes PR. Arnd, Kees
Hi Abhishek,
On Fri, 20 Jul 2018 15:03:48 +0200
Boris Brezillon wrote:
> On Fri, 20 Jul 2018 17:46:38 +0530
> Abhishek Sahu wrote:
>
> > Hi Boris,
> >
> > On 2018-07-19 03:13, Boris Brezillon wrote:
> > > On Wed, 18 Jul 2018 23:23
Hi Abhishek,
On Fri, 20 Jul 2018 15:03:48 +0200
Boris Brezillon wrote:
> On Fri, 20 Jul 2018 17:46:38 +0530
> Abhishek Sahu wrote:
>
> > Hi Boris,
> >
> > On 2018-07-19 03:13, Boris Brezillon wrote:
> > > On Wed, 18 Jul 2018 23:23
Hello Linus,
On Thu, 1 Nov 2018 09:27:20 -0700
Linus Torvalds wrote:
> On Wed, Oct 31, 2018 at 10:35 PM Boris Brezillon
> wrote:
> >
> > Greg, I didn't get your feedback on v10 of the i3c patchset [1] where I
> > was asking if you'd agree to have this framework merged
Hello Linus,
On Thu, 1 Nov 2018 09:27:20 -0700
Linus Torvalds wrote:
> On Wed, Oct 31, 2018 at 10:35 PM Boris Brezillon
> wrote:
> >
> > Greg, I didn't get your feedback on v10 of the i3c patchset [1] where I
> > was asking if you'd agree to have this framework merged
Hello Greg,
On Thu, 1 Nov 2018 12:33:30 +0100
Greg Kroah-Hartman wrote:
> On Thu, Nov 01, 2018 at 06:35:23AM +0100, Boris Brezillon wrote:
> > Hello Greg, Linus,
> >
> > Greg, I didn't get your feedback on v10 of the i3c patchset [1] where I
> > was asking if you'd a
Hello Greg,
On Thu, 1 Nov 2018 12:33:30 +0100
Greg Kroah-Hartman wrote:
> On Thu, Nov 01, 2018 at 06:35:23AM +0100, Boris Brezillon wrote:
> > Hello Greg, Linus,
> >
> > Greg, I didn't get your feedback on v10 of the i3c patchset [1] where I
> > was asking if you'd a
: Document Cadence I3C master bindings (2018-11-01 06:12:05
+0100)
Add the I3C framework + an I3C controller driver for Cadence IP
Boris Brezillon (7):
i3c: Add core
: Document Cadence I3C master bindings (2018-11-01 06:12:05
+0100)
Add the I3C framework + an I3C controller driver for Cadence IP
Boris Brezillon (7):
i3c: Add core
Hi Huijin,
On Thu, 23 Aug 2018 04:43:39 -0400
Huijin Park wrote:
> From: "huijin.park"
>
> assign of a signed value which has type 'int' to a variable of
> a bigger unsigned integer type 'uint64_t'.
Why are you mentioning u64? AFAICT, the len passed to erase_write() is
always an unsigned
Hi Huijin,
On Thu, 23 Aug 2018 04:43:39 -0400
Huijin Park wrote:
> From: "huijin.park"
>
> assign of a signed value which has type 'int' to a variable of
> a bigger unsigned integer type 'uint64_t'.
Why are you mentioning u64? AFAICT, the len passed to erase_write() is
always an unsigned
Hi Huijin,
Subject prefix should be "mtd: spi-nor: ...", and please replace
"unexpected error" by "unsigned int overflows".
On Thu, 23 Aug 2018 03:28:02 -0400
Huijin Park wrote:
> From: "huijin.park"
>
> the params->size is defined as "u64"
> and, "info->sector_size" and "info->n_sectors" is
Hi Huijin,
Subject prefix should be "mtd: spi-nor: ...", and please replace
"unexpected error" by "unsigned int overflows".
On Thu, 23 Aug 2018 03:28:02 -0400
Huijin Park wrote:
> From: "huijin.park"
>
> the params->size is defined as "u64"
> and, "info->sector_size" and "info->n_sectors" is
Hi Piotr, Tudor,
On Wed, 27 Jun 2018 15:16:03 +0200
Piotr Bugalski wrote:
> Hello,
>
> Atmel SAMA5D2 is equipped with two QSPI interfaces. These interfaces can
> work as in SPI-compatible mode or use two / four lines to improve
> communication speed. At the moment there is QSPI driver strongly
Hi Piotr, Tudor,
On Wed, 27 Jun 2018 15:16:03 +0200
Piotr Bugalski wrote:
> Hello,
>
> Atmel SAMA5D2 is equipped with two QSPI interfaces. These interfaces can
> work as in SPI-compatible mode or use two / four lines to improve
> communication speed. At the moment there is QSPI driver strongly
On Wed, 31 Oct 2018 03:18:28 +
"Grandbois, Brett" wrote:
> On 30/10/18 6:26 pm, Boris Brezillon wrote:
> > On Mon, 29 Oct 2018 23:15:42 +
> > "Grandbois, Brett" wrote:
> >
> >> On 28/10/18 1:39 am, Boris Brezillon wrote:
> >>
On Wed, 31 Oct 2018 03:18:28 +
"Grandbois, Brett" wrote:
> On 30/10/18 6:26 pm, Boris Brezillon wrote:
> > On Mon, 29 Oct 2018 23:15:42 +
> > "Grandbois, Brett" wrote:
> >
> >> On 28/10/18 1:39 am, Boris Brezillon wrote:
> >>
On Mon, 29 Oct 2018 23:15:42 +
"Grandbois, Brett" wrote:
> On 28/10/18 1:39 am, Boris Brezillon wrote:
> > Hi Brett,
> >
> > On Tue, 16 Oct 2018 00:57:41 +
> > "Grandbois, Brett" wrote:
> >
> >> Add support to expose th
On Mon, 29 Oct 2018 23:15:42 +
"Grandbois, Brett" wrote:
> On 28/10/18 1:39 am, Boris Brezillon wrote:
> > Hi Brett,
> >
> > On Tue, 16 Oct 2018 00:57:41 +
> > "Grandbois, Brett" wrote:
> >
> >> Add support to expose th
Hi Kees,
On Sun, 28 Oct 2018 19:13:26 -0700
Kees Cook wrote:
> On Fri, Oct 12, 2018 at 2:22 AM, Boris Brezillon
> wrote:
> > On Fri, 12 Oct 2018 11:19:52 +0200
> > Arnd Bergmann wrote:
> >
> >> On Fri, Oct 12, 2018 at 11:16 AM Boris Brezillon
>
Hi Kees,
On Sun, 28 Oct 2018 19:13:26 -0700
Kees Cook wrote:
> On Fri, Oct 12, 2018 at 2:22 AM, Boris Brezillon
> wrote:
> > On Fri, 12 Oct 2018 11:19:52 +0200
> > Arnd Bergmann wrote:
> >
> >> On Fri, Oct 12, 2018 at 11:16 AM Boris Brezillon
>
Hi Brett,
On Tue, 16 Oct 2018 00:57:41 +
"Grandbois, Brett" wrote:
> Add support to expose the SPI boot flash on AMD Family 16h CPUs as a
> standard mtd device to give userspace BIOS updaters greater feature
> support. The BIOS and Kernel Developer's Guide refers to this as the
> 'SPI ROM'
Hi Brett,
On Tue, 16 Oct 2018 00:57:41 +
"Grandbois, Brett" wrote:
> Add support to expose the SPI boot flash on AMD Family 16h CPUs as a
> standard mtd device to give userspace BIOS updaters greater feature
> support. The BIOS and Kernel Developer's Guide refers to this as the
> 'SPI ROM'
On Thu, 25 Oct 2018 09:16:53 +0200
Boris Brezillon wrote:
> Hi Mason,
>
> On Thu, 25 Oct 2018 14:44:30 +0800
> masonccy...@mxic.com.tw wrote:
>
> > From: Mason Yang
> >
> > Hi Boris,
> > I patched this for Macronix all 1.8V AC chips.
> > Thanks f
On Thu, 25 Oct 2018 09:16:53 +0200
Boris Brezillon wrote:
> Hi Mason,
>
> On Thu, 25 Oct 2018 14:44:30 +0800
> masonccy...@mxic.com.tw wrote:
>
> > From: Mason Yang
> >
> > Hi Boris,
> > I patched this for Macronix all 1.8V AC chips.
> > Thanks f
Hi Mason,
On Thu, 25 Oct 2018 14:44:30 +0800
masonccy...@mxic.com.tw wrote:
> From: Mason Yang
>
> Hi Boris,
> I patched this for Macronix all 1.8V AC chips.
> Thanks for your review.
No need to add a cover letter when you only have patch.
> best regards,
> Mason
>
> Mason Yang (1):
>
Hi Mason,
On Thu, 25 Oct 2018 14:44:30 +0800
masonccy...@mxic.com.tw wrote:
> From: Mason Yang
>
> Hi Boris,
> I patched this for Macronix all 1.8V AC chips.
> Thanks for your review.
No need to add a cover letter when you only have patch.
> best regards,
> Mason
>
> Mason Yang (1):
>
On Tue, 23 Oct 2018 13:28:09 -0500
Rob Herring wrote:
> On Mon, Aug 27, 2018 at 4:44 AM Johan Hovold wrote:
> >
> > On Mon, Aug 27, 2018 at 10:48:42AM +0200, Boris Brezillon wrote:
> > > On Mon, 27 Aug 2018 10:44:14 +0200
> > > Johan Hovold wrote:
> >
On Tue, 23 Oct 2018 13:28:09 -0500
Rob Herring wrote:
> On Mon, Aug 27, 2018 at 4:44 AM Johan Hovold wrote:
> >
> > On Mon, Aug 27, 2018 at 10:48:42AM +0200, Boris Brezillon wrote:
> > > On Mon, 27 Aug 2018 10:44:14 +0200
> > > Johan Hovold wrote:
> >
Hi Yogesh,
On Tue, 23 Oct 2018 09:39:25 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> Did we have have any comments or remarks about this patch-series, if not
> please apply.
Sorry, but it was already too late for this release, and the merge
window just started, so it will have to wait at
Hi Yogesh,
On Tue, 23 Oct 2018 09:39:25 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> Did we have have any comments or remarks about this patch-series, if not
> please apply.
Sorry, but it was already too late for this release, and the merge
window just started, so it will have to wait at
On Tue, 23 Oct 2018 09:37:13 +
Yogesh Narayan Gaur wrote:
> Add support for octo mode I/O data transfer in spi-mem framework.
>
> Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
> ---
> Changes for v3:
> - Modified string 'octal' with 'octo'.
> Changes fo
On Tue, 23 Oct 2018 09:37:13 +
Yogesh Narayan Gaur wrote:
> Add support for octo mode I/O data transfer in spi-mem framework.
>
> Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
> ---
> Changes for v3:
> - Modified string 'octal' with 'octo'.
> Changes fo
receive with 8 wires
>
> Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
> ---
> Changes for v3:
> - Modified string 'octal' with 'octo'.
> - Add octo mode support in spi_setup().
> Changes for v2:
> - Incorporated review comments of Boris.
>
> drivers
receive with 8 wires
>
> Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
> ---
> Changes for v3:
> - Modified string 'octal' with 'octo'.
> - Add octo mode support in spi_setup().
> Changes for v2:
> - Incorporated review comments of Boris.
>
> drivers
Hi Linus,
On Tue, 23 Oct 2018 09:41:32 +0100
Linus Torvalds wrote:
> So I'm mainly pinging people I've already pulled to see how much
> people actually _care_. Yes, the ack is nice, but do people care
> enough that I should try to make that workflow change? Traditionally,
> you can see that
Hi Linus,
On Tue, 23 Oct 2018 09:41:32 +0100
Linus Torvalds wrote:
> So I'm mainly pinging people I've already pulled to see how much
> people actually _care_. Yes, the ack is nice, but do people care
> enough that I should try to make that workflow change? Traditionally,
> you can see that
On Tue, 23 Oct 2018 09:05:23 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Tuesday, October 23, 2018 2:31 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
On Tue, 23 Oct 2018 09:05:23 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Tuesday, October 23, 2018 2:31 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
On Tue, 23 Oct 2018 08:59:22 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Tuesday, October 23, 2018 2:18 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
On Tue, 23 Oct 2018 08:59:22 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Tuesday, October 23, 2018 2:18 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
On Tue, 23 Oct 2018 08:56:46 +
Yogesh Narayan Gaur wrote:
> +struct nxp_fspi {
> + void __iomem *iobase;
> + void __iomem *ahb_addr;
> + u32 memmap_phy;
> + u32 memmap_phy_size;
> + struct clk *clk, *clk_en;
> + struct device *dev;
> + struct completion c;
> +
On Tue, 23 Oct 2018 08:56:46 +
Yogesh Narayan Gaur wrote:
> +struct nxp_fspi {
> + void __iomem *iobase;
> + void __iomem *ahb_addr;
> + u32 memmap_phy;
> + u32 memmap_phy_size;
> + struct clk *clk, *clk_en;
> + struct device *dev;
> + struct completion c;
> +
On Tue, 23 Oct 2018 10:48:27 +0200
Boris Brezillon wrote:
> On Tue, 23 Oct 2018 08:18:35 +
> Yogesh Narayan Gaur wrote:
>
> >
> > I have added the prints in m25p80_read() and in flexspi controller
> > prepare_lut and read_rxfifo() func.
> > In these ha
On Tue, 23 Oct 2018 10:48:27 +0200
Boris Brezillon wrote:
> On Tue, 23 Oct 2018 08:18:35 +
> Yogesh Narayan Gaur wrote:
>
> >
> > I have added the prints in m25p80_read() and in flexspi controller
> > prepare_lut and read_rxfifo() func.
> > In these ha
On Tue, 23 Oct 2018 08:18:35 +
Yogesh Narayan Gaur wrote:
>
> I have added the prints in m25p80_read() and in flexspi controller
> prepare_lut and read_rxfifo() func.
> In these have added prints for data variable of struct op and data which
> being read by the controller from the flash.
On Tue, 23 Oct 2018 08:18:35 +
Yogesh Narayan Gaur wrote:
>
> I have added the prints in m25p80_read() and in flexspi controller
> prepare_lut and read_rxfifo() func.
> In these have added prints for data variable of struct op and data which
> being read by the controller from the flash.
On Tue, 23 Oct 2018 04:47:33 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Monday, October 22, 2018 5:22 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
On Tue, 23 Oct 2018 04:47:33 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Monday, October 22, 2018 5:22 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
Create an entry for the I3C subsystem and mark it as maintained by me.
There's no official git repository, patchwork instance, mailing list or
website yet, but this will be added after the subsystem has been
accepted.
Signed-off-by: Boris Brezillon
---
Changes in v9:
- None
Changes in v8
Create an entry for the I3C subsystem and mark it as maintained by me.
There's no official git repository, patchwork instance, mailing list or
website yet, but this will be added after the subsystem has been
accepted.
Signed-off-by: Boris Brezillon
---
Changes in v9:
- None
Changes in v8
Add a driver for Cadence I3C GPIO expander.
Signed-off-by: Boris Brezillon
Acked-by: Linus Walleij
---
Changes in v9:
- None
Changes in v8:
- None
Changes in v7:
- None
Changes in v6:
- Use kmalloc_array() instead of kmalloc(N * sizeof(X))
- Add Linus' ack
Changes in v5:
- Use
Add a driver for Cadence I3C GPIO expander.
Signed-off-by: Boris Brezillon
Acked-by: Linus Walleij
---
Changes in v9:
- None
Changes in v8:
- None
Changes in v7:
- None
Changes in v6:
- Use kmalloc_array() instead of kmalloc(N * sizeof(X))
- Add Linus' ack
Changes in v5:
- Use
Document sysfs files/directories/symlinks exposed by the I3C subsystem.
Signed-off-by: Boris Brezillon
Reviewed-by: Arnd Bergmann
---
Changes in v9:
- Add Arnd's R-b
Changes in v8:
- None
Changes in v7:
- Bump KernelVersion to 4.20
- Add new entries under i3c- now that the master controller
Document sysfs files/directories/symlinks exposed by the I3C subsystem.
Signed-off-by: Boris Brezillon
Reviewed-by: Arnd Bergmann
---
Changes in v9:
- Add Arnd's R-b
Changes in v8:
- None
Changes in v7:
- Bump KernelVersion to 4.20
- Add new entries under i3c- now that the master controller
+Mark
Hi Yogesh,
On Mon, 15 Oct 2018 12:13:57 +
Yogesh Narayan Gaur wrote:
> Add support for octal mode IO data transfer.
> Micron flash, mt35xu512aba, supports octal mode data transfer and
> NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
>
> Patch series
> * Add
+Mark
Hi Yogesh,
On Mon, 15 Oct 2018 12:13:57 +
Yogesh Narayan Gaur wrote:
> Add support for octal mode IO data transfer.
> Micron flash, mt35xu512aba, supports octal mode data transfer and
> NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
>
> Patch series
> * Add
On Mon, 22 Oct 2018 11:46:55 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Monday, October 22, 2018 5:13 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
On Mon, 22 Oct 2018 11:46:55 +
Yogesh Narayan Gaur wrote:
> Hi,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Monday, October 22, 2018 5:13 PM
> > To: Yogesh Narayan Gaur
> > Cc: cristian
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