Re: [PATCH v5] mtd: spi-nor: add hisilicon spi-nor flash controller driver

if (ret) > + goto fail; > + > + ret = mtd_device_register(mtd, parts, nr_parts); How about just mtd_device_register(mtd, 0, NULL) ? > + if (ret) > + goto fail; > + > + i++; > +

Re: [PATCH 4/8] mtd: spi-nor: disallow further writes to SR if WP# is low

On 28 January 2016 at 16:48, Brian Norris <computersforpe...@gmail.com> wrote: > On Thu, Jan 28, 2016 at 04:24:50PM -0300, Ezequiel Garcia wrote: >> On 28 January 2016 at 14:59, Brian Norris <computersforpe...@gmail.com> >> wrote: >> > So, maybe we want

Re: [PATCH 4/8] mtd: spi-nor: disallow further writes to SR if WP# is low

On 28 January 2016 at 14:59, Brian Norris wrote: > Hi Ezequiel, > > Thanks for the review. > > On Thu, Jan 28, 2016 at 11:36:13AM -0300, Ezequiel Garcia wrote: >> On 28 January 2016 at 02:51, Brian Norris >> wrote: >> > Locking the flash is most useful i

Re: [PATCH 0/8] mtd: spi-nor: locking fixes and updates

; region > mtd: spi-nor: disallow further writes to SR if WP# is low > mtd: spi-nor: use BIT() for flash_info flags > mtd: spi-nor: add SPI_NOR_HAS_LOCK flag > mtd: spi-nor: add TB (Top/Bottom) protect support > mtd: spi-nor: support lock/unlock for a few Winbond chip

Re: [PATCH 4/8] mtd: spi-nor: disallow further writes to SR if WP# is low

On 28 January 2016 at 02:51, Brian Norris wrote: > Locking the flash is most useful if it provides real hardware security. > Otherwise, it's little more than a software permission bit. > > A reasonable use case that provides real HW security might be like > follows: > > (1) hardware WP# is

Re: [PATCH 4/8] mtd: spi-nor: disallow further writes to SR if WP# is low

On 28 January 2016 at 14:59, Brian Norris <computersforpe...@gmail.com> wrote: > Hi Ezequiel, > > Thanks for the review. > > On Thu, Jan 28, 2016 at 11:36:13AM -0300, Ezequiel Garcia wrote: >> On 28 January 2016 at 02:51, Brian Norris <computersforpe...@gmail.com>

Re: [PATCH 4/8] mtd: spi-nor: disallow further writes to SR if WP# is low

On 28 January 2016 at 02:51, Brian Norris wrote: > Locking the flash is most useful if it provides real hardware security. > Otherwise, it's little more than a software permission bit. > > A reasonable use case that provides real HW security might be like > follows: >

Re: [PATCH 0/8] mtd: spi-nor: locking fixes and updates

pport lock/unlock for a few Winbond chips > For all patches, except RFC 7/8: Reviewed-by: Ezequiel Garcia <ezequ...@vanguardiasur.com.ar> -- Ezequiel García, VanguardiaSur www.vanguardiasur.com.ar

Re: [PATCH v2 00/12] mtd: nand_bbt: introduce independent nand BBT

On 29 December 2015 at 06:35, Boris Brezillon wrote: > Hi, > > On Mon, 28 Dec 2015 17:42:50 -0300 > Ezequiel Garcia wrote: > >> This is looking a lot better, thanks for the good work! >> >> On 15 December 2015 at 02:59, Peter Pan wrote: >> > Currentl

Re: [PATCH v2 00/12] mtd: nand_bbt: introduce independent nand BBT

On 29 December 2015 at 06:35, Boris Brezillon <boris.brezil...@free-electrons.com> wrote: > Hi, > > On Mon, 28 Dec 2015 17:42:50 -0300 > Ezequiel Garcia <ezequ...@vanguardiasur.com.ar> wrote: > >> This is looking a lot better, thanks for the good work! >> >

Re: [PATCH v2 00/12] mtd: nand_bbt: introduce independent nand BBT

This is looking a lot better, thanks for the good work! On 15 December 2015 at 02:59, Peter Pan wrote: > Currently nand_bbt.c is tied with struct nand_chip, and it makes other > NAND family chips hard to use nand_bbt.c. Maybe it's the reason why > onenand has own bbt(onenand_bbt.c). > > Separate

Re: [PATCH v2 00/12] mtd: nand_bbt: introduce independent nand BBT

This is looking a lot better, thanks for the good work! On 15 December 2015 at 02:59, Peter Pan wrote: > Currently nand_bbt.c is tied with struct nand_chip, and it makes other > NAND family chips hard to use nand_bbt.c. Maybe it's the reason why > onenand has own

Re: [PATCH v4 0/5] mtd: pxa3xx_nand: rework the timing setup

On 22 October 2015 at 12:12, Thomas Petazzoni wrote: > Hello Antoine, > > On Wed, 21 Oct 2015 10:28:59 +0200, Antoine Tenart wrote: > >> Antoine Tenart (5): >> mtd: pxa3xx: prepare allowing compile test >> mtd: nand: allow compile test of MTD_NAND_PXA3xx >> mtd: pxa3xx_nand: add helpers to

Re: [PATCH v4 0/5] mtd: pxa3xx_nand: rework the timing setup

On 22 October 2015 at 12:12, Thomas Petazzoni wrote: > Hello Antoine, > > On Wed, 21 Oct 2015 10:28:59 +0200, Antoine Tenart wrote: > >> Antoine Tenart (5): >> mtd: pxa3xx: prepare allowing compile test >> mtd: nand: allow compile test of MTD_NAND_PXA3xx

Re: [PATCH 1/2] mtd: nand: automate NAND timings selection

e_unregister(mtd); > > + /* Free interface config struct */ > + kfree(chip->data_iface); > + > /* Free bad block table memory */ > kfree(chip->bbt); > if (!(chip->options & NAND_OWN_BUFFERS)) > diff --git a/include/linux/mtd/nand.h b/include/linu

Re: [PATCH 1/2] mtd: nand: automate NAND timings selection

_info *mtd) > > mtd_device_unregister(mtd); > > + /* Free interface config struct */ > + kfree(chip->data_iface); > + > /* Free bad block table memory */ > kfree(chip->bbt); > if (!(chip->options & NAND_OWN_BUFFERS)) > d

Re: [PATCH 01/10] pwm: lpc18xx_pwm: use pwm_set_chip_data

(+ Ariel) Hi Oliver, Not sure why there's some many people in Cc for such a silly change. I guess you are using get_maintainers.pl on the entire patchset and get this rather long list. IMO, the value of submitting patches as part of a larger series is to be able to push patches that need to be

Re: [PATCH v4 0/5] mtd: pxa3xx_nand: rework the timing setup

a3xx_nand.c | 274 > + > 2 files changed, 168 insertions(+), 108 deletions(-) > The series look good and it's certainly a great improvement. Thomas and Robert tested it, so we should be good to go: Acked-by: Ezequiel Garcia We

Re: [PATCH 01/10] pwm: lpc18xx_pwm: use pwm_set_chip_data

(+ Ariel) Hi Oliver, Not sure why there's some many people in Cc for such a silly change. I guess you are using get_maintainers.pl on the entire patchset and get this rather long list. IMO, the value of submitting patches as part of a larger series is to be able to push patches that need to be

Re: [PATCH v4 0/5] mtd: pxa3xx_nand: rework the timing setup

a3xx_nand.c | 274 > + > 2 files changed, 168 insertions(+), 108 deletions(-) > The series look good and it's certainly a great improvement. Thomas and Robert tested it, so we should be good to go: Acked-by: Ezequiel Garcia <ezequ...@vanguard

Re: [PATCH v4 0/5] mtd: pxa3xx_nand: rework the timing setup

On 22 October 2015 at 12:12, Thomas Petazzoni wrote: > Hello Antoine, > > On Wed, 21 Oct 2015 10:28:59 +0200, Antoine Tenart wrote: > >> Antoine Tenart (5): >> mtd: pxa3xx: prepare allowing compile test >> mtd: nand: allow compile test of MTD_NAND_PXA3xx >> mtd: pxa3xx_nand: add helpers to

Re: [PATCH v4 0/5] mtd: pxa3xx_nand: rework the timing setup

On 22 October 2015 at 12:12, Thomas Petazzoni wrote: > Hello Antoine, > > On Wed, 21 Oct 2015 10:28:59 +0200, Antoine Tenart wrote: > >> Antoine Tenart (5): >> mtd: pxa3xx: prepare allowing compile test >> mtd: nand: allow compile test of MTD_NAND_PXA3xx

Re: [PATCH] mtd: Add simple read disturb test

On 12 October 2015 at 21:11, Brian Norris wrote: > Resurrecting this old thread, since it was mentioned at ELCE. > > On Sun, Apr 12, 2015 at 09:31:20PM +0200, Boris Brezillon wrote: >> On Thu, 02 Apr 2015 18:18:34 +0200 >> Richard Weinberger wrote: >> > Am 02.04.2015 um 18:04 schrieb Brian

Re: [PATCH] mtd: Add simple read disturb test

On 12 October 2015 at 21:11, Brian Norris wrote: > Resurrecting this old thread, since it was mentioned at ELCE. > > On Sun, Apr 12, 2015 at 09:31:20PM +0200, Boris Brezillon wrote: >> On Thu, 02 Apr 2015 18:18:34 +0200 >> Richard Weinberger wrote: >>

Re: [PATCH v3 3/4] mtd: pxa3xx_nand: rework flash detection and timing setup

--- > drivers/mtd/nand/pxa3xx_nand.c | 118 > + > 1 file changed, 25 insertions(+), 93 deletions(-) > This patch is not applying on l2-mtd.git master. Care to rebase it? -- Ezequiel Garcia, VanguardiaSur www.vanguardiasur.com.ar -- To un

Re: [PATCH v3 2/4] mtd: pxa3xx_nand: add helpers to setup the timings

return -ENODEV; > > + if (!pdata->keep_config) { > + ret = pxa3xx_nand_init(host); > + if (ret) { > + dev_err(>pdev->dev, "Failed to init nand: %d\n", > + ret); > +

Re: [PATCH v3 2/4] mtd: pxa3xx_nand: add helpers to setup the timings

n_ident(mtd, 1, def)) > return -ENODEV; > > + if (!pdata->keep_config) { > + ret = pxa3xx_nand_init(host); > + if (ret) { > + dev_err(>pdev->dev, "Failed to init nand: %d\n", > +

Re: [PATCH v3 3/4] mtd: pxa3xx_nand: rework flash detection and timing setup

ntoine.ten...@free-electrons.com> > --- > drivers/mtd/nand/pxa3xx_nand.c | 118 > + > 1 file changed, 25 insertions(+), 93 deletions(-) > This patch is not applying on l2-mtd.git master. Care to rebase it? -- Ezequiel Garcia, Va

Re: [PATCH v3 0/4] mtd: pxa3xx_nand: rework the timing setup

Ccing Robert as he can provide valuable test on PXA boards. On 15 October 2015 at 04:17, Antoine Tenart wrote: > Hi all, > > Let's try one more time to get this merged. > > Another series, introducing the Berlin nand support, depends on this. > > This series was part of a bigger one[1], which

Re: [PATCH v3 0/4] mtd: pxa3xx_nand: rework the timing setup

Ccing Robert as he can provide valuable test on PXA boards. On 15 October 2015 at 04:17, Antoine Tenart wrote: > Hi all, > > Let's try one more time to get this merged. > > Another series, introducing the Berlin nand support, depends on this. > > This series

Re: [PATCH v7,3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes

On 6 October 2015 at 13:27, Harvey Hunt wrote: > From: Alex Smith > > Add device tree nodes for the NEMC and BCH to the JZ4780 device tree, > and make use of them in the Ci20 device tree to add a node for the > board's NAND. > > Note that since the pinctrl driver is not yet upstream, this

Re: [PATCH v7,3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes

On 6 October 2015 at 13:27, Harvey Hunt wrote: > From: Alex Smith > > Add device tree nodes for the NEMC and BCH to the JZ4780 device tree, > and make use of them in the Ci20 device tree to add a node for the > board's NAND. > > Note that since the

Re: Queueing b0a688ddcc50 "usb: musb: cppi41: allow it to work again" for -stable

On 2 October 2015 at 13:09, Felipe Balbi wrote: > On Fri, Oct 02, 2015 at 02:23:45AM -0300, Ezequiel Garcia wrote: >> Hello, >> >> Commit b0a688ddcc50 "usb: musb: cppi41: allow it to work again" seems >> to fix a regression. It applies cleanly on v4.1 and

Re: Queueing b0a688ddcc50 "usb: musb: cppi41: allow it to work again" for -stable

On 2 October 2015 at 13:09, Felipe Balbi <ba...@ti.com> wrote: > On Fri, Oct 02, 2015 at 02:23:45AM -0300, Ezequiel Garcia wrote: >> Hello, >> >> Commit b0a688ddcc50 "usb: musb: cppi41: allow it to work again" seems >> to fix a regression. It applies cl

Queueing b0a688ddcc50 "usb: musb: cppi41: allow it to work again" for -stable

Hello, Commit b0a688ddcc50 "usb: musb: cppi41: allow it to work again" seems to fix a regression. It applies cleanly on v4.1 and removes the "musb-hdrc musb-hdrc.1.auto: Need DT for the DMA engine." error. Any chance you can queue it for -stable? Thanks! -- Ezequiel García, VanguardiaSur

Queueing b0a688ddcc50 "usb: musb: cppi41: allow it to work again" for -stable

Hello, Commit b0a688ddcc50 "usb: musb: cppi41: allow it to work again" seems to fix a regression. It applies cleanly on v4.1 and removes the "musb-hdrc musb-hdrc.1.auto: Need DT for the DMA engine." error. Any chance you can queue it for -stable? Thanks! -- Ezequiel García, VanguardiaSur

Re: [PATCH v5 3/4] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

Brian, On 9 September 2015 at 11:24, Ezequiel Garcia wrote: > On 08 Sep 10:10 AM, Alex Smith wrote: >> Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as >> well as the hardware BCH controller. DMA is not currently implemented. >> >> While olde

Re: [PATCH v5 3/4] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

Brian, On 9 September 2015 at 11:24, Ezequiel Garcia <ezequ...@vanguardiasur.com.ar> wrote: > On 08 Sep 10:10 AM, Alex Smith wrote: >> Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as >> well as the hardware BCH controller. DMA is not currently implement

Re: [PATCH v5 3/4] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

JZ4780_NEMC_BANK_NAND); > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, i); > + chip->base = devm_ioremap_resource(dev, res); > + if (IS_ERR(chip->base)) { > + dev_err(dev, "failed to map

Re: [PATCH v5 3/4] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

urce(dev, res); > + if (IS_ERR(chip->base)) { > + dev_err(dev, "failed to map bank %u: %ld\n", > + chip->bank, PTR_ERR(chip->base)); You don't need to print anything on devm_ioremap_resource errors. The rest

Re: [PATCH 3/3] arm64: dts: mt8173: Add nor flash node

On 8 September 2015 at 08:53, Jagan Teki wrote: > On 8 September 2015 at 15:19, Bayi Cheng wrote: >> Add Mediatek nor flash node >> >> Signed-off-by: Bayi Cheng >> --- >> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 ++ >> 1 file changed, 10 insertions(+) >> >> diff --git

Re: [PATCH 3/3] arm64: dts: mt8173: Add nor flash node

On 8 September 2015 at 08:53, Jagan Teki wrote: > On 8 September 2015 at 15:19, Bayi Cheng wrote: >> Add Mediatek nor flash node >> >> Signed-off-by: Bayi Cheng >> --- >> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10

Re: [PATCH v4 2/3] dt-bindings: binding for jz4780-{nand,bch}

On 27 July 2015 at 10:50, Alex Smith wrote: > Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs, > as well as the hardware BCH controller, used by the jz4780_{nand,bch} > drivers. > > Signed-off-by: Alex Smith > Cc: Zubair Lutfullah Kakakhel > Cc: David Woodhouse > Cc:

Re: [PATCH v4 0/3] mtd: nand: jz4780: Add NAND and BCH drivers

On 7 September 2015 at 11:54, Alex Smith wrote: > On 06/09/2015 21:38, Ezequiel Garcia wrote: >> On 27 Jul 02:50 PM, Alex Smith wrote: >>> Hi, >>> >>> This series adds support for the BCH controller and NAND devices on >>> the Ingenic JZ4780 SoC. >&

Re: [PATCH v4 0/3] mtd: nand: jz4780: Add NAND and BCH drivers

On 7 September 2015 at 11:54, Alex Smith <alex.sm...@imgtec.com> wrote: > On 06/09/2015 21:38, Ezequiel Garcia wrote: >> On 27 Jul 02:50 PM, Alex Smith wrote: >>> Hi, >>> >>> This series adds support for the BCH controller and NAND devices on >>>

Re: [PATCH v4 2/3] dt-bindings: binding for jz4780-{nand,bch}

On 27 July 2015 at 10:50, Alex Smith wrote: > Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs, > as well as the hardware BCH controller, used by the jz4780_{nand,bch} > drivers. > > Signed-off-by: Alex Smith > Cc: Zubair

Re: [PATCH v4 3/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

0_nand_select_chip; > + chip->cmd_ctrl = jz4780_nand_cmd_ctrl; > + > + nand->busy_gpio = of_get_named_gpio_flags(dev->of_node, > + "rb-gpios", > + 0, ); > + if

Re: [PATCH v4 0/3] mtd: nand: jz4780: Add NAND and BCH drivers

ocumentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt > create mode 100644 drivers/mtd/nand/jz4780_bch.c > create mode 100644 drivers/mtd/nand/jz4780_bch.h > create mode 100644 drivers/mtd/nand/jz4780_nand.c > > -- > 2.4.6 > > > ___

Re: [PATCH v4 1/3] mtd: nand: increase ready wait timeout and report timeouts

come ready\n"); > +out: > led_trigger_event(nand_led_trigger, LED_OFF); > } This change looks reasonable, a timeout value should be large enough to be confident the operation has _really_ timed out. On non-error path, this change shouldn't make any difference. And the warn

Re: [PATCH v4 0/3] mtd: nand: jz4780: Add NAND and BCH drivers

ocumentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt > create mode 100644 drivers/mtd/nand/jz4780_bch.c > create mode 100644 drivers/mtd/nand/jz4780_bch.h > create mode 100644 drivers/mtd/nand/jz4780_nand.c > > -- > 2.4.6 > > > ___

Re: [PATCH v4 3/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

= jz4780_nand_select_chip; > + chip->cmd_ctrl = jz4780_nand_cmd_ctrl; > + > + nand->busy_gpio = of_get_named_gpio_flags(dev->of_node, > + "rb-gpios", > + 0, ); > + if (gpio_is_valid(nand->busy_gpio)) { > +

Re: [PATCH v4 1/3] mtd: nand: increase ready wait timeout and report timeouts

g(); > } while (time_before(jiffies, timeo)); > + > + pr_warn("timeout while waiting for chip to become ready\n"); > +out: > led_trigger_event(nand_led_trigger, LED_OFF); > } This change looks reasonable, a timeout value should be large enough to be confident t

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

On 5 September 2015 at 17:02, Robert Jarzmik wrote: > Ezequiel Garcia writes: > >> Robert, >> >> Just a couple of minor comments. >>> +dma_unmap_sg(info->dma_chan->device->dev, >>> + >sg, 1, info->dma_dir); >> &g

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

t; - } > - info->drcmr_dat = r->start; > - > - r = platform_get_resource(pdev, IORESOURCE_DMA, 1); > - if (r == NULL) { > - dev_err(>dev, > -

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

On 29 Aug 01:01 PM, Robert Jarzmik wrote: > Ezequiel Garcia writes: > > > Robert, > > > > On 24 Aug 08:41 PM, Robert Jarzmik wrote: > >> Now pxa architecture has a dmaengine driver, remove the access to direct > >> dma registers in favor of the more gene

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

On 29 Aug 01:01 PM, Robert Jarzmik wrote: > Ezequiel Garcia <ezequ...@vanguardiasur.com.ar> writes: > > > Robert, > > > > On 24 Aug 08:41 PM, Robert Jarzmik wrote: > >> Now pxa architecture has a dmaengine driver, remove the access to direct > >

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

goto fail_disable_clk; > - } > - info->drcmr_dat = r->start; > - > - r = platform_get_resource(pdev, IORESOURCE_DMA, 1); > - if (r == NULL) { > - dev_err(>de

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

On 5 September 2015 at 17:02, Robert Jarzmik <robert.jarz...@free.fr> wrote: > Ezequiel Garcia <ezequ...@vanguardiasur.com.ar> writes: > >> Robert, >> >> Just a couple of minor comments. >>> +dma_unmap_sg(info->dma_chan->device->dev, >&g

Re: [PATCH v2 0/4] mtd: pxa3xx_nand: rework the timing setup

On 17 July 2015 at 11:36, Ezequiel Garcia wrote: > Hi Antoine, > > On 07/17/2015 10:41 AM, Antoine Tenart wrote: >> >> Hi guys, >> >> On Tue, Jul 07, 2015 at 05:08:23PM +0200, Antoine Tenart wrote: >>> >>> >>> This series was part of a b

Re: [PATCH v2 0/4] mtd: pxa3xx_nand: rework the timing setup

On 17 July 2015 at 11:36, Ezequiel Garcia <ezequ...@vanguardiasur.com.ar> wrote: > Hi Antoine, > > On 07/17/2015 10:41 AM, Antoine Tenart wrote: >> >> Hi guys, >> >> On Tue, Jul 07, 2015 at 05:08:23PM +0200, Antoine Tenart wrote: >>> >>> >

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

ret = -ENXIO; > + goto fail_disable_clk; > } > + info->drcmr_dat = r->start; > + > + r = platform_get_resource(pdev, IORESOURCE_DMA, 1); > + if (r == NULL) { > + dev_err(>d

Re: [PATCH] mtd: nand: pxa3xx-nand: prevent DFI bus lockup on removal

Robert, On 24 August 2015 at 15:24, Robert Jarzmik wrote: > Ezequiel Garcia writes: > >> Should we worry about having two definitions for the same bit? >> Would it be too ugly to mix the two meaning? Something like this: >> >> /* This bit has two differe

Re: [PATCH] mtd: nand: pxa3xx-nand: prevent DFI bus lockup on removal

Robert, On 24 August 2015 at 15:24, Robert Jarzmik robert.jarz...@free.fr wrote: Ezequiel Garcia ezequ...@vanguardiasur.com.ar writes: Should we worry about having two definitions for the same bit? Would it be too ugly to mix the two meaning? Something like this: /* This bit has two

Re: [PATCH] mtd: nand: pxa3xx-nand: switch to dmaengine

/mailman/listinfo/linux-mtd/ -- Ezequiel Garcia, VanguardiaSur www.vanguardiasur.com.ar -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ

Re: CONFIG_DEBUG_SHIRQ and PM

On 26 August 2015 at 17:24, Felipe Balbi wrote: [..] >> >> static irqreturn_t tw68_irq(int irq, void *dev_id) >> { >> struct tw68_dev *dev = dev_id; >> u32 status, orig; >> int loop; >> >> status = orig = tw_readl(TW68_INTSTAT) & dev->pci_irqmask; > > Now try to

Re: CONFIG_DEBUG_SHIRQ and PM

On 26 August 2015 at 17:03, Felipe Balbi wrote: > On Wed, Aug 26, 2015 at 04:53:27PM -0300, Ezequiel Garcia wrote: >> On 26 August 2015 at 16:38, Felipe Balbi wrote: >> > Hi, >> > >> > On Wed, Aug 26, 2015 at 04:29:52PM -0300, Ezequiel Garcia wrote: >>

Re: CONFIG_DEBUG_SHIRQ and PM

On 26 August 2015 at 16:38, Felipe Balbi wrote: > Hi, > > On Wed, Aug 26, 2015 at 04:29:52PM -0300, Ezequiel Garcia wrote: >> Felipe, >> >> On 25 August 2015 at 16:58, Felipe Balbi wrote: >> > Hi Ingo, >> > >> > I'm facing an i

Re: CONFIG_DEBUG_SHIRQ and PM

Felipe, On 25 August 2015 at 16:58, Felipe Balbi wrote: > Hi Ingo, > > I'm facing an issue with CONFIG_DEBUG_SHIRQ and pm_runtime when using > devm_request_*irq(). > I may be jumping on the gun here, but I believe here's your problem. Using devm_request_irq with shared IRQs is not a good idea.

Re: CONFIG_DEBUG_SHIRQ and PM

On 26 August 2015 at 17:03, Felipe Balbi ba...@ti.com wrote: On Wed, Aug 26, 2015 at 04:53:27PM -0300, Ezequiel Garcia wrote: On 26 August 2015 at 16:38, Felipe Balbi ba...@ti.com wrote: Hi, On Wed, Aug 26, 2015 at 04:29:52PM -0300, Ezequiel Garcia wrote: Felipe, On 25 August 2015

Re: CONFIG_DEBUG_SHIRQ and PM

Felipe, On 25 August 2015 at 16:58, Felipe Balbi ba...@ti.com wrote: Hi Ingo, I'm facing an issue with CONFIG_DEBUG_SHIRQ and pm_runtime when using devm_request_*irq(). I may be jumping on the gun here, but I believe here's your problem. Using devm_request_irq with shared IRQs is not a good

Re: CONFIG_DEBUG_SHIRQ and PM

On 26 August 2015 at 16:38, Felipe Balbi ba...@ti.com wrote: Hi, On Wed, Aug 26, 2015 at 04:29:52PM -0300, Ezequiel Garcia wrote: Felipe, On 25 August 2015 at 16:58, Felipe Balbi ba...@ti.com wrote: Hi Ingo, I'm facing an issue with CONFIG_DEBUG_SHIRQ and pm_runtime when using

Re: CONFIG_DEBUG_SHIRQ and PM

On 26 August 2015 at 17:24, Felipe Balbi ba...@ti.com wrote: [..] static irqreturn_t tw68_irq(int irq, void *dev_id) { struct tw68_dev *dev = dev_id; u32 status, orig; int loop; status = orig = tw_readl(TW68_INTSTAT) dev-pci_irqmask; Now try to read that

Re: [PATCH] mtd: nand: pxa3xx-nand: prevent DFI bus lockup on removal

~NDCR_ND_ARB_EN) | NDCR_ARB_CNTL); > clk_disable_unprepare(info->clk); > > for (cs = 0; cs < pdata->num_cs; cs++) > -- > 2.1.4 > > > __ > Linux MTD discussion mailing list > http://lists.

Re: [PATCH 1/3] mtd: nand: pxa3xx_nand: add register access debug

On 23 August 2015 at 16:09, Robert Jarzmik wrote: > Robert Jarzmik writes: > >> Ezequiel Garcia writes: >> >>> On 11 Aug 09:57 PM, Robert Jarzmik wrote: >>>> Add verbose debug for register accesses. This enables easier debugging >>>> by foll

Re: [PATCH 1/3] mtd: nand: pxa3xx_nand: add register access debug

On 23 August 2015 at 16:09, Robert Jarzmik robert.jarz...@free.fr wrote: Robert Jarzmik robert.jarz...@free.fr writes: Ezequiel Garcia ezequ...@vanguardiasur.com.ar writes: On 11 Aug 09:57 PM, Robert Jarzmik wrote: Add verbose debug for register accesses. This enables easier debugging

Re: [PATCH] mtd: nand: pxa3xx-nand: prevent DFI bus lockup on removal

); clk_disable_unprepare(info-clk); for (cs = 0; cs pdata-num_cs; cs++) -- 2.1.4 __ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ Thanks! -- Ezequiel Garcia, VanguardiaSur

Re: [PATCH RESEND 2/2] mtd: nand: pxa3xx-nand: fix random command timeouts

On 19 August 2015 at 15:30, Robert Jarzmik wrote: > When 2 commands are submitted in a row, and the second is very quick, > the completion of the second command might never come. This happens > especially if the second command is quick, such as a status read after > an erase. > > The issue is

Re: [PATCH RESEND 0/2] mtd: nand: pxa3xx-nand: fixes

; > -- > Robert > > Robert Jarzmik (2): > mtd: nand: pxa3xx_nand: fix early spurious interrupt > mtd: nand: pxa3xx-nand: fix random command timeouts > For both patches: Acked-by: Ezequiel Garcia I tested this on Armada 370: Tested-by: Ezequiel Garcia -- Ezequiel García, Van

Re: [PATCH RESEND 0/2] mtd: nand: pxa3xx-nand: fixes

): mtd: nand: pxa3xx_nand: fix early spurious interrupt mtd: nand: pxa3xx-nand: fix random command timeouts For both patches: Acked-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar I tested this on Armada 370: Tested-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar -- Ezequiel García

Re: [PATCH RESEND 2/2] mtd: nand: pxa3xx-nand: fix random command timeouts

On 19 August 2015 at 15:30, Robert Jarzmik robert.jarz...@free.fr wrote: When 2 commands are submitted in a row, and the second is very quick, the completion of the second command might never come. This happens especially if the second command is quick, such as a status read after an erase.

Re: [PATCH 1/3] mtd: nand: pxa3xx_nand: add register access debug

"%s():%d nand_readl(%s): 0x%x\n", \ > + __func__, __LINE__, #off, _v); \ > + _v; \ > + }) > > /* error code and state */ > enum { > -- > 2.1.4 > > > ___

Re: [PATCH] mtd: nand: pxa3xx-nand: fix random command timeouts

On 16 August 2015 at 19:18, Robert Jarzmik wrote: > Ezequiel Garcia writes: > >> On 12 Aug 06:22 PM, Robert Jarzmik wrote: >> >> This fix looks correct. Thanks! >> >> Couple questions: >> >> 1. In which platform are you seeing this bug? >

Re: [PATCH 3/3] mtd: nand: pxa3xx-nand: fix readid without keep_config

On 16 August 2015 at 19:22, Robert Jarzmik wrote: > Ezequiel Garcia writes: > >> On 11 Aug 09:57 PM, Robert Jarzmik wrote: >>> The cases of READID detection are broken on pxa3xx. The reason is that >>> in the early stages of nand probing, ie. at pxa3xx_n

Re: [PATCH 1/3] mtd: nand: pxa3xx_nand: add register access debug

; \ + }) /* error code and state */ enum { -- 2.1.4 __ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Ezequiel Garcia, VanguardiaSur www.vanguardiasur.com.ar -- To unsubscribe from

Re: [PATCH 3/3] mtd: nand: pxa3xx-nand: fix readid without keep_config

On 16 August 2015 at 19:22, Robert Jarzmik robert.jarz...@free.fr wrote: Ezequiel Garcia ezequ...@vanguardiasur.com.ar writes: On 11 Aug 09:57 PM, Robert Jarzmik wrote: The cases of READID detection are broken on pxa3xx. The reason is that in the early stages of nand probing, ie

Re: [PATCH] mtd: nand: pxa3xx-nand: fix random command timeouts

On 16 August 2015 at 19:18, Robert Jarzmik robert.jarz...@free.fr wrote: Ezequiel Garcia ezequ...@vanguardiasur.com.ar writes: On 12 Aug 06:22 PM, Robert Jarzmik wrote: This fix looks correct. Thanks! Couple questions: 1. In which platform are you seeing this bug? zylonite with a pxa310

Re: [PATCH 3/3] mtd: nand: pxa3xx-nand: fix readid without keep_config

; if (pdata->keep_config && !pxa3xx_nand_detect_config(info)) > goto KEEP_CONFIG; > > -- > 2.1.4 > > > ______ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ --

Re: [PATCH] mtd: nand: pxa3xx-nand: fix random command timeouts

o->ndcb3); > } > > - /* clear NDSR to let the controller exit the IRQ */ > - nand_writel(info, NDSR, status); > if (is_completed) > complete(>cmd_complete); > if (is_ready) > -- > 2.1.4 > > > ___

Re: [PATCH] mtd: nand: pxa3xx-nand: fix random command timeouts

) -- 2.1.4 __ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Ezequiel Garcia, VanguardiaSur www.vanguardiasur.com.ar -- To unsubscribe from this list: send the line unsubscribe linux-kernel

Re: [PATCH 3/3] mtd: nand: pxa3xx-nand: fix readid without keep_config

__ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Ezequiel Garcia, VanguardiaSur www.vanguardiasur.com.ar -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More

Re: [PATCH v4 6/7] clocksource: Add Pistachio clocksource-only driver

Hi Daniel, Thanks for the review! On 4 August 2015 at 06:21, Daniel Lezcano wrote: > On 07/27/2015 04:02 PM, Govindraj Raja wrote: >> >> From: Ezequiel Garcia >> >> The Pistachio SoC provides four general purpose timers, and allow >> to implement a clocksou

Re: [PATCH v4 6/7] clocksource: Add Pistachio clocksource-only driver

Hi Daniel, Thanks for the review! On 4 August 2015 at 06:21, Daniel Lezcano daniel.lezc...@linaro.org wrote: On 07/27/2015 04:02 PM, Govindraj Raja wrote: From: Ezequiel Garcia ezequiel.gar...@imgtec.com The Pistachio SoC provides four general purpose timers, and allow to implement

Re: [PATCH v2 0/4] mtd: pxa3xx_nand: rework the timing setup

On 3 August 2015 at 01:44, Robert Jarzmik wrote: > Ezequiel Garcia writes: > >> Just tested linux-next (hence *without* the patchset) and I see >> the same "Wait time out". In other words, pxa3xx-nand is broken >> on PXA :/ >> >> Interestingly,

Re: [PATCH v2 0/4] mtd: pxa3xx_nand: rework the timing setup

On 3 August 2015 at 01:44, Robert Jarzmik robert.jarz...@free.fr wrote: Ezequiel Garcia ezequ...@vanguardiasur.com.ar writes: Just tested linux-next (hence *without* the patchset) and I see the same Wait time out. In other words, pxa3xx-nand is broken on PXA :/ Interestingly, the culprit

Re: [PATCH v2 0/4] mtd: pxa3xx_nand: rework the timing setup

On 20 July 2015 at 16:49, Robert Jarzmik wrote: > Ezequiel Garcia writes: > >> Here you go: >> >> http://git.infradead.org/users/ezequielg/linux/shortlog/refs/heads/pxa3xx-nand-timing-rework-v2 > > Okay, I've tested this on cm-x300. The result is not bright

Re: [PATCH v2 0/4] mtd: pxa3xx_nand: rework the timing setup

On 20 July 2015 at 16:49, Robert Jarzmik robert.jarz...@free.fr wrote: Ezequiel Garcia ezequ...@vanguardiasur.com.ar writes: Here you go: http://git.infradead.org/users/ezequielg/linux/shortlog/refs/heads/pxa3xx-nand-timing-rework-v2 Okay, I've tested this on cm-x300. The result

Re: [PATCH] mtd: gpio-addr-flash: add missing iounmap in probe/remove

Hi Alexey, On 25 July 2015 at 13:49, Alexey Khoroshilov wrote: > There is no iounmap(state->map.virt) in gpio_flash_remove() and > in gpio_flash_probe() error handling code. > Is there any reason why we can't just use managed variants? E.g. diff --git a/drivers/mtd/maps/gpio-addr-flash.c

Re: [PATCH] mtd: gpio-addr-flash: add missing iounmap in probe/remove

Hi Alexey, On 25 July 2015 at 13:49, Alexey Khoroshilov khoroshi...@ispras.ru wrote: There is no iounmap(state-map.virt) in gpio_flash_remove() and in gpio_flash_probe() error handling code. Is there any reason why we can't just use managed variants? E.g. diff --git

Re: [PATCH v5 07/12] mtd: nand: add Samsung K9GBG08U0A-M to nand_ids table

On 20 July 2015 at 15:08, Brian Norris wrote: > Hi Ezequiel, > > On Sun, May 24, 2015 at 03:42:11PM -0300, Ezequiel Garcia wrote: >> On 05/20/2015 11:43 AM, Antoine Tenart wrote: >> [..] >> >> >> >> I just had a look on the datasheet, and I you

Re: [PATCH v5 07/12] mtd: nand: add Samsung K9GBG08U0A-M to nand_ids table

On 20 July 2015 at 15:08, Brian Norris computersforpe...@gmail.com wrote: Hi Ezequiel, On Sun, May 24, 2015 at 03:42:11PM -0300, Ezequiel Garcia wrote: On 05/20/2015 11:43 AM, Antoine Tenart wrote: [..] I just had a look on the datasheet, and I you're right, the nand should support JDEC

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