Am Dienstag, 20. April 2021, 11:07:27 CEST schrieb Jianqun Xu:
> The mux route tables take many lines for each SoC, and it will be more
> instances for newly SoC, that makes the file size increase larger.
>
> This patch only do coding style for mux route struct, by adding a new
> definition and
Hi Jay,
Am Dienstag, 20. April 2021, 10:41:34 CEST schrieb jay...@rock-chips.com:
> Do I need to send v2 with change-id abandon ?
do everything to make a Maintainer's life easier :-) .
So I guess yes and of course try to make sure it applies to the
pinctrl devel branch
[
Hi,
Am Dienstag, 6. April 2021, 04:53:56 CEST schrieb Jianqun Xu:
> The mux route tables take many lines for each SoC, and it will be more
> instances for newly SoC, that makes the file size increase larger.
>
> This patch only do coding style for mux route struct, by adding a new
> definition
Hi Thierry,
Am Dienstag, 13. April 2021, 17:21:49 CEST schrieb Thierry Reding:
> On Mon, Apr 12, 2021 at 10:01:52PM +0200, Johan Jonker wrote:
> > Current dts files with 'pwm' nodes are manually verified.
> > In order to automate this process pwm-rockchip.txt
> > has to be converted to yaml.
> >
Am Montag, 12. April 2021, 14:13:37 CEST schrieb Andy Shevchenko:
> On Sun, Apr 11, 2021 at 4:35 PM Peter Geis wrote:
> >
> > Separate gpio driver from pinctrl driver, and support v2 controller.
> >
> > Tested on rk3566-quartz64 prototype board.
>
> Can you give a bit more context?
> Usually
Hi Johan,
Am Sonntag, 11. April 2021, 19:51:52 CEST schrieb Johan Jonker:
> Hi,
>
> When I check "rockchip,gpio-bank" with YAML it turns out that
> rk3288-veyron-XXX has 'gpio-line-names' as 'extra' property.
> It is not defined in the "rockchip,pinctrl.txt" document, but in
>
Am Samstag, 10. April 2021, 22:45:00 CEST schrieb Ezequiel Garcia:
> Add RK3568/RK3566 SoC support to pinctrl.
>
> Signed-off-by: Ezequiel Garcia
Reviewed-by: Heiko Stuebner
> ---
> Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt | 1 +
> 1 file changed, 1 insertion(+)
>
>
Hi Elaine again,
Am Freitag, 26. März 2021, 10:52:53 CET schrieb Heiko Stübner:
> Hi Elaine,
>
> [also adding that answer to the resend :-) ]
>
> Am Freitag, 26. März 2021, 10:17:39 CET schrieb Elaine Zhang:
> > Add the power domains names to the power domain info
Hi Elaine,
[also adding that answer to the resend :-) ]
Am Freitag, 26. März 2021, 10:17:39 CET schrieb Elaine Zhang:
> Add the power domains names to the power domain info struct so we
> have meaningful name for every power domain.
>
> Signed-off-by: Elaine Zhang
I like that approach very
Am Freitag, 26. März 2021, 10:18:03 CET schrieb Elaine Zhang:
> Convert the soc/rockchip/power_domain.txt binding document to
> json-schema and move to the power bindings directory.
>
> Signed-off-by: Enric Balletbo i Serra
> Signed-off-by: Elaine Zhang
If Enric is the original author of this
Hi Elaine,
Am Freitag, 26. März 2021, 10:17:39 CET schrieb Elaine Zhang:
> Add the power domains names to the power domain info struct so we
> have meaningful name for every power domain.
>
> Signed-off-by: Elaine Zhang
I like that approach very much, there is one tiny comment below.
> ---
>
Hi Greg, Felipe,
Am Dienstag, 9. Februar 2021, 20:23:44 CET schrieb Johan Jonker:
> For some of the dwc3-of-simple compatible SoCs we
> don't want to bind this driver to a dwc3 node,
> but bind that node to the 'snps,dwc3' driver instead.
> The kernel has no logic to decide which driver to bind
>
Am Montag, 15. Februar 2021, 15:33:19 CET schrieb Helen Koike:
> > From: Heiko Stuebner
> > diff --git a/drivers/gpu/drm/rockchip/Kconfig
> > b/drivers/gpu/drm/rockchip/Kconfig
> > index cb25c0e8fc9b..3094d4533ad6 100644
> > --- a/drivers/gpu/drm/rockchip/Kconfig
> > +++
Am Mittwoch, 24. März 2021, 11:32:42 CET schrieb Enric Balletbo i Serra:
>
> On 24/3/21 11:25, Enric Balletbo i Serra wrote:
> > Hi Elaine,
> >
> > On 24/3/21 11:18, elaine.zhang wrote:
> >> Hi, Enric
> >>
> >> 在 2021/3/24 下午5:56, Enric Balletbo i Serra 写道:
> >>> Hi Elaine,
> >>>
> >>> This is
Am Montag, 15. März 2021, 17:38:37 CET schrieb Geert Uytterhoeven:
> Hi Robin,
>
> On Mon, Mar 15, 2021 at 5:32 PM Robin Murphy wrote:
> > On 2021-03-13 13:22, CN_SZTL wrote:
> > > Robin Murphy 于2021年3月13日周六 下午7:55写道:
> > >>
> > >> On 2021-03-13 03:25, Tianling Shen wrote:
> > >>> +
Am Donnerstag, 25. Februar 2021, 13:55:34 CET schrieb Arnd Bergmann:
> From: Arnd Bergmann
>
> Building this file with clang leads to a an unreachable code path
> causing a warning from objtool:
>
> drivers/spi/spi-rockchip.o: warning: objtool:
> rockchip_spi_transfer_one()+0x2e0: sibling call
Hi Elaine,
Am Donnerstag, 25. Februar 2021, 03:59:32 CET schrieb elaine.zhang:
> 在 2021/2/23 下午6:22, Heiko Stübner 写道:
> > Am Dienstag, 23. Februar 2021, 10:53:51 CET schrieb Elaine Zhang:
> >> A55 supports each core to work at different frequencies, and each core
> >>
Hi Elaine,
Am Mittwoch, 24. Februar 2021, 07:35:30 CET schrieb elaine.zhang:
> Hi, Heiko:
>
> 在 2021/2/23 下午6:45, Heiko Stübner 写道:
> > Hi Elaine,
> >
> > Am Dienstag, 23. Februar 2021, 10:53:50 CET schrieb Elaine Zhang:
> >> Add the dt-bindings header for
Am Dienstag, 23. Februar 2021, 11:50:25 CET schrieb Johan Jonker:
> Hi Elaine,
>
> This is a new document.
> Could you convert rockchip,rk3568-cru.txt to yaml?
I'll definitly second that wish for a conversion to yaml.
Having the ability to check devicetrees for correctness is
quite helpful :-)
Hi Elaine,
Am Dienstag, 23. Februar 2021, 10:53:50 CET schrieb Elaine Zhang:
> Add the dt-bindings header for the rk3568, that gets shared between
> the clock controller and the clock references in the dts.
> Add softreset ID for rk3568.
>
> Signed-off-by: Elaine Zhang
> ---
>
Hi Elaine,
Am Dienstag, 23. Februar 2021, 10:53:51 CET schrieb Elaine Zhang:
> A55 supports each core to work at different frequencies, and each core
> has an independent divider control.
>
> Signed-off-by: Elaine Zhang
> ---
> drivers/clk/rockchip/clk-cpu.c | 25 +
>
Hi Sebastian,
Am Donnerstag, 11. Februar 2021, 06:25:15 CET schrieb Sebastian Fricke:
> Hey Heiko,
>
> On 10.02.2021 12:15, Heiko Stübner wrote:
> >Hi Sebastian,
> >
> >Am Freitag, 5. Februar 2021, 15:55:56 CET schrieb Heiko Stübner:
> >> Hi Sebastian,
>
Hi Sebastian,
Am Freitag, 5. Februar 2021, 15:55:56 CET schrieb Heiko Stübner:
> Hi Sebastian,
>
> I did some tests myself today as well and can confirm your
> hdmi related finding - at least when plugged in on boot.
>
> I tried some combinations of camera vs. hdmi and it s
Am Mittwoch, 10. Februar 2021, 12:10:14 CET schrieb Heiko Stuebner:
> The rk3399 has two ISPs and right now only the first one is usable.
> The second ISP is connected to the TXRX dphy on the soc.
>
> The phy of ISP1 is only accessible through the DSI controller's
> io-memory, so this series adds
Am Mittwoch, 10. Februar 2021, 11:34:41 CET schrieb Arnd Bergmann:
> On Wed, Feb 10, 2021 at 12:50 AM Heiko Stübner wrote:
> > Am Dienstag, 9. Februar 2021, 23:25:40 CET schrieb Arnd Bergmann:
> >
> > Hmm, right now I don't see the disadvantage of missing mmc numbers.
&
Am Dienstag, 9. Februar 2021, 23:25:40 CET schrieb Arnd Bergmann:
> On Mon, Jan 18, 2021 at 4:52 PM Johan Jonker wrote:
> >
> > Recently introduced async probe on mmc devices can shuffle block IDs.
> > Pin them to fixed values to ease booting in environments where UUIDs are
> > not practical. Use
drivers/clk/clk-gate.c
@@ -61,6 +61,9 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
set ^= enable;
+if (!enable)
+return;
+
if (gate->lock)
spin_lock_irqsave(gate->lock, flags);
else
Am Freitag, 5. Februar 2021, 09:15:47 CET
Hi Sebastian,
Am Freitag, 5. Februar 2021, 07:43:35 CET schrieb Sebastian Fricke:
> On 03.02.2021 20:54, Heiko Stübner wrote:
> >Am Mittwoch, 3. Februar 2021, 19:14:22 CET schrieb Sebastian Fricke:
> >> I have tested your patch set on my nanoPC-T4, here
Hi Sebastian,
Am Mittwoch, 3. Februar 2021, 19:14:22 CET schrieb Sebastian Fricke:
> Hey Heiko,
>
> I have tested your patch set on my nanoPC-T4, here is a complete log
> with:
> - relevant kernel log entries
> - system information
> - media ctl output
> - sysfs entry information
>
>
Am Mittwoch, 3. Februar 2021, 10:13:06 CET schrieb Jagan Teki:
> Usual I2C configured DSI bridge drivers have drm_bridge_add
> in probe and mipi_dsi_attach in bridge attach functions.
>
> With, this approach the drm pipeline is unable to find the
> dsi bridge in stm drm drivers since the
Am Montag, 25. Januar 2021, 20:13:24 CET schrieb Heiko Stuebner:
> From: Heiko Stuebner
>
> dwc2_hsotg_process_req_status uses ep_from_windex() to retrieve
> the endpoint for the index provided in the wIndex request param.
>
> In a test-case with a rndis gadget running and sending a malformed
>
Am Mittwoch, 27. Januar 2021, 09:50:34 CET schrieb Heiko Stuebner:
> From: Heiko Stuebner
>
> dwc2_hsotg_process_req_status uses ep_from_windex() to retrieve
> the endpoint for the index provided in the wIndex request param.
>
> In a test-case with a rndis gadget running and sending a malformed
Hi Guenter,
Am Dienstag, 26. Januar 2021, 05:55:59 CET schrieb Guenter Roeck:
> On 1/25/21 3:40 PM, Heiko Stuebner wrote:
> > Am Samstag, 23. Januar 2021, 18:34:01 CET schrieb Guenter Roeck:
> >> On Fri, Dec 18, 2020 at 01:05:27PM +0100, Johan Jonker wrote:
> >>> The watchdog compatible strings
Am Mittwoch, 6. Januar 2021, 14:46:14 CET schrieb Chen-Yu Tsai:
> From: Chen-Yu Tsai
>
> The Rockchip PCIe controller DT binding clearly states that 'ep-gpios' is
> an optional property. And indeed there are boards that don't require it.
>
> Make the driver follow the binding by using
Am Montag, 18. Januar 2021, 13:57:33 CET schrieb Heiko Stuebner:
> On Sun, 17 Jan 2021 16:09:51 +0100, Johan Jonker wrote:
> > A test with the command below gives for example this error:
> > /arch/arm/boot/dts/rk3288-tinker.dt.yaml:
> > thermal-zones: 'cpu_thermal', 'gpu_thermal',
Am Montag, 18. Januar 2021, 13:57:36 CET schrieb Heiko Stuebner:
> On Thu, 10 Dec 2020 08:21:30 +0800, Yifeng Zhao wrote:
> > Rockchp's NFC(Nand Flash Controller) has four versions: V600, V622, V800 and
> > V900.This series patch can support all four versions.
> >
> >
> > Changes in v16:
> > -
Am Dienstag, 12. Januar 2021, 16:37:09 CET schrieb Andy Shevchenko:
> We have currently three users of the PSEC_PER_SEC each of them defining it
> individually. Instead, move it to time64.h to be available for everyone.
>
> There is a new user coming with the same constant in use. It will also
>
Am Montag, 11. Januar 2021, 04:27:47 CET schrieb Chen-Yu Tsai:
> On Mon, Jan 11, 2021 at 4:06 AM Heiko Stübner wrote:
> >
> > Hi,
> >
> > Am Sonntag, 10. Januar 2021, 16:37:15 CET schrieb Chen-Yu Tsai:
> > > > > + vcc_sd: sdmmc-regulator {
> > &
Hi,
Am Sonntag, 10. Januar 2021, 16:37:15 CET schrieb Chen-Yu Tsai:
> > > + vcc_sd: sdmmc-regulator {
> > > + compatible = "regulator-fixed";
> > > + gpio = < RK_PD6 GPIO_ACTIVE_LOW>;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 =
Am Freitag, 18. Dezember 2020, 13:05:27 CET schrieb Johan Jonker:
> The watchdog compatible strings are suppose to be SoC orientated.
> In the more recently added Rockchip SoC dtsi files only
> the fallback string "snps,dw-wdt" is used, so add the following
> compatible strings:
>
>
Am Samstag, 19. Dezember 2020, 12:26:50 CET schrieb Johan Jonker:
> Add more rga compatible properties.
>
> "rockchip,px30-rga", "rockchip,rk3288-rga"
> "rockchip,rk3328-rga", "rockchip,rk3288-rga"
> "rockchip,rk3368-rga", "rockchip,rk3288-rga"
>
> make ARCH=arm64 dt_binding_check
>
Hi Demetris,
Am Freitag, 8. Januar 2021, 16:10:36 CET schrieb Demetris Ierokipides:
> Add extra 1.7GHz and 1.8GHz opp points to the MiQi device-tree to improve
> performance.
>
> Signed-off-by: Demetris Ierokipides
> ---
> arch/arm/boot/dts/rk3288-miqi.dts | 12
> 1 file changed,
Am Freitag, 8. Januar 2021, 11:48:26 CET schrieb Heiko Stübner:
> Am Freitag, 8. Januar 2021, 10:05:16 CET schrieb Paul Kocialkowski:
> > Hi Ezequiel,
> >
> > On Thu 07 Jan 21, 16:08, Ezequiel Garcia wrote:
> > > Happy to see this patch. It was on my TODO lis
Am Freitag, 8. Januar 2021, 10:05:16 CET schrieb Paul Kocialkowski:
> Hi Ezequiel,
>
> On Thu 07 Jan 21, 16:08, Ezequiel Garcia wrote:
> > Happy to see this patch. It was on my TODO list,
> > but I hadn't had time to bringup my rk3326 device.
>
> Same here, I just had an occasion to use it again
Hi Stephen,
Am Montag, 30. November 2020, 22:21:07 CET schrieb Stephen Rothwell:
> Hi all,
>
> Commit
>
> f166ed782080 ("arm64: defconfig: Enable RTC_DRV_HYM8563")
>
> is missing a Signed-off-by from its committer.
thanks for catching this.
I've addy the Signed-off-by and re-created the
Am Montag, 30. November 2020, 14:50:21 CET schrieb Heiko Stuebner:
> On Fri, 23 Oct 2020 23:48:13 +0530, Jagan Teki wrote:
> > RTC HYM8563 used in the ARM64 Rockchip SoC's SDIO power
> > sequence enablement.
> >
> > Enable it as module.
>
> Applied both patches, thanks!
I've also split the
Am Dienstag, 6. Oktober 2020, 11:51:58 CET schrieb Johan Jonker:
> Hi Katsuhiro, Heiko,
>
> Question for the maintainer:
> Should we add a SPDIF node if the connector is not physical on a board,
> only a header?
I think so ... the connector always is just like n-pins on a board,
only "sometimes"
Am Samstag, 24. Oktober 2020, 05:53:21 CET schrieb Jonathan Liu:
> Error message incorrectly refers to grf clock instead of vpll clock.
>
> Signed-off-by: Jonathan Liu
applied to drm-misc-next
Thanks
Heiko
Am Dienstag, 24. November 2020, 12:11:27 CET schrieb Tiezhu Yang:
> devm_ioremap_resource() will be not built in lib/devres.c if
> CONFIG_HAS_IOMEM is not set, and then there exists a build
> error about undefined reference to "devm_ioremap_resource"
> in the file phy-rockchip-inno-hdmi.c under
Am Mittwoch, 18. November 2020, 08:17:21 CET schrieb Chen-Yu Tsai:
> From: Chen-Yu Tsai
>
> The Rockchip PCIe controller DT binding clearly states that 'ep-gpios' is
> an optional property. And indeed there are boards that don't require it.
>
> Make the driver follow the binding by using
Am Donnerstag, 12. November 2020, 14:28:28 CET schrieb Lee Jones:
> On Thu, 12 Nov 2020, Heiko Stübner wrote:
>
> > Am Donnerstag, 12. November 2020, 14:22:24 CET schrieb Lee Jones:
> > > On Thu, 12 Nov 2020, Heiko Stübner wrote:
> > >
> > > > Am D
Am Donnerstag, 12. November 2020, 14:22:24 CET schrieb Lee Jones:
> On Thu, 12 Nov 2020, Heiko Stübner wrote:
>
> > Am Donnerstag, 12. November 2020, 11:33:44 CET schrieb Lee Jones:
> > > On Tue, 03 Nov 2020, Lee Jones wrote:
> > >
> > > > Fixe
Am Donnerstag, 12. November 2020, 11:33:44 CET schrieb Lee Jones:
> On Tue, 03 Nov 2020, Lee Jones wrote:
>
> > Fixes the following W=1 kernel build warning(s):
> >
> > drivers/soc/rockchip/io-domain.c:57: warning: Cannot understand *
> > @supplies: voltage settings matching the register
Am Mittwoch, 4. November 2020, 20:54:40 CET schrieb Jagan Teki:
> On Thu, Oct 22, 2020 at 12:27 AM Jagan Teki
> wrote:
> >
> > Hi Heiko,
> >
> > On Tue, Sep 29, 2020 at 2:02 PM Jagan Teki
> > wrote:
> > >
> > > PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
> > >
> > >
Am Mittwoch, 4. November 2020, 16:42:01 CET schrieb Doug Anderson:
> Hi,
>
> On Wed, Nov 4, 2020 at 2:51 AM Heiko Stübner wrote:
> >
> > Hi Markus,
> >
> > Am Mittwoch, 4. November 2020, 10:49:45 CET schrieb Markus Reichl:
> > > Recently introduced as
Hi Markus,
Am Mittwoch, 4. November 2020, 10:49:45 CET schrieb Markus Reichl:
> Recently introduced async probe on mmc devices can shuffle block IDs.
> Pin them to fixed values to ease booting in evironments where UUIDs
> are not practical. Use newly introduced aliases for mmcblk devices from
Hi,
Am Freitag, 2. Oktober 2020, 18:11:28 CEST schrieb Krzysztof Kozlowski:
> On Thu, Sep 17, 2020 at 08:52:10PM +0200, Krzysztof Kozlowski wrote:
> > GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
> > These are simple defines so they could be used in DTS but they will not
Hi Jianqun,
Am Dienstag, 13. Oktober 2020, 08:37:28 CEST schrieb Jianqun Xu:
> These patches are required by GKI.
>
> Jianqun Xu (3):
> pinctrl: rockchip: make driver be tristate module
> pinctrl: rockchip: enable gpio pclk for rockchip_gpio_to_irq
> pinctrl: rockchip: create irq mapping
Am Dienstag, 6. Oktober 2020, 18:05:14 CEST schrieb Ulf Hansson:
> The avs drivers are all SoC specific drivers that doesn't share any code.
> Instead they are located in a directory, mostly to keep similar
> functionality together. From a maintenance point of view, it makes better
> sense to
Am Donnerstag, 24. September 2020, 02:44:41 CEST schrieb Stephen Boyd:
> We can get down to this return value from ERR_CAST() without
> initializing hw. Set it to -ENOMEM so that we always return something
> sane.
>
> Fixes the following smatch warning:
>
>
Am Mittwoch, 23. September 2020, 13:05:26 CEST schrieb Robin Murphy:
> On 2020-09-23 07:59, Jian-Hong Pan wrote:
> > The cdn-dp sub driver probes the device failed on PINEBOOK Pro.
> >
> > kernel: cdn-dp fec0.dp: [drm:cdn_dp_probe [rockchipdrm]] *ERROR*
> > missing extcon or phy
> > kernel:
Hi Artem,
Am Mittwoch, 23. September 2020, 12:12:25 CEST schrieb Artem Lapkin:
> From: Artem Lapkin
>
> add missed ir receivier to Khadas Edge board
> Khadas Edge uses gpio-ir-receiver on RK_PB6 gpio
Missing Signed-off-by
> ---
> .../boot/dts/rockchip/rk3399-khadas-edge.dtsi| 16
Hi Artem,
please make the subject something like
"arm64: dts: rockchip: add spiflash node to rk3399-khadas-edge"
Am Mittwoch, 23. September 2020, 12:12:24 CEST schrieb Artem Lapkin:
> From: Artem Lapkin
>
> The Khadas Edge Boards uses winbond - w25q128 spi flash with 104Mhz
Missing
Hi,
Am Mittwoch, 23. September 2020, 08:59:00 CEST schrieb Jian-Hong Pan:
> The cdn-dp sub driver probes the device failed on PINEBOOK Pro.
>
> kernel: cdn-dp fec0.dp: [drm:cdn_dp_probe [rockchipdrm]] *ERROR* missing
> extcon or phy
> kernel: cdn-dp: probe of fec0.dp failed with error
Am Mittwoch, 2. September 2020, 17:06:41 CEST schrieb Krzysztof Kozlowski:
> Common pattern of handling deferred probe can be simplified with
> dev_err_probe(). Less code and the error value gets printed.
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Heiko Stuebner
Am Mittwoch, 16. September 2020, 18:17:40 CEST schrieb Krzysztof Kozlowski:
> The parent names 'mux_timer_src_p' is not used:
>
> In file included from drivers/clk/rockchip/clk-rk3308.c:13:0:
> drivers/clk/rockchip/clk-rk3308.c:136:7: warning: ‘mux_timer_src_p’ defined
> but not used
Am Dienstag, 22. September 2020, 00:56:18 CEST schrieb Tomasz Figa:
> Fix an implicit declaration of usleep_range():
>
> drivers/phy/rockchip/phy-rockchip-dphy-rx0.c: In function 'rk_dphy_enable':
> drivers/phy/rockchip/phy-rockchip-dphy-rx0.c:203:2: error: implicit
> declaration of function
Am Dienstag, 8. September 2020, 04:19:13 CEST schrieb Jianqun Xu:
> Register both gpio driver and device as part of driver model, so that
> the '-gpio'/'-gpios' dependency in dts can be correctly handled by
> of_devlink/of_fwlink.
>
> Signed-off-by: Jianqun Xu
Reviewed-by: Heiko Stuebner
>
Hi Jay,
Am Montag, 21. September 2020, 00:14:11 CEST schrieb Heiko Stübner:
> Am Montag, 14. September 2020, 02:38:47 CEST schrieb Jianqun Xu:
> > Make pinctrl-rockchip driver to be tristate module, support to build as
> > a module, this is useful for GKI.
> >
> >
Am Montag, 14. September 2020, 02:38:47 CEST schrieb Jianqun Xu:
> Make pinctrl-rockchip driver to be tristate module, support to build as
> a module, this is useful for GKI.
>
> Signed-off-by: Jianqun Xu
Reviewed-by: Heiko Stuebner
> ---
> drivers/pinctrl/Kconfig| 2 +-
>
Hi Linus,
Am Samstag, 12. September 2020, 13:27:44 CEST schrieb Linus Walleij:
> Jianqun, Heiko,
>
> On Fri, Jan 17, 2020 at 9:14 AM Jianqun Xu wrote:
>
> > Do codingstyle for pinctrl-rockchip by spliting driver by SoC types.
> >
> > Convenienty for reviewing, the first patch only moving
> >
Hi,
Am Montag, 7. September 2020, 04:59:24 CEST schrieb Jianqun Xu:
> Make pinctrl-rockchip driver to be tristate module, support to build as
> a module, this is useful for GKI.
>
> Signed-off-by: Jianqun Xu
> ---
> drivers/pinctrl/Kconfig| 2 +-
>
Am Freitag, 4. September 2020, 09:45:05 CEST schrieb Elaine Zhang:
> support CLK_OF_DECLARE and builtin_platform_driver_probe
> double clk init method.
> add module author, description and license to support building
> Soc Rk3399 clock driver as module.
>
> Signed-off-by: Elaine Zhang
>
Am Freitag, 4. September 2020, 09:44:00 CEST schrieb Elaine Zhang:
> clk_hw_register_composite it's already exported.
> Preparation for compilation of rK common clock drivers into modules.
>
> Signed-off-by: Elaine Zhang
> Reported-by: kernel test robot
> Reviewed-by: Kever Yang
Reviewed-by:
Am Freitag, 4. September 2020, 09:44:03 CEST schrieb Elaine Zhang:
> This is used by the Rockchip clk driver, export it to allow that
> driver to be compiled as a module.
>
> Signed-off-by: Elaine Zhang
> Reviewed-by: Kever Yang
> ---
> drivers/clk/rockchip/clk.c | 52
Hi Elaine,
Am Freitag, 4. September 2020, 09:44:48 CEST schrieb Elaine Zhang:
> use CONFIG_COMMON_CLK_ROCKCHIP for Rk common clk drivers.
> use CONFIG_CLK_RKXX for Rk soc clk driver.
> Mark configuration to "tristate",
> to support building Rk SoCs clock driver as module.
>
> Signed-off-by:
Am Freitag, 4. September 2020, 09:44:02 CEST schrieb Elaine Zhang:
> This is used by the Rockchip clk driver, export it to allow that
> driver to be compiled as a module..
>
> Signed-off-by: Elaine Zhang
> Reviewed-by: Kever Yang
> ---
> drivers/clk/rockchip/softrst.c | 7 ---
> 1 file
Am Freitag, 4. September 2020, 09:44:01 CEST schrieb Elaine Zhang:
> This is used by the Rockchip clk driver, export it to allow that
> driver to be compiled as a module..
>
> Signed-off-by: Elaine Zhang
> Reviewed-by: Kever Yang
> ---
> drivers/clk/rockchip/clk-ddr.c | 1 +
> 1 file changed,
Hi Jianqun,
Am Montag, 31. August 2020, 10:50:21 CEST schrieb Jianqun Xu:
> Register both gpio driver and device as part of driver model, so that
> the '-gpio'/'-gpios' dependency in dts can be correctly handled by
> of_devlink/of_fwlink.
>
> Signed-off-by: Jianqun Xu
[...]
> -static int
Am Sonntag, 6. September 2020, 00:01:55 CEST schrieb Heiko Stübner:
> Am Montag, 31. August 2020, 10:47:48 CEST schrieb Jianqun Xu:
> > Make pinctrl-rockchip driver to be tristate module, support to build as
> > a module, this is useful for GKI.
> >
> > Signed-off-by
Hi,
Am Montag, 31. August 2020, 10:50:10 CEST schrieb Jianqun Xu:
> Add valid check for gpio bank.
Please add more description on where this happened.
> Change-Id: Ia4609c3045b5df7879beab3c15d791ff54a1f49b
Please drop the change-id.
> Signed-off-by: Jianqun Xu
> ---
>
Am Montag, 31. August 2020, 10:47:51 CEST schrieb Jianqun Xu:
> Add valid check for gpio bank.
As this obviously fixes a problem you encountered please elaborate a bit more.
Just so that people reading the log later understand when this issue surfaced.
Also - maybe even more important - why is
Am Montag, 31. August 2020, 10:47:50 CEST schrieb Jianqun Xu:
> Remove totally irq mappings create in probe, the gpio irq mapping will
> be created when do
> gpio_to_irq ->
> rockchip_gpio_to_irq ->
> irq_create_mapping
>
> This patch can speed up system boot on, also
Am Montag, 31. August 2020, 10:47:48 CEST schrieb Jianqun Xu:
> Make pinctrl-rockchip driver to be tristate module, support to build as
> a module, this is useful for GKI.
>
> Signed-off-by: Jianqun Xu
Reviewed-by: Heiko Stuebner
> ---
> drivers/pinctrl/Kconfig| 2 +-
>
Am Montag, 31. August 2020, 10:47:49 CEST schrieb Jianqun Xu:
> There need to enable pclk_gpio when do irq_create_mapping, since it will
> do access to gpio controller.
>
> Signed-off-by: Jianqun Xu
Reviewed-by: Heiko Stuebner
> ---
> drivers/pinctrl/pinctrl-rockchip.c | 2 ++
> 1 file
them in
[PATCH] pinctrl: rockchip: depend on OF [0]
Heiko
[0] http://lore.kernel.org/r/20200905214955.907950-1-he...@sntech.de
>
> #
> https://github.com/0day-ci/linux/commit/38fa905767d010bbbc1035b48494d4a83bb72410
> git remote add linux-review https://github.com/0day-ci/linux
> git fetch --no-tags linux-review
&
Hi Jagan,
Am Freitag, 4. September 2020, 21:18:27 CEST schrieb Jagan Teki:
> USB Type-C protocol supports various modes of operations
> includes PD, USB3, and Altmode. If the platform design
> supports a Type-C connector then configuring these modes
> can be done via enumeration.
>
> However,
Am Freitag, 4. September 2020, 19:04:16 CEST schrieb Alex Dewar:
> There seems no reason to allow for compile-testing on ARM only, so
> remove this restriction.
>
> Build-tested with allyesconfig on x86.
>
> Signed-off-by: Alex Dewar
Reviewed-by: Heiko Stuebner
> ---
>
Am Donnerstag, 23. Juli 2020, 08:34:12 CEST schrieb Jagan Teki:
> Hi Heiko,
>
> On Thu, Jul 23, 2020 at 4:43 AM Heiko Stuebner wrote:
> >
> > Hi Jagan,
> >
> > Am Mittwoch, 22. Juli 2020, 21:09:46 CEST schrieb Jagan Teki:
> > > Add dt-bindings for ROCKPi 4B which is similar to 4A with
> > >
Am Dienstag, 7. Juli 2020, 13:25:26 CEST schrieb Sandy Huang:
> don't mask possible_crtcs if remote-point is disabled.
>
> Signed-off-by: Sandy Huang
Reviewed-by: Heiko Stuebner
changes in v2:
- drop additional of_node_put, as ep will be put with the next
iteration of
Hi,
Am Mittwoch, 22. Juli 2020, 16:31:37 CEST schrieb Alex Bee:
> Since the loopbacktest clock is not exported and is not touched in the
> driver, it needs the CLK_IGNORE_UNUSED flag in order to get the emac
> working.
could you please add it to the rk3188_critical_clocks array instead.
Hi Jon,
Am Mittwoch, 22. Juli 2020, 08:52:57 CEST schrieb Jon Lin:
> The RXFLR is possible larger than rx_left in Rockchip SPI, fix it.
>
> Signed-off-by: Jon Lin
> ---
> drivers/spi/spi-rockchip.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
Am Freitag, 17. Juli 2020, 18:11:58 CEST schrieb Dejin Zheng:
> Use devm_platform_request_irq() to simplify code, and it contains
> platform_get_irq() and devm_request_irq().
>
> Cc: Michal Simek
> Cc: Wolfram Sang
> Signed-off-by: Dejin Zheng
> Acked-by: Linus Walleij
> Acked-by: Michal
Am Freitag, 17. Juli 2020, 18:55:38 CEST schrieb Lee Jones:
> This is the only use of kerneldoc in the source file and no
> descriptions are provided.
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/iio/adc/rockchip_saradc.c:190: warning: Function parameter or member
> 'reset'
Am Dienstag, 7. Juli 2020, 13:25:26 CEST schrieb Sandy Huang:
> don't mask possible_crtcs if remote-point is disabled.
>
> Signed-off-by: Sandy Huang
Reviewed-by: Heiko Stuebner
I guess this could've benefitted from a "changelog":
changes in v2:
- drop additional of_node_put, as ep will be
Hi Sandy,
Am Montag, 6. Juli 2020, 09:59:44 CEST schrieb Sandy Huang:
> don't mask possible_crtcs if remote-point is disabled.
>
> Signed-off-by: Sandy Huang
> ---
> drivers/gpu/drm/drm_of.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_of.c
Hi Adrian,
Am Dienstag, 9. Juni 2020, 19:49:48 CEST schrieb Adrian Ratiu:
> [Re-submitting to cc dri-devel, sorry about the noise]
>
> Hello all,
>
> v9 cleanly applies on top of latest next-20200609 tree.
at least it doesn't apply on top of current drm-misc-next for me
which I really don't
Am Montag, 22. Juni 2020, 17:07:52 CEST schrieb Marc Zyngier:
> Hi Heiko,
>
> On 2020-06-22 14:54, Heiko Stübner wrote:
> > Hi Marc,
> >
> > Am Montag, 22. Juni 2020, 15:31:55 CEST schrieb Marc Zyngier:
> >> On Sat, 13 Jun 2020 11:24:35 +0100
> >&
Hi Marc,
Am Montag, 22. Juni 2020, 15:31:55 CEST schrieb Marc Zyngier:
> On Sat, 13 Jun 2020 11:24:35 +0100
> Marc Zyngier wrote:
>
> > Booting a recent kernel on a rk3399-based system (nanopc-t4),
> > equipped with a recent u-boot and ATF results in the following:
> >
> > [5.607431]
Am Donnerstag, 18. Juni 2020, 18:40:15 CEST schrieb Russell King - ARM Linux
admin:
> On Thu, Jun 18, 2020 at 06:01:29PM +0200, Heiko Stübner wrote:
> > Am Donnerstag, 18. Juni 2020, 17:47:48 CEST schrieb Russell King - ARM
> > Linux admin:
> > > On Thu, Jun 18, 2020 at
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