On 2016/3/2 5:36, Arthur Marsh wrote:
>
>
> Arthur Marsh wrote on 02/03/16 03:57:
>>
>>
>> Christoph Hellwig wrote on 01/03/16 17:22:
>>> Hi Jiang.
>>>
>>> I'd love to see this patch in and abuse of the old PCI API gone.
>>>
>>> Did you resolve the problems Arthur saw with the previous iteratons
t also
provides headroom for PCI hotplug with eata driver.
It also represents non-PCI eata devices as platform devices, so it could
be managed as normal devices.
Signed-off-by: Jiang Liu
Cc: Hannes Reinecke
Cc: Ballabio, Dario
Cc: Christoph Hellwig
---
drivers/scs
On 2015/12/24 13:15, Jeremiah Mahler wrote:
> Jiang,
>
> On Wed, Dec 23, 2015 at 10:13:26PM +0800, Jiang Liu wrote:
>> Function __assign_irq_vector() makes use of apic_chip_data.old_domain
>> as a temporary buffer, which causes trouble to rollback logic in case of
>>
Enhance __assign_irq_vector() to rollback in case of failure so the
caller doesn't need to explicitly rollback.
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/arch/x86/kernel
patch also helps to get rid of that atomic allocation in
__send_cleanup_vector().
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 76 ++---
1 file changed, 34 insertions(+), 42 deletions(-)
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/k
memory.
So use vector_lock to guard all memory free code in x86_vector_free_irqs().
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
in
Function __assign_irq_vector() makes use of apic_chip_data.old_domain
as a temporary buffer, which causes trouble to rollback logic in case of
failure. So use a dedicated temporary buffer for __assign_irq_vector().
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c |9 +
1
Trivial cleanups for x86 vector allocation code:
1) reorganize apic_chip_data to optimize for size and cache efficiency
2) avoid redundant calling of irq_to_desc()
3) refine code comments
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 54
On 2015/12/18 7:59, Guenter Roeck wrote:
> Hi folks,
>
> several of my qemu tests of linux-next started failing a couple of days
> ago.
> Logs are available at http://server.roeck-us.net:8010/builders, in the
> 'next' column.
>
> Bisect points to 'x86/irq: Enhance __assign_irq_vector() to rollbac
ata1.00: status: { DRDY }
> [ 63.902649] ata1: soft resetting link
> [ 64.062580] ata1.01: NODEV after polling detection
> [ 64.073800] ata1.00: configured for MWDMA1
> [ 64.076813] ata1.00: device reported invalid CHS sector 0
> [ 64.096188] ata1: EH complete
>
>From c7c3cc3a048576fd1
Hi Ying,
Thanks for reporting this issue. But I couldn't figure
out what's wrong with this commit. And there's no error or
warning messages in the attached dmesg file. Are there other
systems reporting the same issue?
Thanks,
Gerry
On 2015/12/11 15:49, kernel test robot wrote:
> FYI, we no
Commit-ID: 27dd9e6098141a9ebaafe48d50277fcae6e09775
Gitweb: http://git.kernel.org/tip/27dd9e6098141a9ebaafe48d50277fcae6e09775
Author: Jiang Liu
AuthorDate: Mon, 30 Nov 2015 16:09:30 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 10 Dec 2015 19:39:57 +0100
x86/irq: Trivial cleanups
Commit-ID: 6dd7cb991fcbfef55d8bf3d22b8a87f9d5007e20
Gitweb: http://git.kernel.org/tip/6dd7cb991fcbfef55d8bf3d22b8a87f9d5007e20
Author: Jiang Liu
AuthorDate: Mon, 30 Nov 2015 16:09:26 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 10 Dec 2015 19:32:07 +0100
x86/irq: Do not reuse
Commit-ID: 41c7518a5d14543fa4aa1b5b9994ac26b38c0406
Gitweb: http://git.kernel.org/tip/41c7518a5d14543fa4aa1b5b9994ac26b38c0406
Author: Jiang Liu
AuthorDate: Mon, 30 Nov 2015 16:09:29 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 10 Dec 2015 19:32:07 +0100
x86/irq: Fix a race
Commit-ID: 21a1b3bf35018b446c943c15f0a6225e6f6497ae
Gitweb: http://git.kernel.org/tip/21a1b3bf35018b446c943c15f0a6225e6f6497ae
Author: Jiang Liu
AuthorDate: Mon, 30 Nov 2015 16:09:28 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 10 Dec 2015 19:32:07 +0100
x86/irq: Fix a race
Commit-ID: 4c24cee6b2aeaee3dab896f76fef4fe79d9e4183
Gitweb: http://git.kernel.org/tip/4c24cee6b2aeaee3dab896f76fef4fe79d9e4183
Author: Jiang Liu
AuthorDate: Mon, 30 Nov 2015 16:09:27 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 10 Dec 2015 19:32:07 +0100
x86/irq: Enhance
On 2015/11/3 5:33, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by: Jake Oshins
> ---
> arch/x86/in
On 2015/11/3 5:33, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch introduces a new driver which exposes a root PCI bus whenever a PCI
> Express device is passed through to a guest VM under Hyper-V. The device can
> be single- or multi-function. The interrupts for the devices are ma
patch also helps to get rid of that atomic allocation in
__send_cleanup_vector().
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 77 ++---
1 file changed, 34 insertions(+), 43 deletions(-)
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/k
Enhance __assign_irq_vector() to rollback in case of failure so the
caller doesn't need to explicitly rollback.
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/arch/x86/kernel
memory.
So use vector_lock to guard all memory free code in x86_vector_free_irqs().
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
in
Trivial cleanups for x86 vector allocation code:
1) reorganize apic_chip_data to optimize for size and cache efficiency
2) avoid redundant calling of irq_to_desc()
3) refine code comments
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c | 54
Function __assign_irq_vector() makes use of apic_chip_data.old_domain
as a temporary buffer, which causes trouble to rollback logic in case of
failure. So use a dedicated temporary buffer for __assign_irq_vector().
Signed-off-by: Jiang Liu
---
arch/x86/kernel/apic/vector.c |9 +
1
On 2015/11/28 0:06, Rafael J. Wysocki wrote:
> On Friday, November 27, 2015 11:12:33 AM Jiang Liu wrote:
>> From: Liu Jiang
>>
>> Commit 4d6b4e69a245 ("x86/PCI/ACPI: Use common interface to support
>> PCI host bridge") converted x86 to use the common inter
On 2015/11/26 5:12, Thomas Gleixner wrote:
> On Wed, 25 Nov 2015, Thomas Gleixner wrote:
>> So if CPU1 gets the IPI _BEFORE_ move_in_progress is set to 0, and
>> does not get another IPI before the next move . That has been that
>> way forever.
>>
>> Duh. Working on a real fix this time.
>
>
m_resource/ioport_resource.
Fixes: 4d6b4e69a245 ("x86/PCI/ACPI: Use common interface to support PCI host
bridge")
Signed-off-by: Jiang Liu
Reported-and-tested-by: Arthur Marsh
Cc: Keith Busch
Cc: Arthur Marsh
Cc: Hans de Bruin
---
arch/x86/pci/bus_numa.c | 13 ++---
dri
for me until:
>
> 4d6b4e69a245e9df4b84dba387596086cb66887d is the first bad commit
> commit 4d6b4e69a245e9df4b84dba387596086cb66887d
> Author: Jiang Liu
> Date: Wed Oct 14 14:29:41 2015 +0800
>
> x86/PCI/ACPI: Use common interface to support PCI host bridge
>
>
On 2015/11/25 6:19, Rafael J. Wysocki wrote:
> On Tue, Nov 24, 2015 at 5:49 PM, Bjorn Helgaas wrote:
>> On Mon, Nov 16, 2015 at 12:27:37PM +0800, Jiang Liu wrote:
>>> From: Liu Jiang
>>>
>>> Commit 4d6b4e69a245 ("x86/PCI/ACPI: Use common interface to su
m_resource/ioport_resource.
Signed-off-by: Jiang Liu
Reported-and-tested-by: Arthur Marsh
Cc: Keith Busch
Cc: Arthur Marsh
---
arch/x86/pci/bus_numa.c | 16 +++-
drivers/acpi/pci_root.c |7 +++
2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/x86/pci/
On 2015/11/14 1:03, Lorenzo Pieralisi wrote:
> Please trim your emails, thanks.
>
> On Fri, Nov 13, 2015 at 01:57:30PM +0100, Tomasz Nowicki wrote:
>> On 12.11.2015 16:05, Jiang Liu wrote:
>
> [...]
>
>>>>> IA64 actually ignores the tra
On 2015/11/12 22:45, Tomasz Nowicki wrote:
> On 12.11.2015 15:04, Jiang Liu wrote:
>> On 2015/11/12 21:21, Tomasz Nowicki wrote:
>>> On 12.11.2015 09:43, Jiang Liu wrote:
>>>> On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
>>>>> On Tue, Nov
On 2015/11/12 21:21, Tomasz Nowicki wrote:
> On 12.11.2015 09:43, Jiang Liu wrote:
>> On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
>>> On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
>>>
>>> [...]
>>>
>>>>>> In particular,
On 2015/11/12 1:46, Lorenzo Pieralisi wrote:
> On Tue, Nov 10, 2015 at 01:50:46PM +0800, Jiang Liu wrote:
>
> [...]
>
>>>> In particular, I would like to understand, for an eg DWordIO descriptor,
>>>> what Range Minimum, Range Maximum and Translation Of
On 2015/11/10 4:09, Arnd Bergmann wrote:
> On Monday 09 November 2015 17:10:43 Lorenzo Pieralisi wrote:
>> On Mon, Nov 09, 2015 at 03:07:38PM +0100, Tomasz Nowicki wrote:
>>> On 06.11.2015 14:22, Jiang Liu wrote:
>>>> On 2015/11/6 20:40, Tomasz Nowicki wrote:
>&g
On 2015/11/9 13:45, Sinan Kaya wrote:
>
>
> On 11/9/2015 12:24 AM, Jiang Liu wrote:
>>> +u32 possible[ACPI_PCI_LINK_MAX_POSSIBLE];
>>> > u8 initialized:1;
>>> > u8 reserved:7;
>>> > };
>> Hi Sinan,
>> This da
ba387596086cb66887d is the first bad commit
> commit 4d6b4e69a245e9df4b84dba387596086cb66887d
> Author: Jiang Liu
> Date: Wed Oct 14 14:29:41 2015 +0800
>
> x86/PCI/ACPI: Use common interface to support PCI host bridge
>
> Use common interface to simplify ACPI PC
On 2015/11/9 0:07, Sinan Kaya wrote:
> The ACPI compiler uses the extended format when
> used interrupt numbers are greater than 256.
> The PCI link code currently only supports simple
> interrupt format. The IRQ numbers are represented
> using 32 bits when extended IRQ syntax. This patch
> changes
ba387596086cb66887d is the first bad commit
> commit 4d6b4e69a245e9df4b84dba387596086cb66887d
> Author: Jiang Liu
> Date: Wed Oct 14 14:29:41 2015 +0800
>
> x86/PCI/ACPI: Use common interface to support PCI host bridge
>
> Use common interface to simplify ACPI PC
On 2015/11/6 23:32, Jiang Liu wrote:
> On 2015/11/6 22:45, Lorenzo Pieralisi wrote:
>> On Fri, Nov 06, 2015 at 09:22:46PM +0800, Jiang Liu wrote:
>>> On 2015/11/6 20:40, Tomasz Nowicki wrote:
>>>> On 06.11.2015 12:46, Jiang Liu wrote:
>>>>> On 201
On 2015/11/6 22:45, Lorenzo Pieralisi wrote:
> On Fri, Nov 06, 2015 at 09:22:46PM +0800, Jiang Liu wrote:
>> On 2015/11/6 20:40, Tomasz Nowicki wrote:
>>> On 06.11.2015 12:46, Jiang Liu wrote:
>>>> On 2015/11/6 18:37, Tomasz Nowicki wrote:
>>>>> On
On 2015/11/6 20:40, Tomasz Nowicki wrote:
> On 06.11.2015 12:46, Jiang Liu wrote:
>> On 2015/11/6 18:37, Tomasz Nowicki wrote:
>>> On 06.11.2015 09:52, Jiang Liu wrote:
>>> Sure, ARM64 (0-16M IO space) QEMU example:
>>> DWordIO (ResourceProducer, MinFix
On 2015/11/6 18:37, Tomasz Nowicki wrote:
> On 06.11.2015 09:52, Jiang Liu wrote:
>> On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
>>> On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
>>>> On 14.10.2015 08:29, Jiang Liu wrote:
>&g
On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
> On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
>> On 14.10.2015 08:29, Jiang Liu wrote:
>
> [...]
>
>>> +static void acpi_pci_root_validate_resources(struct device *dev,
>>> +
On 2015/11/6 2:19, Lorenzo Pieralisi wrote:
> On Thu, Nov 05, 2015 at 03:21:34PM +0100, Tomasz Nowicki wrote:
>> On 14.10.2015 08:29, Jiang Liu wrote:
>
> [...]
>
>>> +static void acpi_pci_root_validate_resources(struct device *dev,
>>> +
On 2015/11/5 22:21, Tomasz Nowicki wrote:
> On 14.10.2015 08:29, Jiang Liu wrote:
>> Introduce common interface acpi_pci_root_create() and related data
>> structures to create PCI root bus for ACPI PCI host bridges. It will
>> be used to kill duplicated arch specific code for
On 2015/10/31 3:43, J. German Rivera wrote:
> FSL-MC is a bus type different from PCI and platform, so it needs
> its own member in the msi_desc's union.
>
> Signed-off-by: J. German Rivera
> ---
> Changes in v2:
> - Addressed comment from Jiang Liu
> * Added a d
rq_domain_bus_token {
> DOMAIN_BUS_PCI_MSI,
> DOMAIN_BUS_PLATFORM_MSI,
> DOMAIN_BUS_NEXUS,
> + DOMAIN_BUS_FSL_MC_MSI,
> };
Reviewed-by: Jiang Liu
>
> /**
> --
> 2.3.3
>
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel&
On 2015/11/5 20:53, Tomasz Nowicki wrote:
> On 02.11.2015 16:27, Tomasz Nowicki wrote:
>> On 08.07.2015 09:26, Jiang Liu wrote:
>>> Zoltan Boszormenyi reported this regression:
>>>"There's a Realtek RTL8111/8168/8411 (PCI ID 10ec:8168, Subsystem ID
&
gt;From 6db1568564f8edee626d1c168b22ed5502abc6eb Mon Sep 17 00:00:00 2001
From: Liu Jiang
Date: Thu, 5 Nov 2015 11:25:07 +0800
Subject: [PATCH] msi: Relax msi_domain_alloc() to support parentless MSI
irqdomains
Previously msi_domain_alloc() assumes MSI irqdomains always have parent
irqdomai
On 2015/10/30 7:46, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by: Jake Oshins
> ---
> arch/x86
On 2015/10/28 4:38, Jake Oshins wrote:
>> -Original Message-
>> From: Jiang Liu [mailto:jiang@linux.intel.com]
>> Sent: Tuesday, October 27, 2015 12:11 AM
>> To: Jake Oshins ; gre...@linuxfoundation.org; KY
>> Srinivasan ; linux-kernel@vger.kernel.org;
&
On 2015/10/26 23:49, J. German Rivera wrote:
> Created an MSI domain for the fsl-mc bus-- including functions
> to create a domain, find a domain, alloc/free domain irqs, and
> bus specific overrides for domain and irq_chip ops.
>
> Signed-off-by: J. German Rivera
> ---
> drivers/staging/fsl-mc/
On 2015/10/27 7:15, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> The existing PCI code looks for an IRQ domain associated with a root PCI bus
> by looking in the Open Firmware tree. This patch introduces a second way
> to identify the associated IRQ domain, if the lookup in the OF tree f
On 2015/10/27 7:15, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch introduces a new driver which exposes a root PCI bus whenever a PCI
> Express device is passed through to a guest VM under Hyper-V. The device can
> be single- or multi-function. The interrupts for the devices are m
On 2015/10/27 7:15, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch allows a PCI front-end implementation to supply an fwnode_handle
> associated with a root PCI bus, optionally. If supplied, the PCI driver
> records this.
>
> This patch supports the next patch in the series, whic
si() and sets it to 0 in the end (because the
>> probe fails and the pcibios-irq is freed again).
>>
>> On suspend/resume this breaks the kernel, because the irq
>> descriptor for irq 0 is NULL.
>>
>> Fix this by not allocating a pcibios-irq when MSI is
>&g
On 2015/10/21 19:27, Tomasz Nowicki wrote:
> On 21.10.2015 13:02, Liviu Dudau wrote:
>> On Wed, Oct 21, 2015 at 11:57:53AM +0200, Tomasz Nowicki wrote:
>>> On 14.10.2015 08:29, Jiang Liu wrote:
>>>> Introduce common interface acpi_pci_root_create() and related data
On 2015/10/15 23:39, Marc Zyngier wrote:
> As we're going to have multiple paths to allocate/free the
> platform-msi private data, factor this out into separate
> utility functions.
>
> Signed-off-by: Marc Zyngier
> ---
> drivers/base/platform-msi.c | 84
> ++
On 2015/10/15 23:39, Marc Zyngier wrote:
> +int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
> + int nvec, msi_alloc_info_t *arg)
> +{
> + struct msi_domain_info *info = domain->host_data;
> + struct msi_domain_ops *ops = info->ops;
> +
On 2015/10/15 23:39, Marc Zyngier wrote:
> There seems to be a new class of interrupt controller out there whose
> sole purpose (apart from making everybody's life a nightmare) is to
> turn wired interrupts into MSIs.
>
> Instead of considering that the MSIs allocated to a device are for the
> dir
On 2015/10/16 5:49, Rafael J. Wysocki wrote:
> On Thursday, October 15, 2015 03:48:29 PM Bjorn Helgaas wrote:
>> On Wed, Oct 14, 2015 at 02:29:35PM +0800, Jiang Liu wrote:
>>> From: Liu Jiang
>>>
>>> This patch set consolidates common code to support ACPI PC
Use common struct resource_entry to replace private
struct iospace_resource.
Signed-off-by: Jiang Liu
Reviewed-by: Hanjun Guo
Signed-off-by: Liu Jiang
---
arch/ia64/include/asm/pci.h |5 -
arch/ia64/pci/pci.c | 17 -
2 files changed, 8 insertions(+), 14
Enhance ACPI resource parsing interfaces to support sparse IO space,
which will be used to share common code between x86 and IA64 later.
Tested-by: Tony Luck
Signed-off-by: Jiang Liu
Reviewed-by: Hanjun Guo
Signed-off-by: Liu Jiang
---
drivers/acpi/resource.c |9 ++---
include/linux
Use common ACPI resource parsing interface to parse ACPI resources for
PCI host bridge, so we could share more code between IA64 and x86.
Later we will consolidate arch specific implementations into ACPI core.
Tested-by: Tony Luck
Signed-off-by: Jiang Liu
Reviewed-by: Hanjun Guo
Signed-off-by
Use common interface to simplify PCI host bridge implementation.
Tested-by: Tony Luck
Signed-off-by: Jiang Liu
Signed-off-by: Liu Jiang
---
arch/ia64/pci/pci.c | 235 +++
1 file changed, 48 insertions(+), 187 deletions(-)
diff --git a/arch
r cast issue.
3) Rebase to latest mainstream kernel
V2->V3:
1. Move memory allocation/free from ACPI core into arch
2. Kill the field 'segment' in struct pci_root_info on x86
Thanks!
Gerry
Jiang Liu (7):
ACPI/PCI: Enhance ACPI core to support sparse IO space
ia64/PCI/ACPI: Use c
-off-by: Jiang Liu
Signed-off-by: Liu Jiang
---
drivers/acpi/pci_root.c | 204 ++
include/linux/pci-acpi.h | 24 ++
2 files changed, 228 insertions(+)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 393706a5261b..850d7bf0c873
Reset acpi_root_dev->domain to 0 when pci_ignore_seg is set to keep
consistence between ACPI PCI root device and PCI host bridge device.
Acked-by: Bjorn Helgaas
Signed-off-by: Jiang Liu
Signed-off-by: Liu Jiang
---
arch/x86/pci/acpi.c |2 +-
1 file changed, 1 insertion(+), 1 delet
Use common interface to simplify ACPI PCI host bridge implementation.
Signed-off-by: Jiang Liu
Reviewed-by: Hanjun Guo
Signed-off-by: Liu Jiang
---
arch/x86/pci/acpi.c | 294 +++
1 file changed, 87 insertions(+), 207 deletions(-)
diff --git a
s any of these two methods is not
> set in the core code (they really should be present).
Hi Marc,
Thanks for fixing this,
Reviewed-by: Jiang Liu
Thanks,
Gerry
>
> Signed-off-by: Marc Zyngier
> ---
> drivers/pci/msi.c | 4
> kernel/irq/msi.c | 6 +-
> 2 fi
On 2015/10/12 18:25, Thomas Gleixner wrote:
> On Mon, 12 Oct 2015, Daniel J Blueman wrote:
>> Another approach which may be suitable without changing SRAT parsing to be
>> after the memory allocator is up, is to exploit the associativity of the
>> bottom APIC ID bits.
>
> What's the problem with m
> Works peachy on a 256-core system with a 20-bit APIC ID space, and on a
> 48-core legacy 8-bit APIC ID system. If we care, I can make
> numa_cpu_node O(1) lookup for typical cases.
>
> Signed-off-by: Daniel J Blueman
> CC: Ingo Molnar
> CC: Daniel J Blueman
> CC: Jiang Liu
On 2015/10/9 22:15, Thomas Gleixner wrote:
> On Mon, 5 Oct 2015, Daniel J Blueman wrote:
>> +struct apicid_to_node {
>> +int apicid;
>> +s16 node;
>> +};
>
> Instead of having this array, why don't you use a radix tree and be
> done with it?
Hi Thomas,
It's in early booting stage a
The ACPI IOAPIC driver makes use of IOAPIC PCI devices, so prevent
binding other PCI drivers to IOAPIC PCI devices used by ACPI IOAPIC
driver.
Signed-off-by: Jiang Liu
---
drivers/acpi/ioapic.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/ioapic.c b
prevent binding PCI drivers to PCI devices by setting
pci_dev->match_driver to false. If needed, we could implement a helper
function to manipulate pci_dev->match_driver.
Jiang Liu (2):
iommu/amd: Prevent binding other PCI drivers to IOMMU PCI devices
ACPI, PCI: Prevent binding other PCI
: 991de2e59090 ("PCI, x86: Implement pcibios_alloc_irq() and
pcibios_free_irq()")
Signed-off-by: Jiang Liu
Cc: Borislav Petkov
---
drivers/iommu/amd_iommu_init.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 5e
On 2015/10/9 17:08, Kamezawa Hiroyuki wrote:
> On 2015/10/09 14:52, Jiang Liu wrote:
>> On 2015/10/9 4:20, Andrew Morton wrote:
>>> On Wed, 19 Aug 2015 17:18:15 -0700 (PDT) David Rientjes
>>> wrote:
>>>
>>>> On Wed, 19 Aug 2015, Pati
On 2015/10/8 21:20, Bjorn Helgaas wrote:
> On Thu, Oct 08, 2015 at 01:32:04PM +0800, Jiang Liu wrote:
>> On 2015/10/7 1:47, Bjorn Helgaas wrote:
>>>> +struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
>>>> +
On 2015/10/9 4:20, Andrew Morton wrote:
> On Wed, 19 Aug 2015 17:18:15 -0700 (PDT) David Rientjes
> wrote:
>
>> On Wed, 19 Aug 2015, Patil, Kiran wrote:
>>
>>> Acked-by: Kiran Patil
>>
>> Where's the call to preempt_disable() to prevent kernels with preemption
>> from making numa_node_id() inv
On 2015/8/20 14:36, Jiang Liu wrote:
> On 2015/8/20 8:02, David Rientjes wrote:
>> On Wed, 19 Aug 2015, Jiang Liu wrote:
>>
>>>> Why not simply fix build_zonelists_node() so that the __GFP_THISNODE
>>>> zonelists are set up to reference the zones of
Thanks for fixing this.
Reviewed-by: Jiang Liu
>
> Signed-off-by: Andy Shevchenko
> ---
> arch/x86/kernel/apic/io_apic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
> ind
On 2015/8/20 8:00, David Rientjes wrote:
> On Wed, 19 Aug 2015, Jiang Liu wrote:
>
>> On 2015/8/18 8:31, David Rientjes wrote:
>>> On Mon, 17 Aug 2015, Jiang Liu wrote:
>>>
>>>> Function profile_cpu_callback() allocates memory without specifying
>&
On 2015/10/7 1:47, Bjorn Helgaas wrote:
> Hi Jiang,
>
> Strictly speaking, this patch by itself doesn't actually "consolidate"
> anything because it only adds acpi_pci_root_create() (which isn't called by
> anything yet), but doesn't remove the original x86 copy.
>
>> +struct pci_bus *acpi_pci_r
On 2015/10/8 10:51, Jiang Liu wrote:
> Previously the eata driver just grabs and accesses eata PCI devices
> without implementing a PCI device driver, that causes troubles with
> latest IRQ related
>
> Commit 991de2e59090 ("PCI, x86: Implement pcibios_alloc_irq() an
t also
provides headroom for PCI hotplug with eata driver.
It also represents non-PCI eata devices as platform devices, so it could
be managed as normal devices.
Signed-off-by: Jiang Liu
Cc: Hannes Reinecke
Cc: Ballabio, Dario
Cc: Christoph Hellwig
---
Hi all,
With this patch applied
llers and lack of hardware for tests, helps from eata experts
are really welcomed!
Signed-off-by: Jiang Liu
---
drivers/scsi/eata.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/scsi/eata.c b/drivers/scsi/eata.c
index 7315f8adcf65..b83abe283744 100644
--- a/drivers/
On 2015/10/5 18:03, Joerg Roedel wrote:
> Hi Jiang,
>
> On Sat, Oct 03, 2015 at 03:36:35PM +0800, Jiang Liu wrote:
>> So to summary, I think we only need following change to fix the
>> regression:
>> int pcibios_alloc_irq(struct pci_dev *dev)
>> {
&g
On 2015/10/3 16:20, Feng Wu wrote:
> irq_set_vcpu_affinity() is needed when CONFIG_SMP=n, so move the
> definition out of "#ifdef CONFIG_SMP"
>
> Suggested-by: Paolo Bonzini
> Signed-off-by: Feng Wu
Reviewed-by: Jiang Liu
> ---
On 2015/9/26 14:27, Arthur Marsh wrote:
>
>
> Arthur Marsh wrote on 24/09/15 15:26:
>>
>>
>> Jiang Liu wrote on 24/09/15 13:58:
>>
>>> Hi James,
>>> Thanks for review. How about the attached patch which addresses
>>> the three su
On 2015/10/1 1:36, Borislav Petkov wrote:
> On Thu, Oct 01, 2015 at 01:00:44AM +0800, Jiang Liu wrote:
>> Thanks Joerg, that makes sense. If some driver tries to binding to
>> the IOMMU device, it will trigger the scenario as you described. For
>> example, Xen backend dri
On 2015/10/1 22:31, Thomas Gleixner wrote:
> On Thu, 1 Oct 2015, Mika Westerberg wrote:
>> Now if I plug/unplug the card I may get few interrupts to CPU0 but rest
>> of the interrupts never happen. Probably because IO-APIC forwards them
>> to the lowest priority CPU which is offline at this point.
ze by 204661 bytes:
>
> text data bss dec hex filename
> 91353669 13825744 19021824 124201237 7672915 vmlinux.before
> 91353680 13760336 18882560 123996576 76409a0 vmlinux
>
> Signed-off-by: Denys Vlasenko
> CC: Ingo Molnar
> CC: Jiang Liu
&g
On 2015/9/30 23:49, Denys Vlasenko wrote:
> On 09/30/2015 05:11 PM, Thomas Gleixner wrote:
>> On Fri, 25 Sep 2015, Denys Vlasenko wrote:
>>>
>>> +config MAX_LAPIC_ID
>>> + int "Maximum APIC ID"
>>> + range 8 32768
>>> + default "8"
>>> + ---help---
>>> + Use this option to set maximum
On 2015/9/30 20:44, Joerg Roedel wrote:
> On Wed, Sep 30, 2015 at 03:45:39PM +0800, Jiang Liu wrote:
>> So we need to figure out why we got irq number 0 after enabling
>> MSI for AMD IOMMU device. The only hint I got is that iommu driver just
>> grabbing the PCI device wi
n 2015/9/29 18:51, Borislav Petkov wrote:
> On Tue, Sep 29, 2015 at 04:50:36PM +0800, Jiang Liu wrote:
>> So could you please help to apply the attached debug patch to gather
>> more information about the regression?
>
> Sure, just did.
>
> I'm sending you a fu
r deref f*cking up the box much earlier. Once I reverted
> the bad commit by hand (it wouldn't revert cleanly) the resume splats
> showed.
>
> And in talking about the bad commit, it is this one:
>
> 991de2e59090e55c65a7f59a049142e3c480f7bd is the first bad commit
> commit 991d
On 2015/9/27 21:15, Fengguang Wu wrote:
> Greetings,
>
> 0day kernel testing robot got the below dmesg and the first bad commit is
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
>
> commit 991de2e59090e55c65a7f59a049142e3c480f7bd
&g
On 2015/9/26 0:16, Denys Vlasenko wrote:
> For 64-bit kernels, MAX_LOCAL_APIC is 32k:
>
> #ifdef CONFIG_X86_32
> ...
> #else
> # define MAX_IO_APICS 128
> # define MAX_LOCAL_APIC 32768
> #endif
>
> (It seems to be a bit of a misnomer, it's not a maximum
> number of APICs we support, it's the high
On 2015/9/23 22:40, James Bottomley wrote:
> On Wed, 2015-09-23 at 20:14 +0930, Arthur Marsh wrote:
>>
>> Jiang Liu wrote on 23/09/15 14:54:
>>
>>> Hi Arthur,
>>> I have found the cause of the warning messages, it's caused
>>> by a flaw
On 2015/9/23 22:49, Qais Yousef wrote:
> This RFC series attempts to implement a generic IPI layer for reserving and
> sending IPI.
>
> It is based on the discussion in this link
>
> https://lkml.org/lkml/2015/8/26/713
>
> This series deals with points #1 and #2 only. Since I'm not the ir
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