v2: Fixed typo due to keyboard failure.
Jiaxun Yang (3):
MIPS: head.S: Always jump to kernel_entry at head of text
MIPS: Move kernel head into a standalone section
MIPS: Loongson64: select NO_EXCEPT_FILL
arch/mips/Kconfig | 1 +
arch/mips/kernel/head.S| 6 ++
arch
Loongson64 load kernel at 0x8200 and allocate exception vectors
by ebase. So we don't need to reserve space for exception vectors
at head of kernel.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
That's what already done by Arm64 and other architectures.
That would allow us put more things like PE headers safely into
the header.
Signed-off-by: Jiaxun Yang
---
arch/mips/kernel/head.S| 4 ++--
arch/mips/kernel/vmlinux.lds.S | 8 ++--
2 files changed, 8 insertions(+), 4
Buggy loaders like early version of PMON2000 sometimes ignore
elf_entry and goto start of text directly.
That would help with dealing with these loaders.
Signed-off-by: Jiaxun Yang
---
arch/mips/kernel/head.S | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/mips/kernel/head.S b/arch
On Wed, 27 May 2020 13:27:17 +0800
Jiaxun Yang wrote:
> Jiaxun Yang (2):
> MIPS: head.S: Always jump to kernel_entry at head of text
> MIPS: Loongso64: select NO_EXCEPT_FILL
Please ignore the noise.
Something went wrong with my keyboard...
>
> arch/mips/Kconfig
Jiaxun Yang (2):
MIPS: head.S: Always jump to kernel_entry at head of text
MIPS: Loongso64: select NO_EXCEPT_FILL
arch/mips/Kconfig | 1 +
arch/mips/kernel/head.S | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
--
2.27.0.rc0
Buggy loaders like early version of PMON2000 sometimes ignore
elf_entry and goto start of text directly.
That would help with dealing with these loaders.
Signed-off-by: Jiaxun Yang
---
arch/mips/kernel/head.S | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/mips/kernel/head.S b/arch
Loongson64 load kernel at 0x8200 and allocate exception vectors
by ebase. So we don't need to reserve space for exception vectors
at head of kernel.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
On Mon, 25 May 2020 11:12:26 +0100
Marc Zyngier wrote:
> On Sat, 16 May 2020 09:29:02 +0100,
> Jiaxun Yang wrote:
> >
> > Add binding for Loongson-3 HyperTransport Interrupt Vector
> > Controller.
> >
> > Signed-off-by: Jiaxun Yang
> > --
> >
We can now enable generic PCI driver in Kconfig, and remove legacy
PCI driver code.
Radeon vbios quirk is moved to the platform folder to fit the
new structure.
Signed-off-by: Jiaxun Yang
--
v9: Fix licenses tag
---
arch/mips/Kconfig | 1 +
arch/mips/loongson64/Makefile
Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.
Signed-off-by: Jiaxun Yang
---
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 12
PCI host controller found on Loongson PCHs and SoCs.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pci/loongson.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/loongson.yaml
diff
v11 fixes a minor style issue in patch 2.
Now it have got enough ack,
Thomas, cloud you please apply it to mips-next?
Thanks.
Jiaxun Yang (5):
PCI: Don't disable decoding when mmio_always_on is set
PCI: Add Loongson PCI Controller support
dt-bindings: Document Loongson PCI Host Controller
Don't disable MEM/IO decoding when a device have both non_compliant_bars
and mmio_always_on.
That would allow us quirk devices with junk in BARs but can't disable
their decoding.
Signed-off-by: Jiaxun Yang
Acked-by: Bjorn Helgaas
---
drivers/pci/probe.c | 2 +-
1 file changed, 1 insertion
This controller can be found on Loongson-2K SoC, Loongson-3
systems with RS780E/LS7A PCH.
The RS780E part of code was previously located at
arch/mips/pci/ops-loongson3.c and now it can use generic PCI
driver implementation.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
Acked-by: Lorenzo
;> > > On Thu, May 14, 2020 at 09:16:41PM +0800, Jiaxun Yang wrote:
>> > > > We can now enable generic PCI driver in Kconfig, and remove legacy
>> > > > PCI driver code.
>> > > >
>> > > > Radeon vbios quirk is moved to the platfo
于 2020年5月22日 GMT+08:00 下午9:10:18, Lorenzo Pieralisi
写到:
>On Wed, May 20, 2020 at 07:57:29PM +0800, Jiaxun Yang wrote:
>>
>>
>> 于 2020年5月14日 GMT+08:00 下午9:16:38, Jiaxun Yang 写到:
>> >This controller can be found on Loongson-2K SoC, Loongson-3
&g
n pick it for now.
[...]
[1]: https://lkml.org/lkml/2020/4/11/1088
--
Jiaxun Yang
于 2020年5月14日 GMT+08:00 下午9:16:38, Jiaxun Yang 写到:
>This controller can be found on Loongson-2K SoC, Loongson-3
>systems with RS780E/LS7A PCH.
>
>The RS780E part of code was previously located at
>arch/mips/pci/ops-loongson3.c and now it can use generic PCI
>driver implementat
于 2020年5月13日 GMT+08:00 下午8:15:40, Thomas Gleixner 写到:
>Thomas Gleixner writes:
>> Jiaxun Yang writes:
>>> +
>>> +struct pch_msi_data {
>>> + spinlock_t msi_map_lock;
>>> + phys_addr_t doorbell;
>>> + u32
Add binding for Loongson PCH PIC Controller.
Signed-off-by: Jiaxun Yang
--
v2:
- Fix naming
- Mark loongson,pic-base-vec as required
---
.../loongson,pch-pic.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644
Documentation
This controller appears on Loongson-3 chips for receiving interrupt
vectors from PCH's PIC and PCH's PCIe MSI interrupts.
Signed-off-by: Jiaxun Yang
---
v2:
- Style cleanup
- Set ack callback and set correct edge_irq handler
v3:
- Correct bitops in ACK callback
v4
Add binding for Loongson-3 HyperTransport Interrupt Vector Controller.
Signed-off-by: Jiaxun Yang
--
v4: Drop ref, '|', add additionalProperties, fix example
---
.../interrupt-controller/loongson,htvec.yaml | 58 +++
1 file changed, 58 insertions(+)
create mode 100644
This controller appears on Loongson LS7A family of PCH to transform
interrupts from devices into HyperTransport vectorized interrrupts
and send them to procrssor's HT vector controller.
Signed-off-by: Jiaxun Yang
---
v2:
- Style clean-ups
- Use IRQ_FASTEOI_HIERARCHY_HANDLERS
Add binding for Loongson PCH MSI controller.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
---
.../loongson,pch-msi.yaml | 56 +++
1 file changed, 56 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,pch
This controller appears on Loongson LS7A family of PCH to transform
interrupts from PCI MSI into HyperTransport vectorized interrrupts
and send them to procrssor's HT vector controller.
Signed-off-by: Jiaxun Yang
--
v2:
- Style clean-ups
- Add ack callback
- Use
062500) is a 16550A
>[1.890838] printk: console [ttyS0] enabled
>
>And also, we can login normally from the serial console.
>
>Signed-off-by: Tiezhu Yang
>---
>
>Hi Jiaxun,
>
>Thank you very much for your suggestion.
Reviewed-by: Jiaxun Yang
Looks like we need a Kconfig clean up.
I'll do that after getting LS7A PCH support merged.
Anyway, thanks for catching this.
[...]
--
Jiaxun Yang
never use it.
If you are willing to add serial port then please do it
in devicetree.
Platform devices in wild is dangerous and it will break everything.
>
>Thanks,
>Tiezhu Yang
>
>>
>> Thomas.
>>
>
--
Jiaxun Yang
于 2020年5月15日 GMT+08:00 上午11:09:56, Tiezhu Yang 写到:
>On 05/15/2020 10:33 AM, Jiaxun Yang wrote:
>>
>> 于 2020年5月15日 GMT+08:00 上午10:15:00, Tiezhu Yang 写到:
>>> When ATI Radeon graphics card has been compiled directly into the kernel
>>> instead of as a module,
l, otherwise there exists the following fatal error during GPU init,
>change CONFIG_DRM_RADEON=y to CONFIG_DRM_RADEON=m to fix it.
>
The commit message looks shocking.
You'd better reword it as "MIPS: Loongson64: Mark GPU driver as module in
Kconfig"
Thanks.
--
Jiaxun Yang
Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.
Signed-off-by: Jiaxun Yang
---
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 12
This controller can be found on Loongson-2K SoC, Loongson-3
systems with RS780E/LS7A PCH.
The RS780E part of code was previously located at
arch/mips/pci/ops-loongson3.c and now it can use generic PCI
driver implementation.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
--
v2
PCI host controller found on Loongson PCHs and SoCs.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pci/loongson.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/loongson.yaml
diff
We can now enable generic PCI driver in Kconfig, and remove legacy
PCI driver code.
Radeon vbios quirk is moved to the platform folder to fit the
new structure.
Signed-off-by: Jiaxun Yang
--
v9: Fix licenses tag
---
arch/mips/Kconfig | 1 +
arch/mips/loongson64/Makefile
Don't disable MEM/IO decoding when a device have both non_compliant_bars
and mmio_always_on.
That would allow us quirk devices with junk in BARs but can't disable
their decoding.
Signed-off-by: Jiaxun Yang
Acked-by: Bjorn Helgaas
---
drivers/pci/probe.c | 2 +-
1 file changed, 1 insertion
于 2020年5月13日 GMT+08:00 上午2:06:02, Bjorn Helgaas 写到:
>On Tue, May 12, 2020 at 03:43:56PM +0800, Jiaxun Yang wrote:
>> This controller can be found on Loongson-2K SoC, Loongson-3
>> systems with RS780E/LS7A PCH.
>>
>> The RS780E part of code was previously loca
We can now enable generic PCI driver in Kconfig, and remove legacy
PCI driver code.
Radeon vbios quirk is moved to the platform folder to fit the
new structure.
Signed-off-by: Jiaxun Yang
--
v9: Fix licenses tag
---
arch/mips/Kconfig | 1 +
arch/mips/loongson64/Makefile
Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.
Signed-off-by: Jiaxun Yang
---
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 12
This controller can be found on Loongson-2K SoC, Loongson-3
systems with RS780E/LS7A PCH.
The RS780E part of code was previously located at
arch/mips/pci/ops-loongson3.c and now it can use generic PCI
driver implementation.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
--
v2
PCI host controller found on Loongson PCHs and SoCs.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pci/loongson.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/loongson.yaml
diff
Don't disable MEM/IO decoding when a device have both non_compliant_bars
and mmio_always_on.
That would allow us quirk devices with junk in BARs but can't disable
their decoding.
Signed-off-by: Jiaxun Yang
Acked-by: Bjorn Helgaas
---
drivers/pci/probe.c | 2 +-
1 file changed, 1 insertion
On Fri, 1 May 2020 17:21:32 +0800
Jiaxun Yang wrote:
> This controller appears on Loongson-3 chips for receiving interrupt
> vectors from PCH's PIC and PCH's PCIe MSI interrupts.
>
> Signed-off-by: Jiaxun Yang
> ---
> v2:
> - Style cleanup
> - Set ack
于 2020年5月9日 GMT+08:00 上午1:17:30, Bjorn Helgaas 写到:
>On Fri, May 08, 2020 at 07:34:02PM +0800, Jiaxun Yang wrote:
>> This controller can be found on Loongson-2K SoC, Loongson-3
>> systems with RS780E/LS7A PCH.
>>
>> The RS780E part of code was previously loca
exey Malahov
> Signed-off-by: Serge Semin
> Cc: Thomas Bogendoerfer
> Cc: Paul Burton
> Cc: Ralf Baechle
> Cc: Arnd Bergmann
> Cc: Rob Herring
> Cc: linux...@vger.kernel.org
> Cc: devicet...@vger.kernel.org
Reviewed-by: Jiaxun Yang
That have been absent in MIPS kernel so long!
Thanks.
> ---
[...]
---
Jiaxun Yang
We can now enable generic PCI driver in Kconfig, and remove legacy
PCI driver code.
Radeon vbios quirk is moved to the platform folder to fit the
new structure.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig | 1 +
arch/mips/loongson64/Makefile | 2 +-
arch/mips
Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.
Signed-off-by: Jiaxun Yang
---
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 12
Don't disable MEM/IO decoding when a device have both non_compliant_bars
and mmio_always_on.
That would allow us quirk devices with junk in BARs but can't disable
their decoding.
Signed-off-by: Jiaxun Yang
---
drivers/pci/probe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
PCI host controller found on Loongson PCHs and SoCs.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pci/loongson.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/loongson.yaml
diff
This controller can be found on Loongson-2K SoC, Loongson-3
systems with RS780E/LS7A PCH.
The RS780E part of code was previously located at
arch/mips/pci/ops-loongson3.c and now it can use generic PCI
driver implementation.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
--
v2
On Mon, 4 May 2020 18:43:29 -0500
Bjorn Helgaas wrote:
> On Tue, Apr 28, 2020 at 09:14:17AM +0800, Jiaxun Yang wrote:
> > This controller can be found on Loongson-2K SoC, Loongson-3
> > systems with RS780E/LS7A PCH.
> >
> > The RS780E part of code was previously locat
uncate load address provided by platform
into 32bit for 32bit kernel.
Signed-off-by: Jiaxun Yang
Link: https://github.com/ClangBuiltLinux/linux/issues/786
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=25784
Reviewed-by: Fangrui Song
Reviewed-by: Kees Cook
Tested-by: Nathan Chancell
于 2020年5月4日 GMT+08:00 下午11:46:13, Thomas Bogendoerfer
写到:
>On Fri, Apr 24, 2020 at 01:22:30PM +0100, Maciej W. Rozycki wrote:
>> On Thu, 23 Apr 2020, Jiaxun Yang wrote:
>>
>> > > Alternatively, have you made any attempt to verify if actually r
/loongson3-llsc-check ../../../vmlinux
>[loongson@localhost tools]$
>
>With this patch:
>
>[loongson@localhost tools]$ ./loongson3-llsc-check ../../../vmlinux
>loongson3-llsc-check returns success
>[loongson@localhost tools]$
>
>Signed-off-by: Tiezhu Yang
Reviewed-b
Add binding for Loongson PCH MSI controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,pch-msi.yaml | 56 +++
1 file changed, 56 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml
diff --git
This controller appears on Loongson LS7A family of PCH to transform
interrupts from PCI MSI into HyperTransport vectorized interrrupts
and send them to procrssor's HT vector controller.
Signed-off-by: Jiaxun Yang
--
v2:
- Style clean-ups
- Add ack callback
- Use
Add binding for Loongson PCH PIC Controller.
Signed-off-by: Jiaxun Yang
--
v2:
- Fix naming
- Mark loongson,pic-base-vec as required
---
.../loongson,pch-pic.yaml | 56 +++
1 file changed, 56 insertions(+)
create mode 100644
Documentation
Add binding for Loongson-3 HyperTransport Interrupt Vector Controller.
Signed-off-by: Jiaxun Yang
---
.../interrupt-controller/loongson,htvec.yaml | 59 +++
1 file changed, 59 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson
This controller appears on Loongson LS7A family of PCH to transform
interrupts from devices into HyperTransport vectorized interrrupts
and send them to procrssor's HT vector controller.
Signed-off-by: Jiaxun Yang
---
v2:
- Style clean-ups
- Use IRQ_FASTEOI_HIERARCHY_HANDLERS
This controller appears on Loongson-3 chips for receiving interrupt
vectors from PCH's PIC and PCH's PCIe MSI interrupts.
Signed-off-by: Jiaxun Yang
---
v2:
- Style cleanup
- Set ack callback and set correct edge_irq handler
v3:
- Correct bitops in ACK callback
ur suggestions.
I'm probably going to refine this before we implement full devicetree boot,
but that's in far future.
LGTM to me for now.
Thanks.
Reviewed-by: Jiaxun Yang
>
>v5:
> - use the default implementation of __phys_to_dma()
>and __dma_to_phys() in dma-direct.h
>
>v6:
>
于 2020年4月28日 GMT+08:00 下午7:33:26, Thomas Bogendoerfer
写到:
>On Tue, Apr 28, 2020 at 10:14:12AM +0800, Jiaxun Yang wrote:
>> That would allow us modify kernel vm address spaces without
>> step into the hell of includes.
>>
>> Also use some marcos for address s
Hi kernel.org sysadmin team,
It seems like SSL certification of kernel.org is expired today. With HSTS
enable, we can't reach kernel.org now.
Thanks
--
Jiaxun Yang
08:12, 2019年9月10日, Paul Burton :
Hi Jiaxun & Huacai,
On Thu, Sep 05, 2019 at 10:42:59PM +0800, Jiaxun Yang wrote:
As later model of GSx64 family processors including
2-series-soc have
similar design with initial loongson3a while loongson2e/f
seems
14:30, 2019年9月12日, Matt Turner :
On Tue, Aug 27, 2019 at 1:53 AM Jiaxun Yang mailto:jiaxun.y...@flygoat.com>> wrote:
Loongson have a long history of contributing their code to
mainline kernel.
However, it seems like recent years, they are fo
On 2019/9/7 上午10:53, Huacai Chen wrote:
On Thu, Sep 5, 2019 at 10:47 PM Jiaxun Yang wrote:
Add generic device dts for Loongson-3 devices.
They seems identical but will be different later.
Signed-off-by: Jiaxun Yang
Hi, Jiaxun,
I'm very glad to see that dts files become less
I'm going to help with LOONGSON64 maintainance as well.
Signed-off-by: Jiaxun Yang
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 836b21baeb20..36b656ded1b7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10753,6 +10753,7 @@ F: drivers
Place newly submited irqchip drivers and devicetree support under
MIPS/LOONGSON64 ARCHITECTURE.
Signed-off-by: Jiaxun Yang
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b2ad16902d70..836b21baeb20 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
GPIOs on Loongson-3A/B should never be touched by user,
it may damage hardware.
And nobody is using this driver in realworld.
Signed-off-by: Jiaxun Yang
---
drivers/gpio/Kconfig | 6 +++---
drivers/gpio/gpio-loongson.c | 9 +
2 files changed, 4 insertions(+), 11 deletions
We've touched kconfig a lot in previous patches.
Signed-off-by: Jiaxun Yang
---
arch/mips/configs/fuloong2e_defconfig | 8 +++-
arch/mips/configs/lemote2f_defconfig | 8 ++--
arch/mips/configs/loongson3_defconfig | 13 -
3 files changed, 9 insertions(+), 20 deletions
Load proper dtb according to firmware passed parameters and
CPU PRID.
Signed-off-by: Jiaxun Yang
---
.../asm/mach-loongson64/builtin_dtbs.h| 16
.../include/asm/mach-loongson64/loongson64.h | 2 ++
arch/mips/loongson64/env.c| 26
Add generic device dts for Loongson-3 devices.
They seems identical but will be different later.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig | 4 +-
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/loongson/3a-package.dtsi | 69
Prepare for later dts.
Signed-off-by: Jiaxun Yang
---
.../bindings/mips/loongson/devices.yaml | 39 +++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/loongson/devices.yaml
diff --git a/Documentation/devicetree/bindings/mips
Loongson is a MIPS-compatible processor vendor.
Signed-off-by: Jiaxun Yang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Documentation/devicetree
We've made generic irqchip drivers for Loongson-3 platform, it's time
to say goodbye to these legacy code.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/mach-loongson64/irq.h | 1 -
arch/mips/loongson64/irq.c | 167 +---
arch/mips/loongson64/smp.c
can allocate irq_desc
during initialization.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/irq-mips-cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-mips-cpu.c b/drivers/irqchip/irq-mips-cpu.c
index 95d4fd8f7a96..c3cf7fa76424 100644
--- a/drivers/irqc
For some platforms (e.g. Loongson-3), platfrom interrupt controller
supports polling interrupt vector from i8259 automaticly and generating
sepreated interrupt.
Thus we add plat-poll OF property for these platforms and setup sepreated
chained interrupt handler.
Signed-off-by: Jiaxun Yang
Document Loongson-3 HyperTransport Interrupt controller.
Signed-off-by: Jiaxun Yang
Reviewed-by: Rob Herring
---
.../loongson,ls3-htintc.yaml | 55 +++
1 file changed, 55 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller
Document Loongson-3 I/O Interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls3-iointc.yaml | 79 +++
1 file changed, 79 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml
diff --git
This controller appeared on Loongson-3 family of chips to receive interrupts
from PCH chip.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig | 8 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls3-htintc.c | 147 +++
3 files changed
As we sepreated the code of loongson2ef/loongson3a, they can
now have their own entries.
Signed-off-by: Jiaxun Yang
---
MAINTAINERS | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 783569e3c4b4..b2ad16902d70 100644
--- a/MAINTAINERS
Export irq_map_generic_chip, irq_unmap_generic_chip so drivers
can use them to construct their own generic chip domain ops.
Signed-off-by: Jiaxun Yang
---
include/linux/irq.h | 1 +
kernel/irq/generic-chip.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/include
This controller appeared on Loongson-3 family of chips as the primary
package interrupt source.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig | 9 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls3-iointc.c | 275 +++
3 files
As later model of GSx64 family processors including 2-series-soc have
similar design with initial loongson3a while loongson2e/f seems less
identical, we separate loongson2e/f support code out of mach-loongson64
to make our life easier.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kbuild.platforms
CPU_LOONGSON2 -> CPU_LOONGSON2EF
CPU_LOONGSON3 -> CPU_LOONGSON64
As newer loongson-2 products (2G/2H/2K1000) can share kernel
implementation with loongson-3 while 2E/2F are less similar with
other LOONGSON64 products.
Signed-off-by: Jiaxun Yang
---
arch/mips/K
ding to Huacai and Paul's
comments
Jiaxun Yang (19):
MIPS: Loongson64: Rename CPU TYPES
MIPS: Loongson64: separate loongson2ef/loongson64 code
MAINTAINERS: Fix entries for new loongson64 path
irqchip: Export generic chip domain map/unmap functions
irqchip: Add driver for Loongson-3 I/O inter
file names.
Thanks, I'm going to drop cpu node in v2.
Renaming files seems meaningless, but I'm going to do that too.
--
Jiaxun Yang
I'm going to help with LOONGSON64 maintainance as well.
Signed-off-by: Jiaxun Yang
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 242970af939c..e14edf51ee15 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10758,6 +10758,7 @@ F: drivers
Place newly submited irqchip drivers and devicetree support under
MIPS/LOONGSON64 ARCHITECTURE.
Signed-off-by: Jiaxun Yang
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d5d4fed632e6..242970af939c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Add generic device dts for Loongson-3 devices.
They seems identical but will be different later.
Signed-off-by: Jiaxun Yang
---
arch/mips/Kconfig | 4 +-
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/loongson/Makefile | 8
Load proper dtb according to firmware passed parameters and
CPU PRID.
Signed-off-by: Jiaxun Yang
---
.../asm/mach-loongson64/builtin_dtbs.h| 26 +++
.../include/asm/mach-loongson64/loongson64.h | 2 +
arch/mips/loongson64/env.c| 67 +++
arch
We've touched kconfig a lot in previous patches.
Signed-off-by: Jiaxun Yang
---
arch/mips/configs/fuloong2e_defconfig | 8 +++-
arch/mips/configs/lemote2f_defconfig | 8 ++--
arch/mips/configs/loongson3_defconfig | 12
3 files changed, 9 insertions(+), 19 deletions
Loongson is a MIPS-compatible processor vendor.
Signed-off-by: Jiaxun Yang
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Documentation/devicetree/bindings/vendor
Prepare for later dts.
Signed-off-by: Jiaxun Yang
---
.../bindings/mips/loongson/cpus.yaml | 38 +++
.../bindings/mips/loongson/devices.yaml | 64 +++
2 files changed, 102 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/loongson
We've made generic irqchip drivers for Loongson-3 platform, it's time
to say goodbye to these legacy code.
Signed-off-by: Jiaxun Yang
---
arch/mips/include/asm/mach-loongson64/irq.h | 1 -
arch/mips/loongson64/irq.c | 167 +---
arch/mips/loongson64/smp.c
can allocate irq_desc
during initialization.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/irq-mips-cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-mips-cpu.c b/drivers/irqchip/irq-mips-cpu.c
index 95d4fd8f7a96..c3cf7fa76424 100644
--- a/drivers/irqc
For some platforms (e.g. Loongson-3), platfrom interrupt controller
supports polling interrupt vector from i8259 automaticly and generating
sepreated interrupt.
Thus we add plat-poll OF property for these platforms and setup sepreated
chained interrupt handler.
Signed-off-by: Jiaxun Yang
Document Loongson-3 HyperTransport Interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls3-htintc.yaml | 55 +++
1 file changed, 55 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-htintc.yaml
Document Loongson-3 I/O Interrupt controller.
Signed-off-by: Jiaxun Yang
---
.../loongson,ls3-iointc.yaml | 75 +++
1 file changed, 75 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml
diff --git
This controller appeared on Loongson-3 family of chips to receive interrupts
from PCH chip.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig | 8 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls3-htintc.c | 147 +++
3 files changed
This controller appeared on Loongson-3 family of chips as the primary
package interrupt source.
Signed-off-by: Jiaxun Yang
---
drivers/irqchip/Kconfig | 9 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ls3-iointc.c | 275 +++
3 files
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