On 1/13/21, 9:50 AM, Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/video/fbdev/s3c-fb.c: In function ‘s3c_fb_probe_win’:
> drivers/video/fbdev/s3c-fb.c:1176:28: warning: variable ‘var’ set but not
> used [-Wunused-but-set-variable]
>
>
g: Excess function parameter 'trans'
> description in 's3c_fb_setcolreg'
> drivers/video/fbdev/s3c-fb.c:1142: warning: Function parameter or member
> 'sfb' not described in 's3c_fb_release_win'
> drivers/video/fbdev/s3c-fb.c:1172: warning: Fu
c
> @@ -225,6 +225,46 @@ static void dw_pcie_writel_ob_unroll(struct dw_pcie
> *pci, u32 index, u32 reg,
> dw_pcie_writel_atu(pci, offset + reg, val);
> }
>
> +static inline u32 dw_pcie_enable_ecrc(u32 val)
What is the reason to use inline here?
Best regards,
Jingoo
t have an iATU.
> >
> > Frankly I have no idea, I don't know much about the PCI internals.
>
> Sorry, I was confused. It's fine.
I was confused, too. But, as far as I remember, I also think that
viewpoint-related
setting was necessary for Exynos PCIe.
Thank you.
Best regards,
Jingoo Han
>
> Reviewed-by: Rob Herring
>
> Rob
iver,
> - TI LP8727 charger driver,
> - TI LP8788 MFD (ADC, LEDs, charger and regulator) drivers.
>
> Signed-off-by: Krzysztof Kozlowski
> Cc: Dan Murphy
> Acked-by: Dan Murphy
> Acked-by: Jonathan Cameron
> Acked-by: Sebastian Reichel
Acked-by: Jingoo Han
Best regards,
Jingoo Han
[...]
90a. This patch does the required programming in ATU upon
> querying the system policy for ECRC.
>
> Signed-off-by: Vidya Sagar
> Reviewed-by: Jingoo Han
No, it should be Acked-by. I gave you Acked-by, not Reviewed-by.
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> V
t kernel code, added
> regulator support, converted to the regular platform driver,
> removed MSI related code, rewrote commit message, added help]
> Signed-off-by: Marek Szyprowski
> Acked-by: Krzysztof Kozlowski
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
&g
On 10/27/20, 4:03 AM, Vidya Sagar wrote:
>
> Adds pcie_is_ecrc_enabled() API to let other sub-systems (like DesignWare)
> to query if ECRC policy is enabled and perform any configuration
> required in those respective sub-systems.
>
> Signed-off-by: Vidya Sagar
Reviewed-by:
90a. This patch does the required programming in ATU upon
> querying the system policy for ECRC.
>
> Signed-off-by: Vidya Sagar
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> V2:
> * Addressed Jingoo's review comment
> * Removed saving 'td' bit
On 10/26/20, 2:59 AM, Vidya Sagar wrote:
>
> On 10/26/2020 2:19 AM, Jingoo Han wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > On 10/25/20, 3:31 AM, Vidya Sagar wrote:
> >>
> >> DesignWare core has a TL
On 10/25/20, 10:49 PM, Jaehoon Chung wrote:
>
> Dear Jingoo,
Hi Jaehoon,
> On 10/24/20 12:12 PM, Jingoo Han wrote:
> > On 10/23/20, 3:58 AM, Marek Szyprowski wrote:
> >>
> >> From: Jaehoon Chung
> >>
> >> Exynos5440 SoC support has been droppe
link_gen;
> u8 n_fts[2];
> + booltd; /* TLP Digest (for ECRC purpose) */
If possible, don't add a new variable to 'dw_pcie' structure.
Please find a way to set TD bit without adding a new variable to 'dw_pcie'
structure'.
Best regards,
Jingoo Han
> };
>
> #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)
> --
> 2.17.1
: Jingoo
But, I still want someone to ack 1st patch, not me.
To Vidya,
If possible, can you ask your coworker to give 'Tested-by'? It will be very
helpful.
Thank you.
Best regards,
Jingoo Han
>
> .../pci/controller/dwc/pcie-designware-host.c | 39 ---
> dri
, Ltd.
> + * Copyright (C) 2013-2020 Samsung Electronics Co., Ltd.
> * https://www.samsung.com
> *
> * Author: Jingoo Han
> + * Jaehoon Chung
Would you explain the reason why you add him as an author?
If reasonable, I will accept it. Also, I want gentle discussion, not aggressive
one.
Thank you.
Best regards,
Jingoo Han
> */
[]
> Signed-off-by: Jaehoon Chung
> [mszyprow: reworked the driver to support only Exynos5433 variant, rebased
> onto current kernel code, rewrote commit message]
> Signed-off-by: Marek Szyprowski
> Acked-by: Krzysztof Kozlowski
>
Reviewed-by: Jingoo Han
Best regards,
Ji
-by: Rob Herring
> Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> .../bindings/pci/samsung,exynos5440-pcie.txt | 58 ---
> 1 file changed, 58 deletions(-)
> delete mode 100644
> Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt
[.]
domain.
>
> Fix it by tagging the inner domain as DOMAIN_BUS_NEXUS, which is
> the closest thing we have as to "generic MSI".
>
> Signed-off-by: Marc Zyngier
Acked-by: Jingoo Han
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 2 ++
> 1 file changed, 2 i
l development.
Agreed!
>
> > At least I can see current driver has some features which is not being used
> > by any current driver.
>
> Please send patches to remove them.
Agreed!
Mainline kernel should not include features that have not been used.
Thank you.
Best regards,
Jingoo Han
On 9/4/19, 7:57 AM, YueHaibing wrote:
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Reported-by: Hulk Robot
> Signed-off-by: YueHaibing
>
Acked-by: Jingoo Han
>
> ---
> drivers/video/fbdev/s3c-fb.c |
nt
> ATU read/write APIs using ATU base address without using
> dw_pcie_{readl/writel}_dbi() APIs.
>
> Signed-off-by: Vidya Sagar
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> Changes from v8:
> * Removed exporting dw_pcie_{read/write}_atu() APIs
>
> Changes from v7
nt
> ATU read/write APIs using ATU base address without using
> dw_pcie_{readl/writel}_dbi() APIs.
>
> Signed-off-by: Vidya Sagar
> ---
> Changes from v7:
> * Based on suggestion from Jingoo Han, moved implementation of readl, writel
> for ATU
> region to separate APIs dw_pc
u32 val;
if (pci->ops->read_dbi)
return pci->ops->read_dbi(pci, pci->atu_base, reg,
size);
ret = dw_pcie_read(pci->atu_base + reg, size, &val);
if (ret)
dev_err(pci->dev, "Read ATU address failed\n");
return val;
}
Thank you.
Best regards,
Jingoo Han
>
> static inline void dw_pcie_dbi_ro_wr_en(struct dw_pcie *pci)
> --
> 2.17.1
itself.
> * Modified ATU read/write APIs to call dw_pcie_{write/read}() API
Unlike previous patches (v1~v5), you modified ATU read/write APIs from v6.
Why do you change ATU read/write APIs to call dw_pcie_{write/read}() API???
It is not clean-up, but function change. Please add the reas
On 6/14/19, 11:46 PM, Bartlomiej Zolnierkiewicz wrote:
>
> Add COMPILE_TEST support to s3c-fb driver for better compile
> testing coverage.
>
> Cc: Jingoo Han
Acked-by: Jingoo Han
> Signed-off-by: Bartlomiej Zolnierkiewicz
> ---
> drivers/video/fbdev/Kconfig |3
config space to take place. Hence enabling write permission at
> the start of function and disabling the same only towards the end.
>
> Signed-off-by: Vidya Sagar
> Reviewed-by: Thierry Reding
Acked-by: Jingoo Han
Sorry for being late. I read the previous threads. I don't think
n internally later on.
>
> CC: Jingoo Han
> CC: Joao Pinto
> CC: Lorenzo Pieralisi
> Signed-off-by: Jan Kiszka
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/pcie-designware-host.c | 2 +-
> drivers/pci/host/pci-aardvark.c| 5 ++---
citly, convert the
> existing function to a managed version.
>
> CC: Jingoo Han
> CC: Joao Pinto
> CC: Lorenzo Pieralisi
> Signed-off-by: Jan Kiszka
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/pcie-designware-host.c | 2 +-
> drivers/pci/
person who have
an experience to send patches to Linux mailing-list.
Best regards,
Jingoo Han
>
> pm8941-wled.c driver is supporting the WLED peripheral
> on pm8941. Rename it to qcom-wled.c so that it can support
> WLED on multiple PMICs.
>
> Signed-off-by: Kiran Gunda
> ---
> -Original Message-
> From: Krzysztof Kozlowski
> Sent: Monday, April 30, 2018 1:30 PM
> To: Lee Jones ; Daniel Thompson
> ; Jingoo Han ;
> Bartlomiej Zolnierkiewicz ; linux-
> ker...@vger.kernel.org; dri-de...@lists.freedesktop.org; linux-
> fb...@vger.ke
owski
> Cc: Marek Szyprowski
> Cc: Inki Dae
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/video/backlight/Kconfig | 8 -
> drivers/video/backlight/Makefile| 1 -
> drivers/video/backlight/s6e63m0.c | 857
--------
> ----
Acked-by: Jingoo Han
Best regards,
Jingoo Han
[.]
> -Original Message-
> From: Jan Kiszka
> Sent: Tuesday, April 24, 2018 11:14 AM
> To: Bjorn Helgaas ; Linux Kernel Mailing List ker...@vger.kernel.org>; linux-...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org
> Cc: Jingoo Han ; Joao Pinto
> ; Lore
; aligned. And total activity in the backlight subsystem is miniscule
> compared to drm overall.
>
> Cc: Lee Jones
> Cc: Daniel Thompson
> Cc: Jingoo Han
> Acked-by: Daniel Thompson
> Acked-by: Jingoo Han
> Signed-off-by: Daniel Vetter
Acked-by: Jingoo Han
Best regards,
the new drm atomic modeset api simplified even the uapi to a
> simple bool. And there was never a valid technical reason to have the
> intermediate fbdev power states for backlights (those really only can
> be either off or on).
>
> Cleanup motivated by Meghana's questions abou
ily visible to future modifications.
>
> The designware IP supports a maximum of 256 vectors.
>
> Signed-off-by: Gustavo Pimentel
> Acked-by: Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> Change v1->v2:
> - Nothing changed, just to follow the
Signed-off-by: Thierry Escande
> Reviewed-by: Andrzej Hajda
> Signed-off-by: Enric Balletbo i Serra
> Tested-by: Marek Szyprowski
> Reviewed-by: Archit Taneja
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
>
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 7 +++
g
> Signed-off-by: Douglas Anderson
> Signed-off-by: Sean Paul
> Signed-off-by: Thierry Escande
> Signed-off-by: Enric Balletbo i Serra
> Tested-by: Marek Szyprowski
> Reviewed-by: Heiko Stuebner
> Reviewed-by: Archit Taneja
Acked-by: Jingoo Han
Best regards,
off-by: zain wang
> Signed-off-by: Sean Paul
> Signed-off-by: Thierry Escande
> Reviewed-by: Andrzej Hajda
> Signed-off-by: Enric Balletbo i Serra
> Tested-by: Marek Szyprowski
> Reviewed-by: Archit Taneja
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
&g
zain wang
> Signed-off-by: Douglas Anderson
> Signed-off-by: Sean Paul
> Signed-off-by: Thierry Escande
> Reviewed-by: Andrzej Hajda
> Signed-off-by: Enric Balletbo i Serra
> Tested-by: Marek Szyprowski
> Reviewed-by: Archit Taneja
Acked-by: Jingoo Han
Best regards,
> Signed-off-by: Sean Paul
> Signed-off-by: Thierry Escande
> Reviewed-by: Andrzej Hajda
> Signed-off-by: Enric Balletbo i Serra
> Tested-by: Marek Szyprowski
> Reviewed-by: Archit Taneja
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
>
> .../gpu/drm/br
gt; Cc: Douglas Anderson
> Signed-off-by: zain wang
> Signed-off-by: Sean Paul
> Signed-off-by: Thierry Escande
> Reviewed-by: Andrzej Hajda
> Signed-off-by: Enric Balletbo i Serra
> Tested-by: Marek Szyprowski
> Reviewed-by: Archit Taneja
Acked-by: Jingoo Han
Best regard
ding good
> practice whenever there is a division / multiplication by multiple of 2
> to replace it by the equivalent operation in this case, the shift
> rotation.
>
> Signed-off-by: Gustavo Pimentel
Acked-by: Jingoo Han
> ---
> Change v1->v2:
> - Nothing changed, just t
On Wednesday, April 11, 2018 3:40 AM, Gustavo Pimentel wrote:
>
> Hi Jingoo,
>
> On 11/04/2018 01:01, Jingoo Han wrote:
> > On Monday, April 9, 2018 5:41 AM, Gustavo Pimentel wrote:
> >>
> >> Replaces a simple division by 2 to a right shift rotation of 1
On Monday, April 9, 2018 5:41 AM, Gustavo Pimentel wrote:
>
> Replace magic numbers by a well known define in order to make the code
> human readable and also facilitate the code reusability.
>
> Signed-off-by: Gustavo Pimentel
Acked-by: Jingoo Han
> ---
> Change v1->
function.
>
> Signed-off-by: Gustavo Pimentel
Acked-by: Jingoo Han
> ---
> Change v1->v2:
> - Added an extra log description line about code style following Fabio
> Estevam suggestion.
>
> drivers/pci/dwc/pcie-designware-ep.c | 16 ---
On Monday, April 9, 2018 5:41 AM, Gustavo Pimentel wrote:
>
> Replaces a simple division by 2 to a right shift rotation of 1 bit.
It looks good. However, would you add a simple reason to the commit
message?
Best regards,
Jingoo Han
>
> Signed-off-by: Gustavo Pimentel
> ---
On Wednesday, February 14, 2018 7:01 AM wrote:
>
> Exynos5, Exynos4 and S5PV210 platforms have been converted to
> use Device Tree and Exynos DRM driver long time ago. Remove
> dead platform code for these platforms and update Kconfig
> s3c-fb entry accordingly.
>
> Cc:
if (size > SZ_4G) {
I like this one for the readability.
Thank you.
Best regards,
Jingoo Han
>
> ?
>
> --
> With Best Regards,
> Andy Shevchenko
just makes sense to cross-post patches and keep
> > aligned. And total activity in the backlight subsystem is miniscule
> > compared to drm overall.
> >
> > Cc: Lee Jones
> > Cc: Daniel Thompson
> > Cc: Jingoo Han
> > Signed-off-by: Daniel Vetter
s.c | 219
++-
> --
> > 2 files changed, 22 insertions(+), 255 deletions(-)
>
> I have updated the commit log to the patch below, please
> check before I push it out.
I think that the commit message looks good.
Thank you.
Best regards,
Jingo
Modified the binding documentation.
>
> Signed-off-by: Jaehoon Chung
(I resend my email, because Bjorn's address was wrong in the previous
email.)
Thank you for your patch.
It looks good.
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> .../bindings/pci/samsung,exynos5440-
Modified the binding documentation.
>
> Signed-off-by: Jaehoon Chung
Thank you for your patch.
It looks good.
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> .../bindings/pci/samsung,exynos5440-pcie.txt | 58 ++
> drivers/pci/dwc/pci-exynos.c
7;s SPI interface it switches to use 16-bib RGB as external
> display interface.
>
> Signed-off-by: Felix Brack
Acked-by: Jingoo Han
Best regards,
Jingoo Han
>
> Changes in v2:
> - use descriptive names for registers instead of hard coding them
> - remove unnecessary registers i
me = "otm3225a",
> + .owner = THIS_MODULE,
> + },
> + .probe = otm3225a_probe,
> + .remove = otm3225a_remove,
If you use devm_kzalloc() and devm_lcd_device_register(),
you can remove otm3225a_remove() as below.
+static struct spi_driver otm3225a_driver = {
+ .driver = {
+ .name = "otm3225a",
+ .owner = THIS_MODULE,
+ },
+ .probe = otm3225a_probe,
+};
Please refer to the following driver.
./drivers/video/backlight/tps65217_bl.c
> +};
> +
> +static __init int otm3225a_init(void)
> +{
> + return (&otm3225a_driver);
> +}
> +
> +static __exit void otm3225a_exit(void)
> +{
> + spi_unregister_driver(&otm3225a_driver);
> +}
> +
> +module_init(otm3225a_init);
> +module_exit(otm3225a_exit);
Instead of adding otm3225a_init(), otm3225a_exit(),
please use module_spi_driver macro as below.
This macro can reduce source code lines.
module_spi_driver(otm3225a_driver);
Best regards,
Jingoo Han
> +
> +MODULE_AUTHOR("Felix Brack ");
> +MODULE_DESCRIPTION("OTM3225A TFT LCD driver");
> +MODULE_VERSION("1.0.0");
> +MODULE_LICENSE("GPL v2");
> --
> 2.7.4
On Thursday, December 21, 2017 9:21 PM, Jaehoon Chung wrote:
> On 12/22/2017 01:12 AM, Jingoo Han wrote:
> > On Thursday, December 21, 2017 7:14 AM, Jaehoon Chung wrote:
> >>
> >> Exynos5433 has the PCIe for WiFi.
> >> Added the codes relevant to PCIe for
w_pcie_ep *ep);
> > +int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 interrupt_num);
> > void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar);
> > #else
> > static inline void dw_pcie_ep_linkup(struct dw_pcie_ep *ep)
> > @@ -353,6 +356,12 @@ static inline void dw_pcie_ep_exit(struct
> dw_pcie_ep *ep)
> > {
> > }
> >
> > +static inline int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep,
> > + u8 interrupt_num)
> > +{
> > + return 0;
> > +}
> > +
> > static inline void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum
> pci_barno bar)
> > {
> > }
> >
>
> Acked-by: Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
(pci);
> > diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-
> designware.h
> > index 9aaf0cd04dd6..5a1da459eda5 100644
> > --- a/drivers/pci/dwc/pcie-designware.h
> > +++ b/drivers/pci/dwc/pcie-designware.h
> > @@ -198,6 +198,8 @@ struct dw_pcie_ep {
> > unsigned long ob_window_map;
> > u32 num_ib_windows;
> > u32 num_ob_windows;
> > + void __iomem*msi_mem;
> > + phys_addr_t msi_mem_phys;
> > };
> >
> > struct dw_pcie_ops {
> >
>
> Acked-by: Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
; > dw_pcie_writel_dbi2(pci, reg, size - 1);
> > dw_pcie_writel_dbi(pci, reg, flags);
> > + dw_pcie_dbi_ro_wr_dis(pci);
> >
> > return 0;
> > }
> > @@ -223,7 +229,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc,
> u8 encode_int)
> > val
/pci/dwc/pcie-designware.h
> > @@ -101,6 +101,7 @@
> >
> > #define MSI_MESSAGE_CONTROL0x52
> > #define MSI_CAP_MMC_SHIFT 1
> > +#define MSI_CAP_MMC_MASK (7 << MSI_CAP_MMC_SHIFT)
> > #define MSI_CAP_MME_SHIFT 4
> > #define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT)
> > #define MSI_MESSAGE_ADDR_L32 0x54
> >
>
> Acked-by: Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
CIE_DESIGNWARE_H
> >
> > +#include
> > #include
> > #include
> > #include
> > @@ -168,7 +169,7 @@ struct pcie_port {
> > const struct dw_pcie_host_ops *ops;
> > int msi_irq;
> > struct irq_domain *irq_domain;
> > - unsigned long msi_data;
> > + dma_addr_t msi_data;
> > DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
> > };
> >
> >
>
> Makes total sense! Thanks.
>
> Acked-by: Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
f-by: Pankaj Dubey
Sorry for my late response.
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/pcie-designware.c | 8
> drivers/pci/dwc/pcie-designware.h | 3 +--
> 2 files changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/
designware.c so that both pcie-designware-host.c and
> pcie-designware-ep.c can use it.
>
> Signed-off-by: Pankaj Dubey
Sorry for my late response.
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/pcie-designware-ep.c | 4
> drive
On Thursday, December 21, 2017 11:13 AM, Jingoo Han wrote:
> On Thursday, December 21, 2017 7:14 AM, Jaehoon Chung wrote:
> >
> > Exynos5433 has the PCIe for WiFi.
> > Added the codes relevant to PCIe for supporting the exynos5433.
> > Also changed the binding documen
s_pcie *ep = arg;
> @@ -513,9 +601,16 @@ static void exynos_pcie_msi_init(struct exynos_pcie
> *ep)
> exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_IRQ_EN_LEVEL);
> }
>
> -static void exynos_pcie_enable_interrupts(struct exynos_pcie *ep)
> +static void exynos_pcie_enabl
On Tuesday, November 28, 2017 7:54 PM, Stephen Boyd wrote:
>
> We have macros for getting the upper or lower 32 bits of a
> number. Use them here to shave a couple lines off the code.
>
> Signed-off-by: Stephen Boyd
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
>
Daniel Thompson
> Signed-off-by: Sinan Kaya
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/video/backlight/apple_bl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/video/backlight/apple_bl.c
> b/drivers/video/backlight/appl
ponding size
> determination a bit safer according to the Linux coding style convention.
>
> This issue was detected by using the Coccinelle software.
>
> Signed-off-by: Markus Elfring
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/video/fbdev/s3c-fb.c | 2
> Signed-off-by: Markus Elfring
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/video/fbdev/s3c-fb.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/video/fbdev/s3c-fb.c b/drivers/video/fbdev/s3c-fb.c
> index 5f4f696c2e
roid lighting
> > solutions this is the preferred subsystem for Android. The Android OS
> manages the led brightness based on ALS values and in
> > turn calls into the driver to control the brightness register through
> the vendor provided lighting HAL.
> >
>
>
ightness register through the
> vendor provided lighting HAL.
>
> I am going to look at the backlight source to figure out how to get the
> same functionality using the backlight subsystem.
> Otherwise I will plug in this driver to the backlight subsystem through
> the notifier.
'len'
> is never read
>
> Signed-off-by: Colin Ian King
Acked-by: Jingoo Han
Thank you for sending the patch.
It looks good.
Best regards,
Jingoo Han
> ---
> drivers/video/backlight/ili922x.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> dif
ting their users at the same
> time to avoid breaking the compilation.
>
> Signed-off-by: Tomasz Figa
> Signed-off-by: Jeffy Chen
> Reviewed-by: Andrzej Hajda
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
>
> Changes in v4: None
> Changes in v3:
ting their users at the same
> time to avoid breaking the compilation.
>
> Signed-off-by: Tomasz Figa
> Signed-off-by: Jeffy Chen
> Reviewed-by: Andrzej Hajda
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
>
> Changes in v3: None
> Changes in v2: N
r_32_bits(msi_target);
>
> if (pp->ops->get_msi_data)
> msg.data = pp->ops->get_msi_data(pp, pos);
> diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-
> designware.h
> index e5d9d77b778e..547352a317f8 100644
> --- a/
on. However, did you test your patch?
In my opinion, your company does not handle DWC PCIe controller, right?
If so, you need to get tested-by from other people.
Best regards,
Jingoo Han
>
> Signed-off-by: Niklas Cassel
> ---
> drivers/pci/dwc/pcie-designware-host.c | 23 +
On Sunday, October 8, 2017 5:57 PM, Christos Gkekas wrote:
>
> Variable val holds the default brightness and is unsigned, therefore
> checking whether it is less than zero is redundant.
>
> Signed-off-by: Christos Gkekas
It looks good.
Acked-by: Jingoo Han
Best rega
gt;
> I guess the summary of what I'm saying is that if we can
> programmatically derive brightness curves then the number of steps is
> not really a property of the hardware and doesn't belong in devicetree.
Yep, I agree with Daniel's opinion. I cannot find the reason
this feature can be added to the device tree.
In my opinion, this feature can be handled by upper user level layer,
not backlight framework level. However, we can discuss this topic to
find how to handle it.
Best regards,
Jingoo Han
>
>
> Daniel.
ar the PWM signal and disable the backlight. Add support for
> > the new post-pwm-on-delay-ms and pwm-off-delay-ms proprieties to meet
> > the timings.
> >
> > Signed-off-by: Enric Balletbo i Serra
>
> Acked-by: Daniel Thompson
Acked-by: Jingoo Han
Best rega
101EAN0 (Auo)
> >- B101AW03 (Auo)
> >- LTN101NT05 (Samsung)
> >- CLAA101WA01A (Chunghwa)
> >
> > Signed-off-by: Enric Balletbo i Serra
>
> Acked-by: Daniel Thompson
Acked-by: Jingoo Han
Best regards,
Jingoo Han
>
> > ---
> > Chan
Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> Since v1:
> - Add Joao's Ack
> - Fix typo in commit msg, thank Jingoo
>
> drivers/pci/dwc/pcie-designware.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/dri
inbound_atu_unroll(struct dw_pcie *pci, int index, int
> bar,
> > +static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int
> index, int bar,
> > u64 cpu_addr, enum dw_pcie_as_type as_type)
> > {
> > int type;
> > --
> > 2.11.0
> >
>
> That indeed escaped in the refactoring :) Thanks!
>
> Acked-by: Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
; > test the enable it.
To Jisheng Zhang,
typo s/it/bit
"test the enable it." ---> "test the enable bit."
Please fix this typo, and send it again.
Type is confusing.
Best regards,
Jingoo Han
> >
> > Signed-off-by: Jisheng Zhang
> > ---
> > dr
+-
> > 13 files changed, 47 insertions(+), 18 deletions(-)
> >
[.]
>
> A step in the right direction :). In the future we should add host init
> validation in the specific SoC drivers, like Layerscape and Qcom have, to
> assure
> that any problem is treated properly in the core driver.
I agree with your opinion.
>
> Acked-by: Joao Pinto
Acked-by: Jingoo Han
Best regards,
Jingoo Han
n-const structs as const.
> >
> > Signed-off-by: Arvind Yadav
>
> Acked-by: Daniel Thompson
Acked-by: Jingoo Han
Best regards,
Jingoo Han
>
>
> > ---
> > drivers/video/backlight/pwm_bl.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
>
On Monday, June 5, 2017 4:54 AM, Jisheng Zhang wrote:
>
> The dw_pcie_host_ops structures are never modified. Constify these
> structures such that these can be write-protected.
>
> Signed-off-by: Jisheng Zhang
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
>
te and Suspend/Resume), hotplug
> and MSI feature are not supported currently.
>
> Cc: Guodong Xu
> Signed-off-by: Xiaowei Song
Reviewed-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/Kconfig | 10 +
> drivers/pci/dwc/Makefile |
te and Suspend/Resume), hotplug
> and MSI feature are not supported currently.
>
> Cc: Guodong Xu
> Signed-off-by: Xiaowei Song
It looks good.
Reviewed-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/Kconfig | 10 +
> drivers/pci/dwc/Makefile |
,
I think that you need to receive 'tested-by' from other people such as
colleagues or other developers. Or, would you share the result of 'lspci'
for your HiSilicon Kirin PCIe Host controller? That will help other
maintainers to review your patches.
Best rega
>dev, "PIPE clk is not stable\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static void kirin_pcie_oe_enable(struct kirin_pcie *kirin_pcie)
> +{
> + u32 val;
> +
> + regmap_read(kirin_pcie->sysctrl, SCTRL_PCIE_
; +
> +static struct dw_pcie_host_ops kirin_pcie_host_ops = {
> + .rd_own_conf = kirin_pcie_rd_own_conf,
> + .wr_own_conf = kirin_pcie_wr_own_conf,
> + .host_init = kirin_pcie_host_init,
> +};
> +
> +static int __init kirin_add_pcie_port(struct dw_pcie *pci,
>
+#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include "pcie-designware.h"
Please re-order these header files in alphabetical order for 'readability'.
Best regards,
Jingoo Han
[]
On Tuesday, May 9, 2017 8:50 AM, Olimpiu Dejeu wrote:
>
> dt-bindings: vendor-prefixes: add arctic to vendor prefix
>
> Acked-by: Rob Herring
> Signed-off-by: Olimpiu Dejeu
I cannot find any reason to reject this patch.
Reviewed-by: Jingoo Han
Best regards,
Jingoo Han
&g
On Thursday, April 27, 2017 8:37 AM, Geert Uytterhoeven wrote:
> On Tue, Apr 25, 2017 at 6:36 PM, Jingoo Han wrote:
> > On Monday, April 24, 2017 1:56 PM, Olimpiu Dejeu wrote:
> >>
> >> On Mon, April 24, 2017 11:10 AM, Rob Herring < r...@kernel.org> wrote:
> &g
opinion, other Designware-based PCIe controller will
work properly.
To Dongdong Liu, Khuong Dinh, and other people,
If possible, can you check the output of 'lspci -v'?
If you find something different, please share it with us.
Good luck.
Best regards,
Jingoo Han
>
> Thanks,
>
s.
So, please use more detailed words.
>
> >BTW, some reason your patches are not going to the DT list.
>
>
> I'm emailing to devicet...@vger.kernel.org, I think this is the correct
> list. Please advise.
DT is some kind of ABI. It means that changing DT names such as property names
is not easy, after DT patches were merged. So, if someone want to add new DT
stuff
into the vanilla kernel, that patch should be reviewed more thoroughly
than normal patches about driver stuffs.
Thanks,
Jingoo Han
>
>
> >Rob
> Olimpiu
>
on their platforms.
Good! I really want to know the result of these patches on ARM serves.
Please share it with us. Good luck.
Best regards,
Jingoo Han
>
> Jon.
ect
> memory mappings for PCI configuration space are used.
>
> Signed-off-by: Lorenzo Pieralisi
> Cc: Bjorn Helgaas
> Cc: Jingoo Han
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> Cc: Joao Pinto
> ---
> drivers/pci/dwc/pcie-designware-host.c | 12 +++-
&
issue in pcie-designware-plat driver, then searched the code, I think
> we should fix pcie-qcom and vmd as well.
>
> Signed-off-by: Jisheng Zhang
For pcie-designware-plat.c,
Acked-by: Jingoo Han
Thank you.
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/pcie-designware-plat.
defined reference to `pci_ecam_map_bus'
> drivers/pci/dwc/built-in.o: In function `hisi_pcie_almost_ecam_probe':
> pcie-hisi.c:(.text+0x88b4): undefined reference to `pci_host_common_probe'
>
> This adds an explicit 'select', as the other users have.
>
> Sig
; specific file.
>
> While at that also fix a checkpatch warning.
>
> Reviewed-By: Joao Pinto
> Signed-off-by: Kishon Vijay Abraham I
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/pci/dwc/pcie-designware.c | 70
> --
T
> > Signed-off-by: Pankaj Dubey
> > Acked-by: Krzysztof Kozlowski
> > Reviewed-by: Bartlomiej Zolnierkiewicz
> > Reviewed-by: Alim Akhtar
> > Reviewed-by: Jaehoon Chung
>
> Jingoo, any thoughts on this?
Acked-by: Jingoo Han
Best regards,
Jingoo Han
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