Introduce new polling mode for short size transfer. Either the estimated
transfer time is estimated to exceed 200us, or polling loop actually exceeds
200us, it switches to irq mode.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 81
When it changes the spi mode, the register is overwritten incorrectly.
This commit fixes this register overwrite.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-uniphier.c b/drivers/spi/spi-uniphier.c
index
This commit removed if() because priv->is_save_param is always true.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/spi/spi-uniphier.c b/drivers/spi/spi-uniphier.c
index e6ebbb1..d40ad93 100
.
Keiji Hayashibara (3):
spi: uniphier: fix wrong register overwrite
spi: uniphier: remove unnecessary code
spi: uniphier: introduce polling mode
drivers/spi/spi-uniphier.c | 85 --
1 file changed, 68 insertions(+), 17 deletions(-)
--
2.7.4
This series fixes timeout problem and modifies timeout handling.
The zero-length transfer results in two second timeout
and the transfer speed becomes slow.
Keiji Hayashibara (2):
spi: uniphier: fix timeout error
spi: uniphier: fix zero-length transfer
drivers/spi/spi-uniphier.c | 17
The zero-length transfer results in timeout error because
the transfer doesn't start.
This commit modified to return success in this case.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/spi/spi-uniphier.c b/drivers
Timeout error was silently ignored.
This commit adds timeout error handling and modifies return type of
wait_for_completion_timeout().
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/spi
ot;).
Changes since v1:
- Add commit 71b8dfc691a3 ("spi: uniphier: re-add addressing properties")
The addressing properties of #address-cells and #size-cells
are back again.
Keiji Hayashibara (2):
spi: uniphier: fix incorrect property items
spi: uniphier: re-add addressing propert
ot;).
Changes since v1:
- Add commit 71b8dfc691a3 ("spi: uniphier: re-add addressing properties")
The addressing properties of #address-cells and #size-cells
are back again.
Keiji Hayashibara (2):
spi: uniphier: fix incorrect property items
spi: uniphier: re-add addressing propert
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-uniphier.txt | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt
b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
index 504a4e
In commit 7662d1dc17d4 ("spi: uniphier: fix incorrect property items")
addressing properties of #address-cells and #size-cells were removed.
Since it is not necessary to remove them, they are back again.
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-un
In commit 7662d1dc17d4 ("spi: uniphier: fix incorrect property items")
addressing properties of #address-cells and #size-cells were removed.
Since it is not necessary to remove them, they are back again.
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-un
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-uniphier.txt | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt
b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
index 504a4e
el.org; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org;
> sta...@vger.kernel.org; masami.hirama...@linaro.org;
> jaswinder.si...@linaro.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] spi: uniphier: fix incorrect property items
>
> On Wed, Oct 24, 2018 at 06
el.org; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org;
> sta...@vger.kernel.org; masami.hirama...@linaro.org;
> jaswinder.si...@linaro.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] spi: uniphier: fix incorrect property items
>
> On Wed, Oct 24, 2018 at 06
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-uniphier.txt | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt
b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
index 504a4e
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-uniphier.txt | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt
b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
index 504a4e
only.
> >
> > This controller has 32bit TX/RX FIFO with depth of eight entry, and
> > supports the SPI master mode only.
> >
> > This commit is implemented in PIO transfer mode, not DMA transfer.
> >
>
> One comment below, otherwise FWIW,
> Reviewed-by:
only.
> >
> > This controller has 32bit TX/RX FIFO with depth of eight entry, and
> > supports the SPI master mode only.
> >
> > This commit is implemented in PIO transfer mode, not DMA transfer.
> >
>
> One comment below, otherwise FWIW,
> Reviewed-by:
This commit removed include headers of linux/of.h and linux/of_platform.h,
because they are not used.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/spi/spi-uniphier.c b/drivers/spi/spi-uniphier.c
index 0899854
This commit removed include headers of linux/of.h and linux/of_platform.h,
because they are not used.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/spi/spi-uniphier.c b/drivers/spi/spi-uniphier.c
index 0899854
the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 13 ++
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 525
the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 13 ++
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 525
This series adds support for SPI controller driver implemented on UniPhier SoCs.
Changes since v2:
- remove check code of clock divider in uniphier_spi_set_baudrate().
- change irq from struct variable to stack variable.
- other trivial change.
Keiji Hayashibara (1):
spi: add SPI controller
This series adds support for SPI controller driver implemented on UniPhier SoCs.
Changes since v2:
- remove check code of clock divider in uniphier_spi_set_baudrate().
- change irq from struct variable to stack variable.
- other trivial change.
Keiji Hayashibara (1):
spi: add SPI controller
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
Reviewed-by: Rob Herring
---
.../devicetree/bindings/spi/spi-uniphier.txt | 22 ++
1 file changed, 22 insertions
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
Reviewed-by: Rob Herring
---
.../devicetree/bindings/spi/spi-uniphier.txt | 22 ++
1 file changed, 22 insertions
Hello Rob,
I see.
I will add "Acked-by" and "Reviewed-by" tag by Rob in next version.
Thank you.
-
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Tuesday, July 31, 2018 6:47 AM
&
Hello Rob,
I see.
I will add "Acked-by" and "Reviewed-by" tag by Rob in next version.
Thank you.
-
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Tuesday, July 31, 2018 6:47 AM
&
t + 1) & ~1, one "add" and one "and".
>
> Might as well use the macro so it's clear. There is also round_up(x,y), which
> I believe is intended to be used
> only with power of 2 values of y.
I confirmed round_up() macro.
This macro is optimized to power of 2 argument,
and it matches to this case and clear.
I will replace to round_up() macro.
Thank you.
-
Best Regards,
Keiji Hayashibara
t + 1) & ~1, one "add" and one "and".
>
> Might as well use the macro so it's clear. There is also round_up(x,y), which
> I believe is intended to be used
> only with power of 2 values of y.
I confirmed round_up() macro.
This macro is optimized to power of 2 argument,
and it matches to this case and clear.
I will replace to round_up() macro.
Thank you.
-
Best Regards,
Keiji Hayashibara
static const char * const system_bus_groups[] = {"system_bus",
"system_bus_cs1",
"system_bus_cs2",
I mistook "spi0_groups" with " spi_groups",
so there was
static const char * const system_bus_groups[] = {"system_bus",
"system_bus_cs1",
"system_bus_cs2",
I mistook "spi0_groups" with " spi_groups",
so there was
ed out.
However, I found this code unnecessary as pointed out by Radu,
so I will delete it.
> >> > +
> >> > + if (ckrat < SSI_MIN_CLK_DIVIDER)
> >> > + ckrat = SSI_MIN_CLK_DIVIDER;
> >>
> >> clamp_val() / max() ?
> >
> > I will modify it to use max().
>
> See above.
This is also the same as above.
> --
> With Best Regards,
> Andy Shevchenko
-
Best Regards,
Keiji Hayashibara
ed out.
However, I found this code unnecessary as pointed out by Radu,
so I will delete it.
> >> > +
> >> > + if (ckrat < SSI_MIN_CLK_DIVIDER)
> >> > + ckrat = SSI_MIN_CLK_DIVIDER;
> >>
> >> clamp_val() / max() ?
> >
> > I will modify it to use max().
>
> See above.
This is also the same as above.
> --
> With Best Regards,
> Andy Shevchenko
-
Best Regards,
Keiji Hayashibara
Hello Radu,
> From: Radu Pirea [mailto:radu.pi...@microchip.com]
> Sent: Thursday, July 26, 2018 7:58 PM
> To: Hayashibara, Keiji/林原 啓二 ; 'Andy
> Shevchenko'
>
> Subject: Re: [PATCH v2 2/2] spi: add SPI controller driver for UniPhier SoC
>
>
>
> On 07/26/20
Hello Radu,
> From: Radu Pirea [mailto:radu.pi...@microchip.com]
> Sent: Thursday, July 26, 2018 7:58 PM
> To: Hayashibara, Keiji/林原 啓二 ; 'Andy
> Shevchenko'
>
> Subject: Re: [PATCH v2 2/2] spi: add SPI controller driver for UniPhier SoC
>
>
>
> On 07/26/20
Hello Yamada-san,
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Thursday, July 26, 2018 6:13 PM
> To: Hayashibara, Keiji/林原 啓二
> Subject: Re: [PATCH v2 2/2] spi: add SPI controller driver for UniPhier SoC
>
> Hi.
>
>
> 2018-07-26 16:09
Hello Yamada-san,
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Thursday, July 26, 2018 6:13 PM
> To: Hayashibara, Keiji/林原 啓二
> Subject: Re: [PATCH v2 2/2] spi: add SPI controller driver for UniPhier SoC
>
> Hi.
>
>
> 2018-07-26 16:09
t; > + if (priv->irq < 0) {
> > + dev_err(>dev, "failed to get IRQ\n");
>
> > + ret = -ENXIO;
>
> What's wrong with
>
> ret = priv->irq;
>
> ?
I will modify it.
> > + goto out_disable_clk;
> > + }
>
> > +static const struct of_device_id uniphier_spi_match[] = {
> > + { .compatible = "socionext,uniphier-scssi", },
>
> > + { /* sentinel */ },
>
> Slightly better without comma.
OK. I will modify this.
-
Best Regards,
Keiji Hayashibara
> > +};
> > +MODULE_DEVICE_TABLE(of, uniphier_spi_match);
>
> --
> With Best Regards,
> Andy Shevchenko
t; > + if (priv->irq < 0) {
> > + dev_err(>dev, "failed to get IRQ\n");
>
> > + ret = -ENXIO;
>
> What's wrong with
>
> ret = priv->irq;
>
> ?
I will modify it.
> > + goto out_disable_clk;
> > + }
>
> > +static const struct of_device_id uniphier_spi_match[] = {
> > + { .compatible = "socionext,uniphier-scssi", },
>
> > + { /* sentinel */ },
>
> Slightly better without comma.
OK. I will modify this.
-
Best Regards,
Keiji Hayashibara
> > +};
> > +MODULE_DEVICE_TABLE(of, uniphier_spi_match);
>
> --
> With Best Regards,
> Andy Shevchenko
From: Kunihiko Hayashi
This commit adds pin-mux nodes for SPI controller.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
From: Kunihiko Hayashi
This commit adds pin-mux nodes for SPI controller.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
This series adds SPI pin-mux node and SPI node for UniPhier SoCs.
Changes since v1:
- remove the node for MCSSI which support multiple channels.
Since the current driver doesn't support MCSSI, it deletes this node.
Kunihiko Hayashi (3):
ARM: dts: uniphier: add SPI pin-mux node
ARM: dts:
This series adds SPI pin-mux node and SPI node for UniPhier SoCs.
Changes since v1:
- remove the node for MCSSI which support multiple channels.
Since the current driver doesn't support MCSSI, it deletes this node.
Kunihiko Hayashi (3):
ARM: dts: uniphier: add SPI pin-mux node
ARM: dts:
From: Kunihiko Hayashi
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro5.dtsi | 22
From: Kunihiko Hayashi
Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 22
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 44
From: Kunihiko Hayashi
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro5.dtsi | 22
From: Kunihiko Hayashi
Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 22
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 44
ify the handling of word size in uniphier_spi_send() and
uniphier_spi_recv().
- modify help in Kconfig.
- other trivial change.
Keiji Hayashibara (1):
spi: add SPI controller driver for UniPhier SoC
Kunihiko Hayashi (1):
dt-bindings: spi: add DT bindings for UniPhier SPI control
ify the handling of word size in uniphier_spi_send() and
uniphier_spi_recv().
- modify help in Kconfig.
- other trivial change.
Keiji Hayashibara (1):
spi: add SPI controller driver for UniPhier SoC
Kunihiko Hayashi (1):
dt-bindings: spi: add DT bindings for UniPhier SPI control
the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 13 ++
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 539
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/spi/spi-uniphier.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/spi/spi-uniphier.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644
the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 13 ++
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 539
Hi Trent,
> -Original Message-
> From: Trent Piepho [mailto:tpie...@impinj.com]
> Sent: Friday, July 20, 2018 4:46 AM
> Subject: Re: [PATCH 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Thu, 2018-07-19 at 15:51 +0900, Keiji Hayashibara wrote:
> >
Hi Trent,
> -Original Message-
> From: Trent Piepho [mailto:tpie...@impinj.com]
> Sent: Friday, July 20, 2018 4:46 AM
> Subject: Re: [PATCH 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Thu, 2018-07-19 at 15:51 +0900, Keiji Hayashibara wrote:
> >
Hi Mark,
> -Original Message-
> From: Mark Brown [mailto:broo...@kernel.org]
> Sent: Friday, July 20, 2018 1:52 AM
> Subject: Re: [PATCH 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Thu, Jul 19, 2018 at 03:51:57PM +0900, Keiji Hayashibara wrote:
>
Hi Mark,
> -Original Message-
> From: Mark Brown [mailto:broo...@kernel.org]
> Sent: Friday, July 20, 2018 1:52 AM
> Subject: Re: [PATCH 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Thu, Jul 19, 2018 at 03:51:57PM +0900, Keiji Hayashibara wrote:
>
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
Changes since v1:
- Fix build error of "pinctrl-uniphier-sld8.c".
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctr
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
Changes since v1:
- Fix build error of "pinctrl-uniphier-sld8.c".
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctr
Hi,
Sorry.
I will fix this and send v2 patch.
Thank you.
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: kbuild test robot [mailto:l...@intel.com]
> Sent: Thursday, July 19, 2018 5:02 PM
> To: Hayashibara, Keiji/林原 啓二
> Cc: kbuild-...@01.org; linus.wal
Hi,
Sorry.
I will fix this and send v2 patch.
Thank you.
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: kbuild test robot [mailto:l...@intel.com]
> Sent: Thursday, July 19, 2018 5:02 PM
> To: Hayashibara, Keiji/林原 啓二
> Cc: kbuild-...@01.org; linus.wal
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/spi/spi-uniphier.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
This series adds support for SPI controller driver implemented on UniPhier SoCs.
Keiji Hayashibara (1):
spi: add SPI controller driver for UniPhier SoC
Kunihiko Hayashi (1):
dt-bindings: spi: add DT bindings for UniPhier SPI controller
.../devicetree/bindings/spi/spi-uniphier.txt
,
and supports the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 7 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 532
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/spi/spi-uniphier.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
This series adds support for SPI controller driver implemented on UniPhier SoCs.
Keiji Hayashibara (1):
spi: add SPI controller driver for UniPhier SoC
Kunihiko Hayashi (1):
dt-bindings: spi: add DT bindings for UniPhier SPI controller
.../devicetree/bindings/spi/spi-uniphier.txt
,
and supports the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 7 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 532
From: Kunihiko Hayashi
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro4.dtsi | 22 ++
arch/arm/boot/dts/uniphier-pro5.dtsi | 33
From: Kunihiko Hayashi
This commit adds pin-mux nodes for SPI controller.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
From: Kunihiko Hayashi
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro4.dtsi | 22 ++
arch/arm/boot/dts/uniphier-pro5.dtsi | 33
From: Kunihiko Hayashi
This commit adds pin-mux nodes for SPI controller.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
This series adds SPI pin-mux node and SPI node for UniPhier SoCs.
Kunihiko Hayashi (3):
ARM: dts: uniphier: add SPI pin-mux node
ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs
arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3
arch/arm/boot/dts/uniphier-ld4.dtsi
From: Kunihiko Hayashi
Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 22
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 44
This series adds SPI pin-mux node and SPI node for UniPhier SoCs.
Kunihiko Hayashi (3):
ARM: dts: uniphier: add SPI pin-mux node
ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs
arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3
arch/arm/boot/dts/uniphier-ld4.dtsi
From: Kunihiko Hayashi
Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 22
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 44
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 20
drivers/pinctrl
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 20
drivers/pinctrl
From: Kunihiko Hayashi
Add reset control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
drivers/reset/reset-uniphier.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index e9030ff..5605745
From: Kunihiko Hayashi
Add reset control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
drivers/reset/reset-uniphier.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index e9030ff..5605745
From: Kunihiko Hayashi
Add clock control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/clk-uniphier-peri.c | 9 +
drivers/clk/uniphier/clk-uniphier-sys.c | 8
2 files changed, 17 insertions(+)
From: Kunihiko Hayashi
Add clock control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/clk-uniphier-peri.c | 9 +
drivers/clk/uniphier/clk-uniphier-sys.c | 8
2 files changed, 17 insertions(+)
gram is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> */
>
> #include
Acked-by: Keiji Hayashibara
gram is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> */
>
> #include
Acked-by: Keiji Hayashibara
Thank you.
Best Regards,
Keiji Hayashibara
Hello Yamada-san,
Sorry, I will be careful next time.
I was checking with the command of
"get_maintainer.pl -f arch/arm/boot/dts/".
Thank you.
Best Regards,
Keiji Hayashibara
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Tuesday, December 12, 2017 1
Hello Yamada-san,
Sorry, I will be careful next time.
I was checking with the command of
"get_maintainer.pl -f arch/arm/boot/dts/".
Thank you.
Best Regards,
Keiji Hayashibara
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Tuesday, December 12, 2017 1
Add efuse node for UniPhier LD4, Pro4, sLD8, Pro5 and PXs2.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara <hayashibara.ke...@socionext.com>
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 18 ++
arch/arm/boot/dts/uniphier-pro4.dts
Add efuse node for UniPhier LD4, Pro4, sLD8, Pro5 and PXs2.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 18 ++
arch/arm/boot/dts/uniphier-pro4.dtsi | 23 +++
arch/arm/boot/dts/uniphier
Enable the efuse driver for UniPhier SoC
Signed-off-by: Keiji Hayashibara <hayashibara.ke...@socionext.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6356c6d..41e1b56 100644
---
Enable the efuse driver for UniPhier SoC
Signed-off-by: Keiji Hayashibara
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6356c6d..41e1b56 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch
Reviewed-by: Keiji Hayashibara <hayashibara.ke...@socionext.com>
Thanks.
-
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Kunihiko Hayashi [mailto:hayashi.kunih...@socionext.com]
> Sent: Wednesday, November 22, 2017 2:15 PM
> To: Srinivas Kandagatla
Reviewed-by: Keiji Hayashibara
Thanks.
-
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Kunihiko Hayashi [mailto:hayashi.kunih...@socionext.com]
> Sent: Wednesday, November 22, 2017 2:15 PM
> To: Srinivas Kandagatla
> Cc: Yamada, Masahiro/山田 真
between v4 and v3
=
1. Fix mistakes in label correction with v3 patch
Keiji Hayashibara (3):
dt-bindings: nvmem: add description for UniPhier eFuse
nvmem: uniphier: add UniPhier eFuse driver
arm64: dts: uniphier: add efuse node for LD20
.../devicetree/bindings/nvmem
Add efuse node for UniPhier LD20 SoC.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara <hayashibara.ke...@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/bo
between v4 and v3
=
1. Fix mistakes in label correction with v3 patch
Keiji Hayashibara (3):
dt-bindings: nvmem: add description for UniPhier eFuse
nvmem: uniphier: add UniPhier eFuse driver
arm64: dts: uniphier: add efuse node for LD20
.../devicetree/bindings/nvmem
Add efuse node for UniPhier LD20 SoC.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
b/arch
Add eFuse driver for Socionext UniPhier series SoC.
Note that eFuse device is under soc-glue and this register
implements as read only.
Signed-off-by: Keiji Hayashibara <hayashibara.ke...@socionext.com>
---
drivers/nvmem/Kconfig | 11 +
drivers/nvmem/Makefile | 2 +
d
Add eFuse driver for Socionext UniPhier series SoC.
Note that eFuse device is under soc-glue and this register
implements as read only.
Signed-off-by: Keiji Hayashibara
---
drivers/nvmem/Kconfig | 11 +
drivers/nvmem/Makefile | 2 +
drivers/nvmem/uniphier-efuse.c | 97
Add uniphier-efuse dt-bindings documentation.
Signed-off-by: Keiji Hayashibara <hayashibara.ke...@socionext.com>
---
.../devicetree/bindings/nvmem/uniphier-efuse.txt | 49 ++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings
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